arch/x86/kvm/mmu.h

   1 #ifndef __KVM_X86_MMU_H
   2 #define __KVM_X86_MMU_H
   3
   4 #include <linux/kvm_host.h>
   5 #include "kvm_cache_regs.h"
   6
   7 #define PT64_PT_BITS 9
   8 #define PT64_ENT_PER_PAGE (1 << PT64_PT_BITS)
   9 #define PT32_PT_BITS 10
  10 #define PT32_ENT_PER_PAGE (1 << PT32_PT_BITS)
  11
  12 #define PT_WRITABLE_SHIFT 1
  13
  14 #define PT_PRESENT_MASK (1ULL << 0)
  15 #define PT_WRITABLE_MASK (1ULL << PT_WRITABLE_SHIFT)
  16 #define PT_USER_MASK (1ULL << 2)
  17 #define PT_PWT_MASK (1ULL << 3)
  18 #define PT_PCD_MASK (1ULL << 4)
  19 #define PT_ACCESSED_SHIFT 5
  20 #define PT_ACCESSED_MASK (1ULL << PT_ACCESSED_SHIFT)
  21 #define PT_DIRTY_MASK (1ULL << 6)
  22 #define PT_PAGE_SIZE_MASK (1ULL << 7)
  23 #define PT_PAT_MASK (1ULL << 7)
  24 #define PT_GLOBAL_MASK (1ULL << 8)
  25 #define PT64_NX_SHIFT 63
  26 #define PT64_NX_MASK (1ULL << PT64_NX_SHIFT)
  27
  28 #define PT_PAT_SHIFT 7
  29 #define PT_DIR_PAT_SHIFT 12
  30 #define PT_DIR_PAT_MASK (1ULL << PT_DIR_PAT_SHIFT)
  31
  32 #define PT32_DIR_PSE36_SIZE 4
  33 #define PT32_DIR_PSE36_SHIFT 13
  34 #define PT32_DIR_PSE36_MASK \
  35         (((1ULL << PT32_DIR_PSE36_SIZE) - 1) << PT32_DIR_PSE36_SHIFT)
  36
  37 #define PT64_ROOT_LEVEL 4
  38 #define PT32_ROOT_LEVEL 2
  39 #define PT32E_ROOT_LEVEL 3
  40
  41 #define PT_PDPE_LEVEL 3
  42 #define PT_DIRECTORY_LEVEL 2
  43 #define PT_PAGE_TABLE_LEVEL 1
  44
  45 #define PFERR_PRESENT_MASK (1U << 0)
  46 #define PFERR_WRITE_MASK (1U << 1)
  47 #define PFERR_USER_MASK (1U << 2)
  48 #define PFERR_RSVD_MASK (1U << 3)
  49 #define PFERR_FETCH_MASK (1U << 4)
  50
  51 int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4]);
  52 void kvm_mmu_set_mmio_spte_mask(u64 mmio_mask);
  53 int handle_mmio_page_fault_common(struct kvm_vcpu *vcpu, u64 addr, bool direct);
  54 int kvm_init_shadow_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *context);
  55
  56 static inline unsigned int kvm_mmu_available_pages(struct kvm *kvm)
  57 {
  58         return kvm->arch.n_max_mmu_pages -
  59                 kvm->arch.n_used_mmu_pages;
  60 }
  61
  62 static inline void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  63 {
  64         if (unlikely(kvm_mmu_available_pages(vcpu->kvm)< KVM_MIN_FREE_MMU_PAGES))
  65                 __kvm_mmu_free_some_pages(vcpu);
  66 }
  67
  68 static inline int kvm_mmu_reload(struct kvm_vcpu *vcpu)
  69 {
  70         if (likely(vcpu->arch.mmu.root_hpa != INVALID_PAGE))
  71                 return 0;
  72
  73         return kvm_mmu_load(vcpu);
  74 }
  75
  76 static inline int is_present_gpte(unsigned long pte)
  77 {
  78         return pte & PT_PRESENT_MASK;
  79 }
  80
  81 static inline int is_writable_pte(unsigned long pte)
  82 {
  83         return pte & PT_WRITABLE_MASK;
  84 }
  85
  86 static inline bool is_write_protection(struct kvm_vcpu *vcpu)
  87 {
  88         return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
  89 }
  90
  91 static inline bool check_write_user_access(struct kvm_vcpu *vcpu,
  92                                            bool write_fault, bool user_fault,
  93                                            unsigned long pte)
  94 {
  95         if (unlikely(write_fault && !is_writable_pte(pte)
  96               && (user_fault || is_write_protection(vcpu))))
  97                 return false;
  98
  99         if (unlikely(user_fault && !(pte & PT_USER_MASK)))
 100                 return false;
 101
 102         return true;
 103 }
 104 #endif