arch/arm/kernel/smp_scu.c

   1 /*
   2  *  linux/arch/arm/kernel/smp_scu.c
   3  *
   4  *  Copyright (C) 2002 ARM Ltd.
   5  *  All Rights Reserved
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11 #include <linux/init.h>
  12 #include <linux/io.h>
  13
  14 #include <asm/smp_scu.h>
  15 #include <asm/cacheflush.h>
  16 #include <asm/cputype.h>
  17
  18 #define SCU_CTRL                0x00
  19 #define SCU_CONFIG              0x04
  20 #define SCU_CPU_STATUS          0x08
  21 #define SCU_INVALIDATE          0x0c
  22 #define SCU_FPGA_REVISION       0x10
  23
  24 #ifdef CONFIG_SMP
  25 /*
  26  * Get the number of CPU cores from the SCU configuration
  27  */
  28 unsigned int __init scu_get_core_count(void __iomem *scu_base)
  29 {
  30         unsigned int ncores = __raw_readl(scu_base + SCU_CONFIG);
  31         return (ncores & 0x03) + 1;
  32 }
  33
  34 /*
  35  * Enable the SCU
  36  */
  37 void __init scu_enable(void __iomem *scu_base)
  38 {
  39         u32 scu_ctrl;
  40
  41 #ifdef CONFIG_ARM_ERRATA_764369
  42         /* Cortex-A9 only */
  43         if ((read_cpuid(CPUID_ID) & 0xff0ffff0) == 0x410fc090) {
  44                 scu_ctrl = __raw_readl(scu_base + 0x30);
  45                 if (!(scu_ctrl & 1))
  46                         __raw_writel(scu_ctrl | 0x1, scu_base + 0x30);
  47         }
  48 #endif
  49
  50         scu_ctrl = __raw_readl(scu_base + SCU_CTRL);
  51         /* already enabled? */
  52         if (scu_ctrl & 1)
  53                 return;
  54
  55         scu_ctrl |= 1;
  56         __raw_writel(scu_ctrl, scu_base + SCU_CTRL);
  57
  58         /*
  59          * Ensure that the data accessed by CPU0 before the SCU was
  60          * initialised is visible to the other CPUs.
  61          */
  62         flush_cache_all();
  63 }
  64 #endif
  65
  66 /*
  67  * Set the executing CPUs power mode as defined.  This will be in
  68  * preparation for it executing a WFI instruction.
  69  *
  70  * This function must be called with preemption disabled, and as it
  71  * has the side effect of disabling coherency, caches must have been
  72  * flushed.  Interrupts must also have been disabled.
  73  */
  74 int scu_power_mode(void __iomem *scu_base, unsigned int mode)
  75 {
  76         unsigned int val;
  77         int cpu = smp_processor_id();
  78
  79         if (mode > 3 || mode == 1 || cpu > 3)
  80                 return -EINVAL;
  81
  82         val = __raw_readb(scu_base + SCU_CPU_STATUS + cpu) & ~0x03;
  83         val |= mode;
  84         __raw_writeb(val, scu_base + SCU_CPU_STATUS + cpu);
  85
  86         return 0;
  87 }