arch/arm/mach-s3c64xx/mach-crag6410.c

   1 /* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
   2  *
   3  * Copyright 2011 Wolfson Microelectronics plc
   4  *      Mark Brown <broonie@opensource.wolfsonmicro.com>
   5  *
   6  * Copyright 2011 Simtec Electronics
   7  *      Ben Dooks <ben@simtec.co.uk>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/kernel.h>
  15 #include <linux/list.h>
  16 #include <linux/serial_core.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/fb.h>
  19 #include <linux/io.h>
  20 #include <linux/init.h>
  21 #include <linux/gpio.h>
  22 #include <linux/delay.h>
  23 #include <linux/regulator/machine.h>
  24 #include <linux/regulator/fixed.h>
  25 #include <linux/pwm_backlight.h>
  26 #include <linux/dm9000.h>
  27 #include <linux/gpio_keys.h>
  28 #include <linux/basic_mmio_gpio.h>
  29 #include <linux/spi/spi.h>
  30
  31 #include <linux/i2c/pca953x.h>
  32
  33 #include <video/platform_lcd.h>
  34
  35 #include <linux/mfd/wm831x/core.h>
  36 #include <linux/mfd/wm831x/pdata.h>
  37 #include <linux/mfd/wm831x/irq.h>
  38 #include <linux/mfd/wm831x/gpio.h>
  39
  40 #include <asm/mach/arch.h>
  41 #include <asm/mach-types.h>
  42
  43 #include <mach/hardware.h>
  44 #include <mach/map.h>
  45
  46 #include <mach/s3c6410.h>
  47 #include <mach/regs-sys.h>
  48 #include <mach/regs-gpio.h>
  49 #include <mach/regs-modem.h>
  50
  51 #include <mach/regs-gpio-memport.h>
  52
  53 #include <plat/regs-serial.h>
  54 #include <plat/regs-fb-v4.h>
  55 #include <plat/fb.h>
  56 #include <plat/sdhci.h>
  57 #include <plat/gpio-cfg.h>
  58 #include <plat/s3c64xx-spi.h>
  59
  60 #include <plat/keypad.h>
  61 #include <plat/clock.h>
  62 #include <plat/devs.h>
  63 #include <plat/cpu.h>
  64 #include <plat/adc.h>
  65 #include <plat/iic.h>
  66 #include <plat/pm.h>
  67
  68 #include <sound/wm8996.h>
  69 #include <sound/wm8962.h>
  70 #include <sound/wm9081.h>
  71
  72 #define BANFF_PMIC_IRQ_BASE             IRQ_BOARD_START
  73 #define GLENFARCLAS_PMIC_IRQ_BASE       (IRQ_BOARD_START + 64)
  74
  75 #define PCA935X_GPIO_BASE               GPIO_BOARD_START
  76 #define CODEC_GPIO_BASE         (GPIO_BOARD_START + 8)
  77 #define GLENFARCLAS_PMIC_GPIO_BASE      (GPIO_BOARD_START + 16)
  78
  79 /* serial port setup */
  80
  81 #define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
  82 #define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
  83 #define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)
  84
  85 static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
  86         [0] = {
  87                 .hwport         = 0,
  88                 .flags          = 0,
  89                 .ucon           = UCON,
  90                 .ulcon          = ULCON,
  91                 .ufcon          = UFCON,
  92         },
  93         [1] = {
  94                 .hwport         = 1,
  95                 .flags          = 0,
  96                 .ucon           = UCON,
  97                 .ulcon          = ULCON,
  98                 .ufcon          = UFCON,
  99         },
 100         [2] = {
 101                 .hwport         = 2,
 102                 .flags          = 0,
 103                 .ucon           = UCON,
 104                 .ulcon          = ULCON,
 105                 .ufcon          = UFCON,
 106         },
 107         [3] = {
 108                 .hwport         = 3,
 109                 .flags          = 0,
 110                 .ucon           = UCON,
 111                 .ulcon          = ULCON,
 112                 .ufcon          = UFCON,
 113         },
 114 };
 115
 116 static struct platform_pwm_backlight_data crag6410_backlight_data = {
 117         .pwm_id         = 0,
 118         .max_brightness = 1000,
 119         .dft_brightness = 600,
 120         .pwm_period_ns  = 100000,       /* about 1kHz */
 121 };
 122
 123 static struct platform_device crag6410_backlight_device = {
 124         .name           = "pwm-backlight",
 125         .id             = -1,
 126         .dev            = {
 127                 .parent = &s3c_device_timer[0].dev,
 128                 .platform_data = &crag6410_backlight_data,
 129         },
 130 };
 131
 132 static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
 133 {
 134         pr_debug("%s: setting power %d\n", __func__, power);
 135
 136         if (power) {
 137                 gpio_set_value(S3C64XX_GPB(0), 1);
 138                 msleep(1);
 139                 s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
 140         } else {
 141                 gpio_direction_output(S3C64XX_GPF(14), 0);
 142                 gpio_set_value(S3C64XX_GPB(0), 0);
 143         }
 144 }
 145
 146 static struct platform_device crag6410_lcd_powerdev = {
 147         .name                   = "platform-lcd",
 148         .id                     = -1,
 149         .dev.parent             = &s3c_device_fb.dev,
 150         .dev.platform_data      = &(struct plat_lcd_data) {
 151                 .set_power      = crag6410_lcd_power_set,
 152         },
 153 };
 154
 155 /* 640x480 URT */
 156 static struct s3c_fb_pd_win crag6410_fb_win0 = {
 157         /* this is to ensure we use win0 */
 158         .win_mode       = {
 159                 .left_margin    = 150,
 160                 .right_margin   = 80,
 161                 .upper_margin   = 40,
 162                 .lower_margin   = 5,
 163                 .hsync_len      = 40,
 164                 .vsync_len      = 5,
 165                 .xres           = 640,
 166                 .yres           = 480,
 167         },
 168         .max_bpp        = 32,
 169         .default_bpp    = 16,
 170         .virtual_y      = 480 * 2,
 171         .virtual_x      = 640,
 172 };
 173
 174 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
 175 static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
 176         .setup_gpio     = s3c64xx_fb_gpio_setup_24bpp,
 177         .win[0]         = &crag6410_fb_win0,
 178         .vidcon0        = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
 179         .vidcon1        = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
 180 };
 181
 182 /* 2x6 keypad */
 183
 184 static uint32_t crag6410_keymap[] __initdata = {
 185         /* KEY(row, col, keycode) */
 186         KEY(0, 0, KEY_VOLUMEUP),
 187         KEY(0, 1, KEY_HOME),
 188         KEY(0, 2, KEY_VOLUMEDOWN),
 189         KEY(0, 3, KEY_HELP),
 190         KEY(0, 4, KEY_MENU),
 191         KEY(0, 5, KEY_MEDIA),
 192         KEY(1, 0, 232),
 193         KEY(1, 1, KEY_DOWN),
 194         KEY(1, 2, KEY_LEFT),
 195         KEY(1, 3, KEY_UP),
 196         KEY(1, 4, KEY_RIGHT),
 197         KEY(1, 5, KEY_CAMERA),
 198 };
 199
 200 static struct matrix_keymap_data crag6410_keymap_data __initdata = {
 201         .keymap         = crag6410_keymap,
 202         .keymap_size    = ARRAY_SIZE(crag6410_keymap),
 203 };
 204
 205 static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
 206         .keymap_data    = &crag6410_keymap_data,
 207         .rows           = 2,
 208         .cols           = 6,
 209 };
 210
 211 static struct gpio_keys_button crag6410_gpio_keys[] = {
 212         [0] = {
 213                 .code   = KEY_SUSPEND,
 214                 .gpio   = S3C64XX_GPL(10),      /* EINT 18 */
 215                 .type   = EV_KEY,
 216                 .wakeup = 1,
 217                 .active_low = 1,
 218         },
 219         [1] = {
 220                 .code   = SW_FRONT_PROXIMITY,
 221                 .gpio   = S3C64XX_GPN(11),      /* EINT 11 */
 222                 .type   = EV_SW,
 223         },
 224 };
 225
 226 static struct gpio_keys_platform_data crag6410_gpio_keydata = {
 227         .buttons        = crag6410_gpio_keys,
 228         .nbuttons       = ARRAY_SIZE(crag6410_gpio_keys),
 229 };
 230
 231 static struct platform_device crag6410_gpio_keydev = {
 232         .name           = "gpio-keys",
 233         .id             = 0,
 234         .dev.platform_data = &crag6410_gpio_keydata,
 235 };
 236
 237 static struct resource crag6410_dm9k_resource[] = {
 238         [0] = {
 239                 .start  = S3C64XX_PA_XM0CSN5,
 240                 .end    = S3C64XX_PA_XM0CSN5 + 1,
 241                 .flags  = IORESOURCE_MEM,
 242         },
 243         [1] = {
 244                 .start  = S3C64XX_PA_XM0CSN5 + (1 << 8),
 245                 .end    = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
 246                 .flags  = IORESOURCE_MEM,
 247         },
 248         [2] = {
 249                 .start  = S3C_EINT(17),
 250                 .end    = S3C_EINT(17),
 251                 .flags  = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
 252         },
 253 };
 254
 255 static struct dm9000_plat_data mini6410_dm9k_pdata = {
 256         .flags  = DM9000_PLATF_16BITONLY,
 257 };
 258
 259 static struct platform_device crag6410_dm9k_device = {
 260         .name           = "dm9000",
 261         .id             = -1,
 262         .num_resources  = ARRAY_SIZE(crag6410_dm9k_resource),
 263         .resource       = crag6410_dm9k_resource,
 264         .dev.platform_data = &mini6410_dm9k_pdata,
 265 };
 266
 267 static struct resource crag6410_mmgpio_resource[] = {
 268         [0] = {
 269                 .start  = S3C64XX_PA_XM0CSN4 + 1,
 270                 .end    = S3C64XX_PA_XM0CSN4 + 1,
 271                 .flags  = IORESOURCE_MEM,
 272         },
 273 };
 274
 275 static struct platform_device crag6410_mmgpio = {
 276         .name           = "basic-mmio-gpio",
 277         .id             = -1,
 278         .resource       = crag6410_mmgpio_resource,
 279         .num_resources  = ARRAY_SIZE(crag6410_mmgpio_resource),
 280         .dev.platform_data = &(struct bgpio_pdata) {
 281                 .base   = -1,
 282         },
 283 };
 284
 285 static struct platform_device speyside_device = {
 286         .name           = "speyside",
 287         .id             = -1,
 288 };
 289
 290 static struct platform_device speyside_wm8962_device = {
 291         .name           = "speyside-wm8962",
 292         .id             = -1,
 293 };
 294
 295 static struct regulator_consumer_supply wallvdd_consumers[] = {
 296         REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
 297         REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
 298 };
 299
 300 static struct regulator_init_data wallvdd_data = {
 301         .constraints = {
 302                 .always_on = 1,
 303         },
 304         .num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
 305         .consumer_supplies = wallvdd_consumers,
 306 };
 307
 308 static struct fixed_voltage_config wallvdd_pdata = {
 309         .supply_name = "WALLVDD",
 310         .microvolts = 5000000,
 311         .init_data = &wallvdd_data,
 312         .gpio = -EINVAL,
 313 };
 314
 315 static struct platform_device wallvdd_device = {
 316         .name           = "reg-fixed-voltage",
 317         .id             = -1,
 318         .dev = {
 319                 .platform_data = &wallvdd_pdata,
 320         },
 321 };
 322
 323 static struct platform_device *crag6410_devices[] __initdata = {
 324         &s3c_device_hsmmc0,
 325         &s3c_device_hsmmc1,
 326         &s3c_device_hsmmc2,
 327         &s3c_device_i2c0,
 328         &s3c_device_i2c1,
 329         &s3c_device_fb,
 330         &s3c_device_ohci,
 331         &s3c_device_usb_hsotg,
 332         &s3c_device_adc,
 333         &s3c_device_rtc,
 334         &s3c_device_ts,
 335         &s3c_device_timer[0],
 336         &s3c64xx_device_iis0,
 337         &s3c64xx_device_iis1,
 338         &samsung_asoc_dma,
 339         &samsung_device_keypad,
 340         &crag6410_gpio_keydev,
 341         &crag6410_dm9k_device,
 342         &s3c64xx_device_spi0,
 343         &crag6410_mmgpio,
 344         &crag6410_lcd_powerdev,
 345         &crag6410_backlight_device,
 346         &speyside_device,
 347         &speyside_wm8962_device,
 348         &wallvdd_device,
 349 };
 350
 351 static struct pca953x_platform_data crag6410_pca_data = {
 352         .gpio_base      = PCA935X_GPIO_BASE,
 353         .irq_base       = 0,
 354 };
 355
 356 static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
 357         REGULATOR_SUPPLY("vddarm", NULL),
 358 };
 359
 360 static struct regulator_init_data vddarm __initdata = {
 361         .constraints = {
 362                 .name = "VDDARM",
 363                 .min_uV = 1000000,
 364                 .max_uV = 1300000,
 365                 .always_on = 1,
 366                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
 367         },
 368         .num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
 369         .consumer_supplies = vddarm_consumers,
 370         .supply_regulator = "WALLVDD",
 371 };
 372
 373 static struct regulator_init_data vddint __initdata = {
 374         .constraints = {
 375                 .name = "VDDINT",
 376                 .min_uV = 1000000,
 377                 .max_uV = 1200000,
 378                 .always_on = 1,
 379                 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
 380         },
 381 };
 382
 383 static struct regulator_init_data vddmem __initdata = {
 384         .constraints = {
 385                 .name = "VDDMEM",
 386                 .always_on = 1,
 387         },
 388 };
 389
 390 static struct regulator_init_data vddsys __initdata = {
 391         .constraints = {
 392                 .name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
 393                 .always_on = 1,
 394         },
 395 };
 396
 397 static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
 398         REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
 399         REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
 400         REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
 401 };
 402
 403 static struct regulator_init_data vddmmc __initdata = {
 404         .constraints = {
 405                 .name = "VDDMMC,UH",
 406                 .always_on = 1,
 407         },
 408         .num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
 409         .consumer_supplies = vddmmc_consumers,
 410         .supply_regulator = "WALLVDD",
 411 };
 412
 413 static struct regulator_init_data vddotgi __initdata = {
 414         .constraints = {
 415                 .name = "VDDOTGi",
 416                 .always_on = 1,
 417         },
 418         .supply_regulator = "WALLVDD",
 419 };
 420
 421 static struct regulator_init_data vddotg __initdata = {
 422         .constraints = {
 423                 .name = "VDDOTG",
 424                 .always_on = 1,
 425         },
 426         .supply_regulator = "WALLVDD",
 427 };
 428
 429 static struct regulator_init_data vddhi __initdata = {
 430         .constraints = {
 431                 .name = "VDDHI",
 432                 .always_on = 1,
 433         },
 434         .supply_regulator = "WALLVDD",
 435 };
 436
 437 static struct regulator_init_data vddadc __initdata = {
 438         .constraints = {
 439                 .name = "VDDADC,VDDDAC",
 440                 .always_on = 1,
 441         },
 442         .supply_regulator = "WALLVDD",
 443 };
 444
 445 static struct regulator_init_data vddmem0 __initdata = {
 446         .constraints = {
 447                 .name = "VDDMEM0",
 448                 .always_on = 1,
 449         },
 450         .supply_regulator = "WALLVDD",
 451 };
 452
 453 static struct regulator_init_data vddpll __initdata = {
 454         .constraints = {
 455                 .name = "VDDPLL",
 456                 .always_on = 1,
 457         },
 458         .supply_regulator = "WALLVDD",
 459 };
 460
 461 static struct regulator_init_data vddlcd __initdata = {
 462         .constraints = {
 463                 .name = "VDDLCD",
 464                 .always_on = 1,
 465         },
 466         .supply_regulator = "WALLVDD",
 467 };
 468
 469 static struct regulator_init_data vddalive __initdata = {
 470         .constraints = {
 471                 .name = "VDDALIVE",
 472                 .always_on = 1,
 473         },
 474         .supply_regulator = "WALLVDD",
 475 };
 476
 477 static struct wm831x_backup_pdata banff_backup_pdata __initdata = {
 478         .charger_enable = 1,
 479         .vlim = 2500,  /* mV */
 480         .ilim = 200,   /* uA */
 481 };
 482
 483 static struct wm831x_status_pdata banff_red_led __initdata = {
 484         .name = "banff:red:",
 485         .default_src = WM831X_STATUS_MANUAL,
 486 };
 487
 488 static struct wm831x_status_pdata banff_green_led __initdata = {
 489         .name = "banff:green:",
 490         .default_src = WM831X_STATUS_MANUAL,
 491 };
 492
 493 static struct wm831x_touch_pdata touch_pdata __initdata = {
 494         .data_irq = S3C_EINT(26),
 495         .pd_irq = S3C_EINT(27),
 496 };
 497
 498 static struct wm831x_pdata crag_pmic_pdata __initdata = {
 499         .wm831x_num = 1,
 500         .irq_base = BANFF_PMIC_IRQ_BASE,
 501         .gpio_base = GPIO_BOARD_START + 8,
 502
 503         .backup = &banff_backup_pdata,
 504
 505         .gpio_defaults = {
 506                 /* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
 507                 [10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
 508                 /* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
 509                 [11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
 510         },
 511
 512         .dcdc = {
 513                 &vddarm,  /* DCDC1 */
 514                 &vddint,  /* DCDC2 */
 515                 &vddmem,  /* DCDC3 */
 516         },
 517
 518         .ldo = {
 519                 &vddsys,   /* LDO1 */
 520                 &vddmmc,   /* LDO2 */
 521                 NULL,      /* LDO3 */
 522                 &vddotgi,  /* LDO4 */
 523                 &vddotg,   /* LDO5 */
 524                 &vddhi,    /* LDO6 */
 525                 &vddadc,   /* LDO7 */
 526                 &vddmem0,  /* LDO8 */
 527                 &vddpll,   /* LDO9 */
 528                 &vddlcd,   /* LDO10 */
 529                 &vddalive, /* LDO11 */
 530         },
 531
 532         .status = {
 533                 &banff_green_led,
 534                 &banff_red_led,
 535         },
 536
 537         .touch = &touch_pdata,
 538 };
 539
 540 static struct i2c_board_info i2c_devs0[] __initdata = {
 541         { I2C_BOARD_INFO("24c08", 0x50), },
 542         { I2C_BOARD_INFO("tca6408", 0x20),
 543           .platform_data = &crag6410_pca_data,
 544         },
 545         { I2C_BOARD_INFO("wm8312", 0x34),
 546           .platform_data = &crag_pmic_pdata,
 547           .irq = S3C_EINT(23),
 548         },
 549 };
 550
 551 static struct s3c2410_platform_i2c i2c0_pdata = {
 552         .frequency = 400000,
 553 };
 554
 555 static struct regulator_init_data pvdd_1v2 __initdata = {
 556         .constraints = {
 557                 .name = "PVDD_1V2",
 558                 .always_on = 1,
 559         },
 560 };
 561
 562 static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
 563         REGULATOR_SUPPLY("PLLVDD", "1-001a"),
 564         REGULATOR_SUPPLY("DBVDD", "1-001a"),
 565         REGULATOR_SUPPLY("CPVDD", "1-001a"),
 566         REGULATOR_SUPPLY("AVDD2", "1-001a"),
 567         REGULATOR_SUPPLY("DCVDD", "1-001a"),
 568         REGULATOR_SUPPLY("AVDD", "1-001a"),
 569 };
 570
 571 static struct regulator_init_data pvdd_1v8 __initdata = {
 572         .constraints = {
 573                 .name = "PVDD_1V8",
 574                 .always_on = 1,
 575         },
 576
 577         .consumer_supplies = pvdd_1v8_consumers,
 578         .num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
 579 };
 580
 581 static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
 582         REGULATOR_SUPPLY("MICVDD", "1-001a"),
 583         REGULATOR_SUPPLY("AVDD1", "1-001a"),
 584 };
 585
 586 static struct regulator_init_data pvdd_3v3 __initdata = {
 587         .constraints = {
 588                 .name = "PVDD_3V3",
 589                 .always_on = 1,
 590         },
 591
 592         .consumer_supplies = pvdd_3v3_consumers,
 593         .num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
 594 };
 595
 596 static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
 597         .wm831x_num = 2,
 598         .irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
 599         .gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
 600
 601         .gpio_defaults = {
 602                 /* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
 603                 [0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
 604                 [1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
 605                 [2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
 606         },
 607
 608         .dcdc = {
 609                 &pvdd_1v2,  /* DCDC1 */
 610                 &pvdd_1v8,  /* DCDC2 */
 611                 &pvdd_3v3,  /* DCDC3 */
 612         },
 613
 614         .disable_touch = true,
 615 };
 616
 617 static struct wm8996_retune_mobile_config wm8996_retune[] = {
 618         {
 619                 .name = "Sub LPF",
 620                 .rate = 48000,
 621                 .regs = {
 622                         0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
 623                         0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
 624                         0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
 625                 },
 626         },
 627         {
 628                 .name = "Sub HPF",
 629                 .rate = 48000,
 630                 .regs = {
 631                         0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
 632                         0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
 633                         0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
 634                 },
 635         },
 636 };
 637
 638 static struct wm8996_pdata wm8996_pdata __initdata = {
 639         .ldo_ena = S3C64XX_GPN(7),
 640         .gpio_base = CODEC_GPIO_BASE,
 641         .micdet_def = 1,
 642         .inl_mode = WM8996_DIFFERRENTIAL_1,
 643         .inr_mode = WM8996_DIFFERRENTIAL_1,
 644
 645         .irq_flags = IRQF_TRIGGER_RISING,
 646
 647         .gpio_default = {
 648                 0x8001, /* GPIO1 == ADCLRCLK1 */
 649                 0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */
 650                 0x0141, /* GPIO3 == HP_SEL */
 651                 0x0002, /* GPIO4 == IRQ */
 652                 0x020e, /* GPIO5 == CLKOUT */
 653         },
 654
 655         .retune_mobile_cfgs = wm8996_retune,
 656         .num_retune_mobile_cfgs = ARRAY_SIZE(wm8996_retune),
 657 };
 658
 659 static struct wm8962_pdata wm8962_pdata __initdata = {
 660         .gpio_init = {
 661                 0,
 662                 WM8962_GPIO_FN_OPCLK,
 663                 WM8962_GPIO_FN_DMICCLK,
 664                 0,
 665                 0x8000 | WM8962_GPIO_FN_DMICDAT,
 666                 WM8962_GPIO_FN_IRQ,    /* Open drain mode */
 667         },
 668         .irq_active_low = true,
 669 };
 670
 671 static struct wm9081_pdata wm9081_pdata __initdata = {
 672         .irq_high = false,
 673         .irq_cmos = false,
 674 };
 675
 676 static struct i2c_board_info i2c_devs1[] __initdata = {
 677         { I2C_BOARD_INFO("wm8311", 0x34),
 678           .irq = S3C_EINT(0),
 679           .platform_data = &glenfarclas_pmic_pdata },
 680
 681         { I2C_BOARD_INFO("wm1250-ev1", 0x27) },
 682         { I2C_BOARD_INFO("wm8996", 0x1a),
 683           .platform_data = &wm8996_pdata,
 684           .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
 685         },
 686         { I2C_BOARD_INFO("wm9081", 0x6c),
 687           .platform_data = &wm9081_pdata, },
 688         { I2C_BOARD_INFO("wm8962", 0x1a),
 689           .platform_data = &wm8962_pdata,
 690           .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
 691         },
 692 };
 693
 694 static void __init crag6410_map_io(void)
 695 {
 696         s3c64xx_init_io(NULL, 0);
 697         s3c24xx_init_clocks(12000000);
 698         s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
 699
 700         /* LCD type and Bypass set by bootloader */
 701 }
 702
 703 static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
 704         .max_width              = 4,
 705         .cd_type                = S3C_SDHCI_CD_PERMANENT,
 706 };
 707
 708 static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
 709         .max_width              = 4,
 710         .cd_type                = S3C_SDHCI_CD_GPIO,
 711         .ext_cd_gpio            = S3C64XX_GPF(11),
 712 };
 713
 714 static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
 715 {
 716         /* Set all the necessary GPG pins to special-function 2 */
 717         s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
 718
 719         /* force card-detected for prototype 0 */
 720         s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
 721 }
 722
 723 static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
 724         .max_width              = 4,
 725         .cd_type                = S3C_SDHCI_CD_INTERNAL,
 726         .cfg_gpio               = crag6410_cfg_sdhci0,
 727 };
 728
 729 static void __init crag6410_machine_init(void)
 730 {
 731         /* Open drain IRQs need pullups */
 732         s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
 733         s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
 734
 735         gpio_request(S3C64XX_GPB(0), "LCD power");
 736         gpio_direction_output(S3C64XX_GPB(0), 0);
 737
 738         gpio_request(S3C64XX_GPF(14), "LCD PWM");
 739         gpio_direction_output(S3C64XX_GPF(14), 0);  /* turn off */
 740
 741         gpio_request(S3C64XX_GPB(1), "SD power");
 742         gpio_direction_output(S3C64XX_GPB(1), 0);
 743
 744         gpio_request(S3C64XX_GPF(10), "nRESETSEL");
 745         gpio_direction_output(S3C64XX_GPF(10), 1);
 746
 747         s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
 748         s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
 749         s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
 750
 751         s3c_i2c0_set_platdata(&i2c0_pdata);
 752         s3c_i2c1_set_platdata(NULL);
 753         s3c_fb_set_platdata(&crag6410_lcd_pdata);
 754
 755         i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
 756         i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
 757
 758         samsung_keypad_set_platdata(&crag6410_keypad_data);
 759
 760         platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
 761
 762         regulator_has_full_constraints();
 763
 764         s3c_pm_init();
 765 }
 766
 767 MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
 768         /* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
 769         .boot_params    = S3C64XX_PA_SDRAM + 0x100,
 770         .init_irq       = s3c6410_init_irq,
 771         .map_io         = crag6410_map_io,
 772         .init_machine   = crag6410_machine_init,
 773         .timer          = &s3c24xx_timer,
 774 MACHINE_END