ARM: tegra: fix compilation error due to mach/hardware.h removal
[linux-btrfs-devel.git] / arch / arm / plat-omap / io.c
blobf1ecfa9fc61d3c4c45a6a145d43bfa202af37176
1 /*
2 * Common io.c file
3 * This file is created by Russell King <rmk+kernel@arm.linux.org.uk>
5 * Copyright (C) 2009 Texas Instruments
6 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 #include <linux/module.h>
13 #include <linux/io.h>
14 #include <linux/mm.h>
16 #include <plat/omap7xx.h>
17 #include <plat/omap1510.h>
18 #include <plat/omap16xx.h>
19 #include <plat/omap24xx.h>
20 #include <plat/omap34xx.h>
21 #include <plat/omap44xx.h>
23 #define BETWEEN(p,st,sz) ((p) >= (st) && (p) < ((st) + (sz)))
24 #define XLATE(p,pst,vst) ((void __iomem *)((p) - (pst) + (vst)))
27 * Intercept ioremap() requests for addresses in our fixed mapping regions.
29 void __iomem *omap_ioremap(unsigned long p, size_t size, unsigned int type)
31 #ifdef CONFIG_ARCH_OMAP1
32 if (cpu_class_is_omap1()) {
33 if (BETWEEN(p, OMAP1_IO_PHYS, OMAP1_IO_SIZE))
34 return XLATE(p, OMAP1_IO_PHYS, OMAP1_IO_VIRT);
36 if (cpu_is_omap7xx()) {
37 if (BETWEEN(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_SIZE))
38 return XLATE(p, OMAP7XX_DSP_BASE, OMAP7XX_DSP_START);
40 if (BETWEEN(p, OMAP7XX_DSPREG_BASE, OMAP7XX_DSPREG_SIZE))
41 return XLATE(p, OMAP7XX_DSPREG_BASE,
42 OMAP7XX_DSPREG_START);
44 if (cpu_is_omap15xx()) {
45 if (BETWEEN(p, OMAP1510_DSP_BASE, OMAP1510_DSP_SIZE))
46 return XLATE(p, OMAP1510_DSP_BASE, OMAP1510_DSP_START);
48 if (BETWEEN(p, OMAP1510_DSPREG_BASE, OMAP1510_DSPREG_SIZE))
49 return XLATE(p, OMAP1510_DSPREG_BASE,
50 OMAP1510_DSPREG_START);
52 if (cpu_is_omap16xx()) {
53 if (BETWEEN(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_SIZE))
54 return XLATE(p, OMAP16XX_DSP_BASE, OMAP16XX_DSP_START);
56 if (BETWEEN(p, OMAP16XX_DSPREG_BASE, OMAP16XX_DSPREG_SIZE))
57 return XLATE(p, OMAP16XX_DSPREG_BASE,
58 OMAP16XX_DSPREG_START);
60 #endif
61 #ifdef CONFIG_ARCH_OMAP2
62 if (cpu_is_omap24xx()) {
63 if (BETWEEN(p, L3_24XX_PHYS, L3_24XX_SIZE))
64 return XLATE(p, L3_24XX_PHYS, L3_24XX_VIRT);
65 if (BETWEEN(p, L4_24XX_PHYS, L4_24XX_SIZE))
66 return XLATE(p, L4_24XX_PHYS, L4_24XX_VIRT);
68 if (cpu_is_omap2420()) {
69 if (BETWEEN(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_SIZE))
70 return XLATE(p, DSP_MEM_2420_PHYS, DSP_MEM_2420_VIRT);
71 if (BETWEEN(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE))
72 return XLATE(p, DSP_IPI_2420_PHYS, DSP_IPI_2420_SIZE);
73 if (BETWEEN(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_SIZE))
74 return XLATE(p, DSP_MMU_2420_PHYS, DSP_MMU_2420_VIRT);
76 if (cpu_is_omap2430()) {
77 if (BETWEEN(p, L4_WK_243X_PHYS, L4_WK_243X_SIZE))
78 return XLATE(p, L4_WK_243X_PHYS, L4_WK_243X_VIRT);
79 if (BETWEEN(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_SIZE))
80 return XLATE(p, OMAP243X_GPMC_PHYS, OMAP243X_GPMC_VIRT);
81 if (BETWEEN(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_SIZE))
82 return XLATE(p, OMAP243X_SDRC_PHYS, OMAP243X_SDRC_VIRT);
83 if (BETWEEN(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_SIZE))
84 return XLATE(p, OMAP243X_SMS_PHYS, OMAP243X_SMS_VIRT);
86 #endif
87 #ifdef CONFIG_ARCH_OMAP3
88 if (cpu_is_ti816x()) {
89 if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
90 return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
91 } else if (cpu_is_omap34xx()) {
92 if (BETWEEN(p, L3_34XX_PHYS, L3_34XX_SIZE))
93 return XLATE(p, L3_34XX_PHYS, L3_34XX_VIRT);
94 if (BETWEEN(p, L4_34XX_PHYS, L4_34XX_SIZE))
95 return XLATE(p, L4_34XX_PHYS, L4_34XX_VIRT);
96 if (BETWEEN(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_SIZE))
97 return XLATE(p, OMAP34XX_GPMC_PHYS, OMAP34XX_GPMC_VIRT);
98 if (BETWEEN(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_SIZE))
99 return XLATE(p, OMAP343X_SMS_PHYS, OMAP343X_SMS_VIRT);
100 if (BETWEEN(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_SIZE))
101 return XLATE(p, OMAP343X_SDRC_PHYS, OMAP343X_SDRC_VIRT);
102 if (BETWEEN(p, L4_PER_34XX_PHYS, L4_PER_34XX_SIZE))
103 return XLATE(p, L4_PER_34XX_PHYS, L4_PER_34XX_VIRT);
104 if (BETWEEN(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_SIZE))
105 return XLATE(p, L4_EMU_34XX_PHYS, L4_EMU_34XX_VIRT);
107 #endif
108 #ifdef CONFIG_ARCH_OMAP4
109 if (cpu_is_omap44xx()) {
110 if (BETWEEN(p, L3_44XX_PHYS, L3_44XX_SIZE))
111 return XLATE(p, L3_44XX_PHYS, L3_44XX_VIRT);
112 if (BETWEEN(p, L4_44XX_PHYS, L4_44XX_SIZE))
113 return XLATE(p, L4_44XX_PHYS, L4_44XX_VIRT);
114 if (BETWEEN(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_SIZE))
115 return XLATE(p, OMAP44XX_GPMC_PHYS, OMAP44XX_GPMC_VIRT);
116 if (BETWEEN(p, OMAP44XX_EMIF1_PHYS, OMAP44XX_EMIF1_SIZE))
117 return XLATE(p, OMAP44XX_EMIF1_PHYS, \
118 OMAP44XX_EMIF1_VIRT);
119 if (BETWEEN(p, OMAP44XX_EMIF2_PHYS, OMAP44XX_EMIF2_SIZE))
120 return XLATE(p, OMAP44XX_EMIF2_PHYS, \
121 OMAP44XX_EMIF2_VIRT);
122 if (BETWEEN(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_SIZE))
123 return XLATE(p, OMAP44XX_DMM_PHYS, OMAP44XX_DMM_VIRT);
124 if (BETWEEN(p, L4_PER_44XX_PHYS, L4_PER_44XX_SIZE))
125 return XLATE(p, L4_PER_44XX_PHYS, L4_PER_44XX_VIRT);
126 if (BETWEEN(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_SIZE))
127 return XLATE(p, L4_EMU_44XX_PHYS, L4_EMU_44XX_VIRT);
129 #endif
130 return __arm_ioremap_caller(p, size, type, __builtin_return_address(0));
132 EXPORT_SYMBOL(omap_ioremap);
134 void omap_iounmap(volatile void __iomem *addr)
136 unsigned long virt = (unsigned long)addr;
138 if (virt >= VMALLOC_START && virt < VMALLOC_END)
139 __iounmap(addr);
141 EXPORT_SYMBOL(omap_iounmap);