| blob | 713da07605389ffc3d9c4c137c01e268437581e1 |
1 /*
2 * arch/s390/kernel/entry64.S
3 * S390 low-level entry points.
4 *
5 * Copyright (C) IBM Corp. 1999,2010
6 * Author(s): Martin Schwidefsky (schwidefsky@de.ibm.com),
7 * Hartmut Penner (hp@de.ibm.com),
8 * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com),
9 * Heiko Carstens <heiko.carstens@de.ibm.com>
10 */
12 #include <linux/init.h>
13 #include <linux/linkage.h>
14 #include <asm/cache.h>
15 #include <asm/errno.h>
16 #include <asm/ptrace.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/unistd.h>
20 #include <asm/page.h>
22 /*
23 * Stack layout for the system_call stack entry.
24 * The first few entries are identical to the user_regs_struct.
25 */
26 SP_PTREGS = STACK_FRAME_OVERHEAD
27 SP_ARGS = STACK_FRAME_OVERHEAD + __PT_ARGS
28 SP_PSW = STACK_FRAME_OVERHEAD + __PT_PSW
29 SP_R0 = STACK_FRAME_OVERHEAD + __PT_GPRS
30 SP_R1 = STACK_FRAME_OVERHEAD + __PT_GPRS + 8
31 SP_R2 = STACK_FRAME_OVERHEAD + __PT_GPRS + 16
32 SP_R3 = STACK_FRAME_OVERHEAD + __PT_GPRS + 24
33 SP_R4 = STACK_FRAME_OVERHEAD + __PT_GPRS + 32
34 SP_R5 = STACK_FRAME_OVERHEAD + __PT_GPRS + 40
35 SP_R6 = STACK_FRAME_OVERHEAD + __PT_GPRS + 48
36 SP_R7 = STACK_FRAME_OVERHEAD + __PT_GPRS + 56
37 SP_R8 = STACK_FRAME_OVERHEAD + __PT_GPRS + 64
38 SP_R9 = STACK_FRAME_OVERHEAD + __PT_GPRS + 72
39 SP_R10 = STACK_FRAME_OVERHEAD + __PT_GPRS + 80
40 SP_R11 = STACK_FRAME_OVERHEAD + __PT_GPRS + 88
41 SP_R12 = STACK_FRAME_OVERHEAD + __PT_GPRS + 96
42 SP_R13 = STACK_FRAME_OVERHEAD + __PT_GPRS + 104
43 SP_R14 = STACK_FRAME_OVERHEAD + __PT_GPRS + 112
44 SP_R15 = STACK_FRAME_OVERHEAD + __PT_GPRS + 120
45 SP_ORIG_R2 = STACK_FRAME_OVERHEAD + __PT_ORIG_GPR2
46 SP_ILC = STACK_FRAME_OVERHEAD + __PT_ILC
47 SP_SVCNR = STACK_FRAME_OVERHEAD + __PT_SVCNR
48 SP_SIZE = STACK_FRAME_OVERHEAD + __PT_SIZE
50 STACK_SHIFT = PAGE_SHIFT + THREAD_ORDER
51 STACK_SIZE = 1 << STACK_SHIFT
53 _TIF_WORK_SVC = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
54 _TIF_MCCK_PENDING | _TIF_RESTART_SVC | _TIF_PER_TRAP )
55 _TIF_WORK_INT = (_TIF_SIGPENDING | _TIF_NOTIFY_RESUME | _TIF_NEED_RESCHED | \
56 _TIF_MCCK_PENDING)
57 _TIF_SYSCALL = (_TIF_SYSCALL_TRACE>>8 | _TIF_SYSCALL_AUDIT>>8 | \
58 _TIF_SECCOMP>>8 | _TIF_SYSCALL_TRACEPOINT>>8)
59 _TIF_EXIT_SIE = (_TIF_SIGPENDING | _TIF_NEED_RESCHED | _TIF_MCCK_PENDING)
61 #define BASED(name) name-system_call(%r13)
63 .macro SPP newpp
64 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
65 tm __LC_MACHINE_FLAGS+6,0x20 # MACHINE_FLAG_SPP
66 jz .+8
67 .insn s,0xb2800000,\newpp
68 #endif
69 .endm
71 .macro HANDLE_SIE_INTERCEPT
72 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
73 tm __TI_flags+6(%r12),_TIF_SIE>>8
74 jz 0f
75 SPP __LC_CMF_HPP # set host id
76 clc SP_PSW+8(8,%r15),BASED(.Lsie_loop)
77 jl 0f
78 clc SP_PSW+8(8,%r15),BASED(.Lsie_done)
79 jhe 0f
80 mvc SP_PSW+8(8,%r15),BASED(.Lsie_loop)
81 0:
82 #endif
83 .endm
85 #ifdef CONFIG_TRACE_IRQFLAGS
86 .macro TRACE_IRQS_ON
87 basr %r2,%r0
88 brasl %r14,trace_hardirqs_on_caller
89 .endm
91 .macro TRACE_IRQS_OFF
92 basr %r2,%r0
93 brasl %r14,trace_hardirqs_off_caller
94 .endm
95 #else
96 #define TRACE_IRQS_ON
97 #define TRACE_IRQS_OFF
98 #endif
100 #ifdef CONFIG_LOCKDEP
101 .macro LOCKDEP_SYS_EXIT
102 tm SP_PSW+1(%r15),0x01 # returning to user ?
103 jz 0f
104 brasl %r14,lockdep_sys_exit
105 0:
106 .endm
107 #else
108 #define LOCKDEP_SYS_EXIT
109 #endif
111 .macro UPDATE_VTIME lc_from,lc_to,lc_sum
112 lg %r10,\lc_from
113 slg %r10,\lc_to
114 alg %r10,\lc_sum
115 stg %r10,\lc_sum
116 .endm
118 /*
119 * Register usage in interrupt handlers:
120 * R9 - pointer to current task structure
121 * R13 - pointer to literal pool
122 * R14 - return register for function calls
123 * R15 - kernel stack pointer
124 */
126 .macro SAVE_ALL_SVC psworg,savearea
127 stmg %r11,%r15,\savearea
128 lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
129 aghi %r15,-SP_SIZE # make room for registers & psw
130 lg %r11,__LC_LAST_BREAK
131 .endm
133 .macro SAVE_ALL_PGM psworg,savearea
134 stmg %r11,%r15,\savearea
135 tm \psworg+1,0x01 # test problem state bit
136 #ifdef CONFIG_CHECK_STACK
137 jnz 1f
138 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
139 jnz 2f
140 la %r12,\psworg
141 j stack_overflow
142 #else
143 jz 2f
144 #endif
145 1: lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
146 2: aghi %r15,-SP_SIZE # make room for registers & psw
147 larl %r13,system_call
148 lg %r11,__LC_LAST_BREAK
149 .endm
151 .macro SAVE_ALL_ASYNC psworg,savearea
152 stmg %r11,%r15,\savearea
153 larl %r13,system_call
154 lg %r11,__LC_LAST_BREAK
155 la %r12,\psworg
156 tm \psworg+1,0x01 # test problem state bit
157 jnz 1f # from user -> load kernel stack
158 clc \psworg+8(8),BASED(.Lcritical_end)
159 jhe 0f
160 clc \psworg+8(8),BASED(.Lcritical_start)
161 jl 0f
162 brasl %r14,cleanup_critical
163 tm 1(%r12),0x01 # retest problem state after cleanup
164 jnz 1f
165 0: lg %r14,__LC_ASYNC_STACK # are we already on the async. stack ?
166 slgr %r14,%r15
167 srag %r14,%r14,STACK_SHIFT
168 #ifdef CONFIG_CHECK_STACK
169 jnz 1f
170 tml %r15,STACK_SIZE - CONFIG_STACK_GUARD
171 jnz 2f
172 j stack_overflow
173 #else
174 jz 2f
175 #endif
176 1: lg %r15,__LC_ASYNC_STACK # load async stack
177 2: aghi %r15,-SP_SIZE # make room for registers & psw
178 .endm
180 .macro CREATE_STACK_FRAME savearea
181 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
182 stg %r2,SP_ORIG_R2(%r15) # store original content of gpr 2
183 mvc SP_R11(40,%r15),\savearea # move %r11-%r15 to stack
184 stmg %r0,%r10,SP_R0(%r15) # store gprs %r0-%r10 to kernel stack
185 .endm
187 .macro RESTORE_ALL psworg,sync
188 mvc \psworg(16),SP_PSW(%r15) # move user PSW to lowcore
189 .if !\sync
190 ni \psworg+1,0xfd # clear wait state bit
191 .endif
192 lg %r14,__LC_VDSO_PER_CPU
193 lmg %r0,%r13,SP_R0(%r15) # load gprs 0-13 of user
194 stpt __LC_EXIT_TIMER
195 mvc __VDSO_ECTG_BASE(16,%r14),__LC_EXIT_TIMER
196 lmg %r14,%r15,SP_R14(%r15) # load grps 14-15 of user
197 lpswe \psworg # back to caller
198 .endm
200 .macro LAST_BREAK
201 srag %r10,%r11,23
202 jz 0f
203 stg %r11,__TI_last_break(%r12)
204 0:
205 .endm
207 .macro REENABLE_IRQS
208 mvc __SF_EMPTY(1,%r15),SP_PSW(%r15)
209 ni __SF_EMPTY(%r15),0xbf
210 ssm __SF_EMPTY(%r15)
211 .endm
213 .section .kprobes.text, "ax"
215 /*
216 * Scheduler resume function, called by switch_to
217 * gpr2 = (task_struct *) prev
218 * gpr3 = (task_struct *) next
219 * Returns:
220 * gpr2 = prev
221 */
222 ENTRY(__switch_to)
223 lg %r4,__THREAD_info(%r2) # get thread_info of prev
224 lg %r5,__THREAD_info(%r3) # get thread_info of next
225 tm __TI_flags+7(%r4),_TIF_MCCK_PENDING # machine check pending?
226 jz 0f
227 ni __TI_flags+7(%r4),255-_TIF_MCCK_PENDING # clear flag in prev
228 oi __TI_flags+7(%r5),_TIF_MCCK_PENDING # set it in next
229 0: stmg %r6,%r15,__SF_GPRS(%r15) # store gprs of prev task
230 stg %r15,__THREAD_ksp(%r2) # store kernel stack of prev
231 lg %r15,__THREAD_ksp(%r3) # load kernel stack of next
232 lctl %c4,%c4,__TASK_pid(%r3) # load pid to control reg. 4
233 lmg %r6,%r15,__SF_GPRS(%r15) # load gprs of next task
234 stg %r3,__LC_CURRENT # store task struct of next
235 mvc __LC_CURRENT_PID+4(4,%r0),__TASK_pid(%r3) # store pid of next
236 stg %r5,__LC_THREAD_INFO # store thread info of next
237 aghi %r5,STACK_SIZE # end of kernel stack of next
238 stg %r5,__LC_KERNEL_STACK # store end of kernel stack
239 br %r14
241 __critical_start:
242 /*
243 * SVC interrupt handler routine. System calls are synchronous events and
244 * are executed with interrupts enabled.
245 */
247 ENTRY(system_call)
248 stpt __LC_SYNC_ENTER_TIMER
249 sysc_saveall:
250 SAVE_ALL_SVC __LC_SVC_OLD_PSW,__LC_SAVE_AREA
251 CREATE_STACK_FRAME __LC_SAVE_AREA
252 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
253 mvc SP_ILC(4,%r15),__LC_SVC_ILC
254 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
255 sysc_vtime:
256 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
257 sysc_stime:
258 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
259 sysc_update:
260 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
261 LAST_BREAK
262 sysc_do_svc:
263 llgh %r7,SP_SVCNR(%r15)
264 slag %r7,%r7,2 # shift and test for svc 0
265 jnz sysc_nr_ok
266 # svc 0: system call number in %r1
267 llgfr %r1,%r1 # clear high word in r1
268 cghi %r1,NR_syscalls
269 jnl sysc_nr_ok
270 sth %r1,SP_SVCNR(%r15)
271 slag %r7,%r1,2 # shift and test for svc 0
272 sysc_nr_ok:
273 larl %r10,sys_call_table
274 #ifdef CONFIG_COMPAT
275 tm __TI_flags+5(%r12),(_TIF_31BIT>>16) # running in 31 bit mode ?
276 jno sysc_noemu
277 larl %r10,sys_call_table_emu # use 31 bit emulation system calls
278 sysc_noemu:
279 #endif
280 tm __TI_flags+6(%r12),_TIF_SYSCALL
281 mvc SP_ARGS(8,%r15),SP_R7(%r15)
282 lgf %r8,0(%r7,%r10) # load address of system call routine
283 jnz sysc_tracesys
284 basr %r14,%r8 # call sys_xxxx
285 stg %r2,SP_R2(%r15) # store return value (change R2 on stack)
287 sysc_return:
288 LOCKDEP_SYS_EXIT
289 sysc_tif:
290 tm __TI_flags+7(%r12),_TIF_WORK_SVC
291 jnz sysc_work # there is work to do (signals etc.)
292 sysc_restore:
293 RESTORE_ALL __LC_RETURN_PSW,1
294 sysc_done:
296 #
297 # There is work to do, but first we need to check if we return to userspace.
298 #
299 sysc_work:
300 tm SP_PSW+1(%r15),0x01 # returning to user ?
301 jno sysc_restore
303 #
304 # One of the work bits is on. Find out which one.
305 #
306 sysc_work_tif:
307 tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
308 jo sysc_mcck_pending
309 tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
310 jo sysc_reschedule
311 tm __TI_flags+7(%r12),_TIF_SIGPENDING
312 jo sysc_sigpending
313 tm __TI_flags+7(%r12),_TIF_NOTIFY_RESUME
314 jo sysc_notify_resume
315 tm __TI_flags+7(%r12),_TIF_RESTART_SVC
316 jo sysc_restart
317 tm __TI_flags+7(%r12),_TIF_PER_TRAP
318 jo sysc_singlestep
319 j sysc_return # beware of critical section cleanup
321 #
322 # _TIF_NEED_RESCHED is set, call schedule
323 #
324 sysc_reschedule:
325 larl %r14,sysc_return
326 jg schedule # return point is sysc_return
328 #
329 # _TIF_MCCK_PENDING is set, call handler
330 #
331 sysc_mcck_pending:
332 larl %r14,sysc_return
333 jg s390_handle_mcck # TIF bit will be cleared by handler
335 #
336 # _TIF_SIGPENDING is set, call do_signal
337 #
338 sysc_sigpending:
339 ni __TI_flags+7(%r12),255-_TIF_PER_TRAP # clear TIF_PER_TRAP
340 la %r2,SP_PTREGS(%r15) # load pt_regs
341 brasl %r14,do_signal # call do_signal
342 tm __TI_flags+7(%r12),_TIF_RESTART_SVC
343 jo sysc_restart
344 tm __TI_flags+7(%r12),_TIF_PER_TRAP
345 jo sysc_singlestep
346 j sysc_return
348 #
349 # _TIF_NOTIFY_RESUME is set, call do_notify_resume
350 #
351 sysc_notify_resume:
352 la %r2,SP_PTREGS(%r15) # load pt_regs
353 larl %r14,sysc_return
354 jg do_notify_resume # call do_notify_resume
356 #
357 # _TIF_RESTART_SVC is set, set up registers and restart svc
358 #
359 sysc_restart:
360 ni __TI_flags+7(%r12),255-_TIF_RESTART_SVC # clear TIF_RESTART_SVC
361 lg %r7,SP_R2(%r15) # load new svc number
362 mvc SP_R2(8,%r15),SP_ORIG_R2(%r15) # restore first argument
363 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
364 sth %r7,SP_SVCNR(%r15)
365 slag %r7,%r7,2
366 j sysc_nr_ok # restart svc
368 #
369 # _TIF_PER_TRAP is set, call do_per_trap
370 #
371 sysc_singlestep:
372 ni __TI_flags+7(%r12),255-_TIF_PER_TRAP # clear TIF_PER_TRAP
373 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
374 la %r2,SP_PTREGS(%r15) # address of register-save area
375 larl %r14,sysc_return # load adr. of system return
376 jg do_per_trap
378 #
379 # call tracehook_report_syscall_entry/tracehook_report_syscall_exit before
380 # and after the system call
381 #
382 sysc_tracesys:
383 la %r2,SP_PTREGS(%r15) # load pt_regs
384 la %r3,0
385 llgh %r0,SP_SVCNR(%r15)
386 stg %r0,SP_R2(%r15)
387 brasl %r14,do_syscall_trace_enter
388 lghi %r0,NR_syscalls
389 clgr %r0,%r2
390 jnh sysc_tracenogo
391 sllg %r7,%r2,2 # svc number *4
392 lgf %r8,0(%r7,%r10)
393 sysc_tracego:
394 lmg %r3,%r6,SP_R3(%r15)
395 mvc SP_ARGS(8,%r15),SP_R7(%r15)
396 lg %r2,SP_ORIG_R2(%r15)
397 basr %r14,%r8 # call sys_xxx
398 stg %r2,SP_R2(%r15) # store return value
399 sysc_tracenogo:
400 tm __TI_flags+6(%r12),_TIF_SYSCALL
401 jz sysc_return
402 la %r2,SP_PTREGS(%r15) # load pt_regs
403 larl %r14,sysc_return # return point is sysc_return
404 jg do_syscall_trace_exit
406 #
407 # a new process exits the kernel with ret_from_fork
408 #
409 ENTRY(ret_from_fork)
410 lg %r13,__LC_SVC_NEW_PSW+8
411 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
412 tm SP_PSW+1(%r15),0x01 # forking a kernel thread ?
413 jo 0f
414 stg %r15,SP_R15(%r15) # store stack pointer for new kthread
415 0: brasl %r14,schedule_tail
416 TRACE_IRQS_ON
417 stosm 24(%r15),0x03 # reenable interrupts
418 j sysc_tracenogo
420 #
421 # kernel_execve function needs to deal with pt_regs that is not
422 # at the usual place
423 #
424 ENTRY(kernel_execve)
425 stmg %r12,%r15,96(%r15)
426 lgr %r14,%r15
427 aghi %r15,-SP_SIZE
428 stg %r14,__SF_BACKCHAIN(%r15)
429 la %r12,SP_PTREGS(%r15)
430 xc 0(__PT_SIZE,%r12),0(%r12)
431 lgr %r5,%r12
432 brasl %r14,do_execve
433 ltgfr %r2,%r2
434 je 0f
435 aghi %r15,SP_SIZE
436 lmg %r12,%r15,96(%r15)
437 br %r14
438 # execve succeeded.
439 0: stnsm __SF_EMPTY(%r15),0xfc # disable interrupts
440 lg %r15,__LC_KERNEL_STACK # load ksp
441 aghi %r15,-SP_SIZE # make room for registers & psw
442 lg %r13,__LC_SVC_NEW_PSW+8
443 mvc SP_PTREGS(__PT_SIZE,%r15),0(%r12) # copy pt_regs
444 lg %r12,__LC_THREAD_INFO
445 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15)
446 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
447 brasl %r14,execve_tail
448 j sysc_return
450 /*
451 * Program check handler routine
452 */
454 ENTRY(pgm_check_handler)
455 /*
456 * First we need to check for a special case:
457 * Single stepping an instruction that disables the PER event mask will
458 * cause a PER event AFTER the mask has been set. Example: SVC or LPSW.
459 * For a single stepped SVC the program check handler gets control after
460 * the SVC new PSW has been loaded. But we want to execute the SVC first and
461 * then handle the PER event. Therefore we update the SVC old PSW to point
462 * to the pgm_check_handler and branch to the SVC handler after we checked
463 * if we have to load the kernel stack register.
464 * For every other possible cause for PER event without the PER mask set
465 * we just ignore the PER event (FIXME: is there anything we have to do
466 * for LPSW?).
467 */
468 stpt __LC_SYNC_ENTER_TIMER
469 tm __LC_PGM_INT_CODE+1,0x80 # check whether we got a per exception
470 jnz pgm_per # got per exception -> special case
471 SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
472 CREATE_STACK_FRAME __LC_SAVE_AREA
473 xc SP_ILC(4,%r15),SP_ILC(%r15)
474 mvc SP_PSW(16,%r15),__LC_PGM_OLD_PSW
475 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
476 HANDLE_SIE_INTERCEPT
477 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
478 jz pgm_no_vtime
479 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
480 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
481 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
482 LAST_BREAK
483 pgm_no_vtime:
484 stg %r11,SP_ARGS(%r15)
485 lgf %r3,__LC_PGM_ILC # load program interruption code
486 lg %r4,__LC_TRANS_EXC_CODE
487 REENABLE_IRQS
488 lghi %r8,0x7f
489 ngr %r8,%r3
490 sll %r8,3
491 larl %r1,pgm_check_table
492 lg %r1,0(%r8,%r1) # load address of handler routine
493 la %r2,SP_PTREGS(%r15) # address of register-save area
494 basr %r14,%r1 # branch to interrupt-handler
495 pgm_exit:
496 j sysc_return
498 #
499 # handle per exception
500 #
501 pgm_per:
502 tm __LC_PGM_OLD_PSW,0x40 # test if per event recording is on
503 jnz pgm_per_std # ok, normal per event from user space
504 # ok its one of the special cases, now we need to find out which one
505 clc __LC_PGM_OLD_PSW(16),__LC_SVC_NEW_PSW
506 je pgm_svcper
507 # no interesting special case, ignore PER event
508 lpswe __LC_PGM_OLD_PSW
510 #
511 # Normal per exception
512 #
513 pgm_per_std:
514 SAVE_ALL_PGM __LC_PGM_OLD_PSW,__LC_SAVE_AREA
515 CREATE_STACK_FRAME __LC_SAVE_AREA
516 mvc SP_PSW(16,%r15),__LC_PGM_OLD_PSW
517 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
518 HANDLE_SIE_INTERCEPT
519 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
520 jz pgm_no_vtime2
521 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
522 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
523 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
524 LAST_BREAK
525 pgm_no_vtime2:
526 lg %r1,__TI_task(%r12)
527 tm SP_PSW+1(%r15),0x01 # kernel per event ?
528 jz kernel_per
529 mvc __THREAD_per_cause(2,%r1),__LC_PER_CAUSE
530 mvc __THREAD_per_address(8,%r1),__LC_PER_ADDRESS
531 mvc __THREAD_per_paid(1,%r1),__LC_PER_PAID
532 oi __TI_flags+7(%r12),_TIF_PER_TRAP # set TIF_PER_TRAP
533 lgf %r3,__LC_PGM_ILC # load program interruption code
534 lg %r4,__LC_TRANS_EXC_CODE
535 REENABLE_IRQS
536 lghi %r8,0x7f
537 ngr %r8,%r3 # clear per-event-bit and ilc
538 je pgm_exit2
539 sll %r8,3
540 larl %r1,pgm_check_table
541 lg %r1,0(%r8,%r1) # load address of handler routine
542 la %r2,SP_PTREGS(%r15) # address of register-save area
543 basr %r14,%r1 # branch to interrupt-handler
544 pgm_exit2:
545 j sysc_return
547 #
548 # it was a single stepped SVC that is causing all the trouble
549 #
550 pgm_svcper:
551 SAVE_ALL_PGM __LC_SVC_OLD_PSW,__LC_SAVE_AREA
552 CREATE_STACK_FRAME __LC_SAVE_AREA
553 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
554 mvc SP_ILC(4,%r15),__LC_SVC_ILC
555 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
556 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
557 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
558 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
559 LAST_BREAK
560 lg %r8,__TI_task(%r12)
561 mvc __THREAD_per_cause(2,%r8),__LC_PER_CAUSE
562 mvc __THREAD_per_address(8,%r8),__LC_PER_ADDRESS
563 mvc __THREAD_per_paid(1,%r8),__LC_PER_PAID
564 oi __TI_flags+7(%r12),_TIF_PER_TRAP # set TIF_PER_TRAP
565 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
566 lmg %r2,%r6,SP_R2(%r15) # load svc arguments
567 j sysc_do_svc
569 #
570 # per was called from kernel, must be kprobes
571 #
572 kernel_per:
573 REENABLE_IRQS
574 xc SP_SVCNR(2,%r15),SP_SVCNR(%r15) # clear svc number
575 la %r2,SP_PTREGS(%r15) # address of register-save area
576 brasl %r14,do_per_trap
577 j pgm_exit
579 /*
580 * IO interrupt handler routine
581 */
582 ENTRY(io_int_handler)
583 stck __LC_INT_CLOCK
584 stpt __LC_ASYNC_ENTER_TIMER
585 SAVE_ALL_ASYNC __LC_IO_OLD_PSW,__LC_SAVE_AREA+40
586 CREATE_STACK_FRAME __LC_SAVE_AREA+40
587 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
588 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
589 HANDLE_SIE_INTERCEPT
590 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
591 jz io_no_vtime
592 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
593 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
594 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
595 LAST_BREAK
596 io_no_vtime:
597 TRACE_IRQS_OFF
598 la %r2,SP_PTREGS(%r15) # address of register-save area
599 brasl %r14,do_IRQ # call standard irq handler
600 io_return:
601 LOCKDEP_SYS_EXIT
602 TRACE_IRQS_ON
603 io_tif:
604 tm __TI_flags+7(%r12),_TIF_WORK_INT
605 jnz io_work # there is work to do (signals etc.)
606 io_restore:
607 RESTORE_ALL __LC_RETURN_PSW,0
608 io_done:
610 #
611 # There is work todo, find out in which context we have been interrupted:
612 # 1) if we return to user space we can do all _TIF_WORK_INT work
613 # 2) if we return to kernel code and kvm is enabled check if we need to
614 # modify the psw to leave SIE
615 # 3) if we return to kernel code and preemptive scheduling is enabled check
616 # the preemption counter and if it is zero call preempt_schedule_irq
617 # Before any work can be done, a switch to the kernel stack is required.
618 #
619 io_work:
620 tm SP_PSW+1(%r15),0x01 # returning to user ?
621 jo io_work_user # yes -> do resched & signal
622 #ifdef CONFIG_PREEMPT
623 # check for preemptive scheduling
624 icm %r0,15,__TI_precount(%r12)
625 jnz io_restore # preemption is disabled
626 tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
627 jno io_restore
628 # switch to kernel stack
629 lg %r1,SP_R15(%r15)
630 aghi %r1,-SP_SIZE
631 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
632 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
633 lgr %r15,%r1
634 # TRACE_IRQS_ON already done at io_return, call
635 # TRACE_IRQS_OFF to keep things symmetrical
636 TRACE_IRQS_OFF
637 brasl %r14,preempt_schedule_irq
638 j io_return
639 #else
640 j io_restore
641 #endif
643 #
644 # Need to do work before returning to userspace, switch to kernel stack
645 #
646 io_work_user:
647 lg %r1,__LC_KERNEL_STACK
648 aghi %r1,-SP_SIZE
649 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
650 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
651 lgr %r15,%r1
653 #
654 # One of the work bits is on. Find out which one.
655 # Checked are: _TIF_SIGPENDING, _TIF_NOTIFY_RESUME, _TIF_NEED_RESCHED
656 # and _TIF_MCCK_PENDING
657 #
658 io_work_tif:
659 tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
660 jo io_mcck_pending
661 tm __TI_flags+7(%r12),_TIF_NEED_RESCHED
662 jo io_reschedule
663 tm __TI_flags+7(%r12),_TIF_SIGPENDING
664 jo io_sigpending
665 tm __TI_flags+7(%r12),_TIF_NOTIFY_RESUME
666 jo io_notify_resume
667 j io_return # beware of critical section cleanup
669 #
670 # _TIF_MCCK_PENDING is set, call handler
671 #
672 io_mcck_pending:
673 # TRACE_IRQS_ON already done at io_return
674 brasl %r14,s390_handle_mcck # TIF bit will be cleared by handler
675 TRACE_IRQS_OFF
676 j io_return
678 #
679 # _TIF_NEED_RESCHED is set, call schedule
680 #
681 io_reschedule:
682 # TRACE_IRQS_ON already done at io_return
683 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
684 brasl %r14,schedule # call scheduler
685 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
686 TRACE_IRQS_OFF
687 j io_return
689 #
690 # _TIF_SIGPENDING or is set, call do_signal
691 #
692 io_sigpending:
693 # TRACE_IRQS_ON already done at io_return
694 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
695 la %r2,SP_PTREGS(%r15) # load pt_regs
696 brasl %r14,do_signal # call do_signal
697 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
698 TRACE_IRQS_OFF
699 j io_return
701 #
702 # _TIF_NOTIFY_RESUME or is set, call do_notify_resume
703 #
704 io_notify_resume:
705 # TRACE_IRQS_ON already done at io_return
706 stosm __SF_EMPTY(%r15),0x03 # reenable interrupts
707 la %r2,SP_PTREGS(%r15) # load pt_regs
708 brasl %r14,do_notify_resume # call do_notify_resume
709 stnsm __SF_EMPTY(%r15),0xfc # disable I/O and ext. interrupts
710 TRACE_IRQS_OFF
711 j io_return
713 /*
714 * External interrupt handler routine
715 */
716 ENTRY(ext_int_handler)
717 stck __LC_INT_CLOCK
718 stpt __LC_ASYNC_ENTER_TIMER
719 SAVE_ALL_ASYNC __LC_EXT_OLD_PSW,__LC_SAVE_AREA+40
720 CREATE_STACK_FRAME __LC_SAVE_AREA+40
721 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
722 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
723 HANDLE_SIE_INTERCEPT
724 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
725 jz ext_no_vtime
726 UPDATE_VTIME __LC_EXIT_TIMER,__LC_ASYNC_ENTER_TIMER,__LC_USER_TIMER
727 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
728 mvc __LC_LAST_UPDATE_TIMER(8),__LC_ASYNC_ENTER_TIMER
729 LAST_BREAK
730 ext_no_vtime:
731 TRACE_IRQS_OFF
732 lghi %r1,4096
733 la %r2,SP_PTREGS(%r15) # address of register-save area
734 llgf %r3,__LC_CPU_ADDRESS # get cpu address + interruption code
735 llgf %r4,__LC_EXT_PARAMS # get external parameter
736 lg %r5,__LC_EXT_PARAMS2-4096(%r1) # get 64 bit external parameter
737 brasl %r14,do_extint
738 j io_return
740 __critical_end:
742 /*
743 * Machine check handler routines
744 */
745 ENTRY(mcck_int_handler)
746 stck __LC_MCCK_CLOCK
747 la %r1,4095 # revalidate r1
748 spt __LC_CPU_TIMER_SAVE_AREA-4095(%r1) # revalidate cpu timer
749 lmg %r0,%r15,__LC_GPREGS_SAVE_AREA-4095(%r1)# revalidate gprs
750 stmg %r11,%r15,__LC_SAVE_AREA+80
751 larl %r13,system_call
752 lg %r11,__LC_LAST_BREAK
753 la %r12,__LC_MCK_OLD_PSW
754 tm __LC_MCCK_CODE,0x80 # system damage?
755 jo mcck_int_main # yes -> rest of mcck code invalid
756 la %r14,4095
757 mvc __LC_MCCK_ENTER_TIMER(8),__LC_CPU_TIMER_SAVE_AREA-4095(%r14)
758 tm __LC_MCCK_CODE+5,0x02 # stored cpu timer value valid?
759 jo 1f
760 la %r14,__LC_SYNC_ENTER_TIMER
761 clc 0(8,%r14),__LC_ASYNC_ENTER_TIMER
762 jl 0f
763 la %r14,__LC_ASYNC_ENTER_TIMER
764 0: clc 0(8,%r14),__LC_EXIT_TIMER
765 jl 0f
766 la %r14,__LC_EXIT_TIMER
767 0: clc 0(8,%r14),__LC_LAST_UPDATE_TIMER
768 jl 0f
769 la %r14,__LC_LAST_UPDATE_TIMER
770 0: spt 0(%r14)
771 mvc __LC_MCCK_ENTER_TIMER(8),0(%r14)
772 1: tm __LC_MCCK_CODE+2,0x09 # mwp + ia of old psw valid?
773 jno mcck_int_main # no -> skip cleanup critical
774 tm __LC_MCK_OLD_PSW+1,0x01 # test problem state bit
775 jnz mcck_int_main # from user -> load kernel stack
776 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_end)
777 jhe mcck_int_main
778 clc __LC_MCK_OLD_PSW+8(8),BASED(.Lcritical_start)
779 jl mcck_int_main
780 brasl %r14,cleanup_critical
781 mcck_int_main:
782 lg %r14,__LC_PANIC_STACK # are we already on the panic stack?
783 slgr %r14,%r15
784 srag %r14,%r14,PAGE_SHIFT
785 jz 0f
786 lg %r15,__LC_PANIC_STACK # load panic stack
787 0: aghi %r15,-SP_SIZE # make room for registers & psw
788 CREATE_STACK_FRAME __LC_SAVE_AREA+80
789 mvc SP_PSW(16,%r15),0(%r12)
790 lg %r12,__LC_THREAD_INFO # load pointer to thread_info struct
791 tm __LC_MCCK_CODE+2,0x08 # mwp of old psw valid?
792 jno mcck_no_vtime # no -> no timer update
793 HANDLE_SIE_INTERCEPT
794 tm SP_PSW+1(%r15),0x01 # interrupting from user ?
795 jz mcck_no_vtime
796 UPDATE_VTIME __LC_EXIT_TIMER,__LC_MCCK_ENTER_TIMER,__LC_USER_TIMER
797 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
798 mvc __LC_LAST_UPDATE_TIMER(8),__LC_MCCK_ENTER_TIMER
799 LAST_BREAK
800 mcck_no_vtime:
801 la %r2,SP_PTREGS(%r15) # load pt_regs
802 brasl %r14,s390_do_machine_check
803 tm SP_PSW+1(%r15),0x01 # returning to user ?
804 jno mcck_return
805 lg %r1,__LC_KERNEL_STACK # switch to kernel stack
806 aghi %r1,-SP_SIZE
807 mvc SP_PTREGS(__PT_SIZE,%r1),SP_PTREGS(%r15)
808 xc __SF_BACKCHAIN(8,%r1),__SF_BACKCHAIN(%r1) # clear back chain
809 lgr %r15,%r1
810 stosm __SF_EMPTY(%r15),0x04 # turn dat on
811 tm __TI_flags+7(%r12),_TIF_MCCK_PENDING
812 jno mcck_return
813 TRACE_IRQS_OFF
814 brasl %r14,s390_handle_mcck
815 TRACE_IRQS_ON
816 mcck_return:
817 mvc __LC_RETURN_MCCK_PSW(16),SP_PSW(%r15) # move return PSW
818 ni __LC_RETURN_MCCK_PSW+1,0xfd # clear wait state bit
819 lmg %r0,%r15,SP_R0(%r15) # load gprs 0-15
820 tm __LC_RETURN_MCCK_PSW+1,0x01 # returning to user ?
821 jno 0f
822 stpt __LC_EXIT_TIMER
823 0: lpswe __LC_RETURN_MCCK_PSW # back to caller
824 mcck_done:
826 /*
827 * Restart interruption handler, kick starter for additional CPUs
828 */
829 #ifdef CONFIG_SMP
830 __CPUINIT
831 ENTRY(restart_int_handler)
832 basr %r1,0
833 restart_base:
834 spt restart_vtime-restart_base(%r1)
835 stck __LC_LAST_UPDATE_CLOCK
836 mvc __LC_LAST_UPDATE_TIMER(8),restart_vtime-restart_base(%r1)
837 mvc __LC_EXIT_TIMER(8),restart_vtime-restart_base(%r1)
838 lg %r15,__LC_SAVE_AREA+120 # load ksp
839 lghi %r10,__LC_CREGS_SAVE_AREA
840 lctlg %c0,%c15,0(%r10) # get new ctl regs
841 lghi %r10,__LC_AREGS_SAVE_AREA
842 lam %a0,%a15,0(%r10)
843 lmg %r6,%r15,__SF_GPRS(%r15) # load registers from clone
844 lg %r1,__LC_THREAD_INFO
845 mvc __LC_USER_TIMER(8),__TI_user_timer(%r1)
846 mvc __LC_SYSTEM_TIMER(8),__TI_system_timer(%r1)
847 xc __LC_STEAL_TIMER(8),__LC_STEAL_TIMER
848 stosm __SF_EMPTY(%r15),0x04 # now we can turn dat on
849 brasl %r14,start_secondary
850 .align 8
851 restart_vtime:
852 .long 0x7fffffff,0xffffffff
853 .previous
854 #else
855 /*
856 * If we do not run with SMP enabled, let the new CPU crash ...
857 */
858 ENTRY(restart_int_handler)
859 basr %r1,0
860 restart_base:
861 lpswe restart_crash-restart_base(%r1)
862 .align 8
863 restart_crash:
864 .long 0x000a0000,0x00000000,0x00000000,0x00000000
865 restart_go:
866 #endif
868 #
869 # PSW restart interrupt handler
870 #
871 ENTRY(psw_restart_int_handler)
872 stg %r15,__LC_SAVE_AREA_64(%r0) # save r15
873 larl %r15,restart_stack # load restart stack
874 lg %r15,0(%r15)
875 aghi %r15,-SP_SIZE # make room for pt_regs
876 stmg %r0,%r14,SP_R0(%r15) # store gprs %r0-%r14 to stack
877 mvc SP_R15(8,%r15),__LC_SAVE_AREA_64(%r0)# store saved %r15 to stack
878 mvc SP_PSW(16,%r15),__LC_RST_OLD_PSW(%r0)# store restart old psw
879 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # set backchain to 0
880 brasl %r14,do_restart
882 larl %r14,restart_psw_crash # load disabled wait PSW if
883 lpswe 0(%r14) # do_restart returns
884 .align 8
885 restart_psw_crash:
886 .quad 0x0002000080000000,0x0000000000000000 + restart_psw_crash
888 .section .kprobes.text, "ax"
890 #ifdef CONFIG_CHECK_STACK
891 /*
892 * The synchronous or the asynchronous stack overflowed. We are dead.
893 * No need to properly save the registers, we are going to panic anyway.
894 * Setup a pt_regs so that show_trace can provide a good call trace.
895 */
896 stack_overflow:
897 lg %r15,__LC_PANIC_STACK # change to panic stack
898 aghi %r15,-SP_SIZE
899 mvc SP_PSW(16,%r15),0(%r12) # move user PSW to stack
900 stmg %r0,%r10,SP_R0(%r15) # store gprs %r0-%r10 to kernel stack
901 la %r1,__LC_SAVE_AREA
902 chi %r12,__LC_SVC_OLD_PSW
903 je 0f
904 chi %r12,__LC_PGM_OLD_PSW
905 je 0f
906 la %r1,__LC_SAVE_AREA+40
907 0: mvc SP_R11(40,%r15),0(%r1) # move %r11-%r15 to stack
908 mvc SP_ARGS(8,%r15),__LC_LAST_BREAK
909 xc __SF_BACKCHAIN(8,%r15),__SF_BACKCHAIN(%r15) # clear back chain
910 la %r2,SP_PTREGS(%r15) # load pt_regs
911 jg kernel_stack_overflow
912 #endif
914 cleanup_table_system_call:
915 .quad system_call, sysc_do_svc
916 cleanup_table_sysc_tif:
917 .quad sysc_tif, sysc_restore
918 cleanup_table_sysc_restore:
919 .quad sysc_restore, sysc_done
920 cleanup_table_io_tif:
921 .quad io_tif, io_restore
922 cleanup_table_io_restore:
923 .quad io_restore, io_done
925 cleanup_critical:
926 clc 8(8,%r12),BASED(cleanup_table_system_call)
927 jl 0f
928 clc 8(8,%r12),BASED(cleanup_table_system_call+8)
929 jl cleanup_system_call
930 0:
931 clc 8(8,%r12),BASED(cleanup_table_sysc_tif)
932 jl 0f
933 clc 8(8,%r12),BASED(cleanup_table_sysc_tif+8)
934 jl cleanup_sysc_tif
935 0:
936 clc 8(8,%r12),BASED(cleanup_table_sysc_restore)
937 jl 0f
938 clc 8(8,%r12),BASED(cleanup_table_sysc_restore+8)
939 jl cleanup_sysc_restore
940 0:
941 clc 8(8,%r12),BASED(cleanup_table_io_tif)
942 jl 0f
943 clc 8(8,%r12),BASED(cleanup_table_io_tif+8)
944 jl cleanup_io_tif
945 0:
946 clc 8(8,%r12),BASED(cleanup_table_io_restore)
947 jl 0f
948 clc 8(8,%r12),BASED(cleanup_table_io_restore+8)
949 jl cleanup_io_restore
950 0:
951 br %r14
953 cleanup_system_call:
954 mvc __LC_RETURN_PSW(16),0(%r12)
955 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+8)
956 jh 0f
957 mvc __LC_SYNC_ENTER_TIMER(8),__LC_MCCK_ENTER_TIMER
958 cghi %r12,__LC_MCK_OLD_PSW
959 je 0f
960 mvc __LC_SYNC_ENTER_TIMER(8),__LC_ASYNC_ENTER_TIMER
961 0: cghi %r12,__LC_MCK_OLD_PSW
962 la %r12,__LC_SAVE_AREA+80
963 je 0f
964 la %r12,__LC_SAVE_AREA+40
965 0: clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+16)
966 jhe cleanup_vtime
967 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn)
968 jh 0f
969 mvc __LC_SAVE_AREA(40),0(%r12)
970 0: lg %r15,__LC_KERNEL_STACK # problem state -> load ksp
971 aghi %r15,-SP_SIZE # make room for registers & psw
972 stg %r15,32(%r12)
973 stg %r11,0(%r12)
974 CREATE_STACK_FRAME __LC_SAVE_AREA
975 mvc SP_PSW(16,%r15),__LC_SVC_OLD_PSW
976 mvc SP_ILC(4,%r15),__LC_SVC_ILC
977 mvc 8(8,%r12),__LC_THREAD_INFO
978 cleanup_vtime:
979 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+24)
980 jhe cleanup_stime
981 UPDATE_VTIME __LC_EXIT_TIMER,__LC_SYNC_ENTER_TIMER,__LC_USER_TIMER
982 cleanup_stime:
983 clc __LC_RETURN_PSW+8(8),BASED(cleanup_system_call_insn+32)
984 jh cleanup_update
985 UPDATE_VTIME __LC_LAST_UPDATE_TIMER,__LC_EXIT_TIMER,__LC_SYSTEM_TIMER
986 cleanup_update:
987 mvc __LC_LAST_UPDATE_TIMER(8),__LC_SYNC_ENTER_TIMER
988 srag %r12,%r11,23
989 lg %r12,__LC_THREAD_INFO
990 jz 0f
991 stg %r11,__TI_last_break(%r12)
992 0: mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_system_call+8)
993 la %r12,__LC_RETURN_PSW
994 br %r14
995 cleanup_system_call_insn:
996 .quad sysc_saveall
997 .quad system_call
998 .quad sysc_vtime
999 .quad sysc_stime
1000 .quad sysc_update
1002 cleanup_sysc_tif:
1003 mvc __LC_RETURN_PSW(8),0(%r12)
1004 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_sysc_tif)
1005 la %r12,__LC_RETURN_PSW
1006 br %r14
1008 cleanup_sysc_restore:
1009 clc 8(8,%r12),BASED(cleanup_sysc_restore_insn)
1010 je 2f
1011 clc 8(8,%r12),BASED(cleanup_sysc_restore_insn+8)
1012 jhe 0f
1013 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1014 cghi %r12,__LC_MCK_OLD_PSW
1015 je 0f
1016 mvc __LC_EXIT_TIMER(8),__LC_ASYNC_ENTER_TIMER
1017 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1018 cghi %r12,__LC_MCK_OLD_PSW
1019 la %r12,__LC_SAVE_AREA+80
1020 je 1f
1021 la %r12,__LC_SAVE_AREA+40
1022 1: mvc 0(40,%r12),SP_R11(%r15)
1023 lmg %r0,%r10,SP_R0(%r15)
1024 lg %r15,SP_R15(%r15)
1025 2: la %r12,__LC_RETURN_PSW
1026 br %r14
1027 cleanup_sysc_restore_insn:
1028 .quad sysc_done - 4
1029 .quad sysc_done - 16
1031 cleanup_io_tif:
1032 mvc __LC_RETURN_PSW(8),0(%r12)
1033 mvc __LC_RETURN_PSW+8(8),BASED(cleanup_table_io_tif)
1034 la %r12,__LC_RETURN_PSW
1035 br %r14
1037 cleanup_io_restore:
1038 clc 8(8,%r12),BASED(cleanup_io_restore_insn)
1039 je 1f
1040 clc 8(8,%r12),BASED(cleanup_io_restore_insn+8)
1041 jhe 0f
1042 mvc __LC_EXIT_TIMER(8),__LC_MCCK_ENTER_TIMER
1043 0: mvc __LC_RETURN_PSW(16),SP_PSW(%r15)
1044 mvc __LC_SAVE_AREA+80(40),SP_R11(%r15)
1045 lmg %r0,%r10,SP_R0(%r15)
1046 lg %r15,SP_R15(%r15)
1047 1: la %r12,__LC_RETURN_PSW
1048 br %r14
1049 cleanup_io_restore_insn:
1050 .quad io_done - 4
1051 .quad io_done - 16
1053 /*
1054 * Integer constants
1055 */
1056 .align 4
1057 .Lcritical_start:
1058 .quad __critical_start
1059 .Lcritical_end:
1060 .quad __critical_end
1062 #if defined(CONFIG_KVM) || defined(CONFIG_KVM_MODULE)
1063 /*
1064 * sie64a calling convention:
1065 * %r2 pointer to sie control block
1066 * %r3 guest register save area
1067 */
1068 ENTRY(sie64a)
1069 stmg %r6,%r14,__SF_GPRS(%r15) # save kernel registers
1070 stg %r2,__SF_EMPTY(%r15) # save control block pointer
1071 stg %r3,__SF_EMPTY+8(%r15) # save guest register save area
1072 lmg %r0,%r13,0(%r3) # load guest gprs 0-13
1073 lg %r14,__LC_THREAD_INFO # pointer thread_info struct
1074 oi __TI_flags+6(%r14),_TIF_SIE>>8
1075 sie_loop:
1076 lg %r14,__LC_THREAD_INFO # pointer thread_info struct
1077 tm __TI_flags+7(%r14),_TIF_EXIT_SIE
1078 jnz sie_exit
1079 lg %r14,__LC_GMAP # get gmap pointer
1080 ltgr %r14,%r14
1081 jz sie_gmap
1082 lctlg %c1,%c1,__GMAP_ASCE(%r14) # load primary asce
1083 sie_gmap:
1084 lg %r14,__SF_EMPTY(%r15) # get control block pointer
1085 SPP __SF_EMPTY(%r15) # set guest id
1086 sie 0(%r14)
1087 sie_done:
1088 SPP __LC_CMF_HPP # set host id
1089 lg %r14,__LC_THREAD_INFO # pointer thread_info struct
1090 sie_exit:
1091 lctlg %c1,%c1,__LC_USER_ASCE # load primary asce
1092 ni __TI_flags+6(%r14),255-(_TIF_SIE>>8)
1093 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area
1094 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
1095 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
1096 lghi %r2,0
1097 br %r14
1098 sie_fault:
1099 lg %r14,__LC_THREAD_INFO # pointer thread_info struct
1100 ni __TI_flags+6(%r14),255-(_TIF_SIE>>8)
1101 lg %r14,__SF_EMPTY+8(%r15) # load guest register save area
1102 stmg %r0,%r13,0(%r14) # save guest gprs 0-13
1103 lmg %r6,%r14,__SF_GPRS(%r15) # restore kernel registers
1104 lghi %r2,-EFAULT
1105 br %r14
1107 .align 8
1108 .Lsie_loop:
1109 .quad sie_loop
1110 .Lsie_done:
1111 .quad sie_done
1113 .section __ex_table,"a"
1114 .quad sie_loop,sie_fault
1115 .previous
1116 #endif
1118 .section .rodata, "a"
1119 #define SYSCALL(esa,esame,emu) .long esame
1120 .globl sys_call_table
1121 sys_call_table:
1122 #include "syscalls.S"
1123 #undef SYSCALL
1125 #ifdef CONFIG_COMPAT
1127 #define SYSCALL(esa,esame,emu) .long emu
1128 sys_call_table_emu:
1129 #include "syscalls.S"
1130 #undef SYSCALL
1131 #endif