drivers/pci/setup-res.c

   1 /*
   2  *      drivers/pci/setup-res.c
   3  *
   4  * Extruded from code written by
   5  *      Dave Rusling (david.rusling@reo.mts.dec.com)
   6  *      David Mosberger (davidm@cs.arizona.edu)
   7  *      David Miller (davem@redhat.com)
   8  *
   9  * Support routines for initializing a PCI subsystem.
  10  */
  11
  12 /* fixed for multiple pci buses, 1999 Andrea Arcangeli <andrea@suse.de> */
  13
  14 /*
  15  * Nov 2000, Ivan Kokshaysky <ink@jurassic.park.msu.ru>
  16  *           Resource sorting
  17  */
  18
  19 #include <linux/init.h>
  20 #include <linux/kernel.h>
  21 #include <linux/pci.h>
  22 #include <linux/errno.h>
  23 #include <linux/ioport.h>
  24 #include <linux/cache.h>
  25 #include <linux/slab.h>
  26 #include "pci.h"
  27
  28
  29 void pci_update_resource(struct pci_dev *dev, int resno)
  30 {
  31         struct pci_bus_region region;
  32         u32 new, check, mask;
  33         int reg;
  34         enum pci_bar_type type;
  35         struct resource *res = dev->resource + resno;
  36
  37         /*
  38          * Ignore resources for unimplemented BARs and unused resource slots
  39          * for 64 bit BARs.
  40          */
  41         if (!res->flags)
  42                 return;
  43
  44         /*
  45          * Ignore non-moveable resources.  This might be legacy resources for
  46          * which no functional BAR register exists or another important
  47          * system resource we shouldn't move around.
  48          */
  49         if (res->flags & IORESOURCE_PCI_FIXED)
  50                 return;
  51
  52         pcibios_resource_to_bus(dev, &region, res);
  53
  54         new = region.start | (res->flags & PCI_REGION_FLAG_MASK);
  55         if (res->flags & IORESOURCE_IO)
  56                 mask = (u32)PCI_BASE_ADDRESS_IO_MASK;
  57         else
  58                 mask = (u32)PCI_BASE_ADDRESS_MEM_MASK;
  59
  60         reg = pci_resource_bar(dev, resno, &type);
  61         if (!reg)
  62                 return;
  63         if (type != pci_bar_unknown) {
  64                 if (!(res->flags & IORESOURCE_ROM_ENABLE))
  65                         return;
  66                 new |= PCI_ROM_ADDRESS_ENABLE;
  67         }
  68
  69         pci_write_config_dword(dev, reg, new);
  70         pci_read_config_dword(dev, reg, &check);
  71
  72         if ((new ^ check) & mask) {
  73                 dev_err(&dev->dev, "BAR %d: error updating (%#08x != %#08x)\n",
  74                         resno, new, check);
  75         }
  76
  77         if (res->flags & IORESOURCE_MEM_64) {
  78                 new = region.start >> 16 >> 16;
  79                 pci_write_config_dword(dev, reg + 4, new);
  80                 pci_read_config_dword(dev, reg + 4, &check);
  81                 if (check != new) {
  82                         dev_err(&dev->dev, "BAR %d: error updating "
  83                                "(high %#08x != %#08x)\n", resno, new, check);
  84                 }
  85         }
  86         res->flags &= ~IORESOURCE_UNSET;
  87         dev_info(&dev->dev, "BAR %d: set to %pR (PCI address [%#llx-%#llx])\n",
  88                  resno, res, (unsigned long long)region.start,
  89                  (unsigned long long)region.end);
  90 }
  91
  92 int pci_claim_resource(struct pci_dev *dev, int resource)
  93 {
  94         struct resource *res = &dev->resource[resource];
  95         struct resource *root, *conflict;
  96
  97         root = pci_find_parent_resource(dev, res);
  98         if (!root) {
  99                 dev_info(&dev->dev, "no compatible bridge window for %pR\n",
 100                          res);
 101                 return -EINVAL;
 102         }
 103
 104         conflict = request_resource_conflict(root, res);
 105         if (conflict) {
 106                 dev_info(&dev->dev,
 107                          "address space collision: %pR conflicts with %s %pR\n",
 108                          res, conflict->name, conflict);
 109                 return -EBUSY;
 110         }
 111
 112         return 0;
 113 }
 114 EXPORT_SYMBOL(pci_claim_resource);
 115
 116 #ifdef CONFIG_PCI_QUIRKS
 117 void pci_disable_bridge_window(struct pci_dev *dev)
 118 {
 119         dev_info(&dev->dev, "disabling bridge mem windows\n");
 120
 121         /* MMIO Base/Limit */
 122         pci_write_config_dword(dev, PCI_MEMORY_BASE, 0x0000fff0);
 123
 124         /* Prefetchable MMIO Base/Limit */
 125         pci_write_config_dword(dev, PCI_PREF_LIMIT_UPPER32, 0);
 126         pci_write_config_dword(dev, PCI_PREF_MEMORY_BASE, 0x0000fff0);
 127         pci_write_config_dword(dev, PCI_PREF_BASE_UPPER32, 0xffffffff);
 128 }
 129 #endif  /* CONFIG_PCI_QUIRKS */
 130
 131
 132
 133 static int __pci_assign_resource(struct pci_bus *bus, struct pci_dev *dev,
 134                 int resno, resource_size_t size, resource_size_t align)
 135 {
 136         struct resource *res = dev->resource + resno;
 137         resource_size_t min;
 138         int ret;
 139
 140         min = (res->flags & IORESOURCE_IO) ? PCIBIOS_MIN_IO : PCIBIOS_MIN_MEM;
 141
 142         /* First, try exact prefetching match.. */
 143         ret = pci_bus_alloc_resource(bus, res, size, align, min,
 144                                      IORESOURCE_PREFETCH,
 145                                      pcibios_align_resource, dev);
 146
 147         if (ret < 0 && (res->flags & IORESOURCE_PREFETCH)) {
 148                 /*
 149                  * That failed.
 150                  *
 151                  * But a prefetching area can handle a non-prefetching
 152                  * window (it will just not perform as well).
 153                  */
 154                 ret = pci_bus_alloc_resource(bus, res, size, align, min, 0,
 155                                              pcibios_align_resource, dev);
 156         }
 157         return ret;
 158 }
 159
 160 static int pci_revert_fw_address(struct resource *res, struct pci_dev *dev,
 161                 int resno, resource_size_t size)
 162 {
 163         struct resource *root, *conflict;
 164         resource_size_t start, end;
 165         int ret = 0;
 166
 167         if (res->flags & IORESOURCE_IO)
 168                 root = &ioport_resource;
 169         else
 170                 root = &iomem_resource;
 171
 172         start = res->start;
 173         end = res->end;
 174         res->start = dev->fw_addr[resno];
 175         res->end = res->start + size - 1;
 176         dev_info(&dev->dev, "BAR %d: trying firmware assignment %pR\n",
 177                  resno, res);
 178         conflict = request_resource_conflict(root, res);
 179         if (conflict) {
 180                 dev_info(&dev->dev,
 181                          "BAR %d: %pR conflicts with %s %pR\n", resno,
 182                          res, conflict->name, conflict);
 183                 res->start = start;
 184                 res->end = end;
 185                 ret = 1;
 186         }
 187         return ret;
 188 }
 189
 190 static int _pci_assign_resource(struct pci_dev *dev, int resno, int size, resource_size_t min_align)
 191 {
 192         struct resource *res = dev->resource + resno;
 193         struct pci_bus *bus;
 194         int ret;
 195         char *type;
 196
 197         bus = dev->bus;
 198         while ((ret = __pci_assign_resource(bus, dev, resno, size, min_align))) {
 199                 if (!bus->parent || !bus->self->transparent)
 200                         break;
 201                 bus = bus->parent;
 202         }
 203
 204         if (ret) {
 205                 if (res->flags & IORESOURCE_MEM)
 206                         if (res->flags & IORESOURCE_PREFETCH)
 207                                 type = "mem pref";
 208                         else
 209                                 type = "mem";
 210                 else if (res->flags & IORESOURCE_IO)
 211                         type = "io";
 212                 else
 213                         type = "unknown";
 214                 dev_info(&dev->dev,
 215                          "BAR %d: can't assign %s (size %#llx)\n",
 216                          resno, type, (unsigned long long) resource_size(res));
 217         }
 218
 219         return ret;
 220 }
 221
 222 int pci_reassign_resource(struct pci_dev *dev, int resno, resource_size_t addsize,
 223                         resource_size_t min_align)
 224 {
 225         struct resource *res = dev->resource + resno;
 226         resource_size_t new_size;
 227         int ret;
 228
 229         if (!res->parent) {
 230                 dev_info(&dev->dev, "BAR %d: can't reassign an unassigned resouce %pR "
 231                          "\n", resno, res);
 232                 return -EINVAL;
 233         }
 234
 235         new_size = resource_size(res) + addsize + min_align;
 236         ret = _pci_assign_resource(dev, resno, new_size, min_align);
 237         if (!ret) {
 238                 res->flags &= ~IORESOURCE_STARTALIGN;
 239                 dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
 240                 if (resno < PCI_BRIDGE_RESOURCES)
 241                         pci_update_resource(dev, resno);
 242         }
 243         return ret;
 244 }
 245
 246 int pci_assign_resource(struct pci_dev *dev, int resno)
 247 {
 248         struct resource *res = dev->resource + resno;
 249         resource_size_t align, size;
 250         struct pci_bus *bus;
 251         int ret;
 252
 253         align = pci_resource_alignment(dev, res);
 254         if (!align) {
 255                 dev_info(&dev->dev, "BAR %d: can't assign %pR "
 256                          "(bogus alignment)\n", resno, res);
 257                 return -EINVAL;
 258         }
 259
 260         bus = dev->bus;
 261         size = resource_size(res);
 262         ret = _pci_assign_resource(dev, resno, size, align);
 263
 264         /*
 265          * If we failed to assign anything, let's try the address
 266          * where firmware left it.  That at least has a chance of
 267          * working, which is better than just leaving it disabled.
 268          */
 269         if (ret < 0 && dev->fw_addr[resno])
 270                 ret = pci_revert_fw_address(res, dev, resno, size);
 271
 272         if (!ret) {
 273                 res->flags &= ~IORESOURCE_STARTALIGN;
 274                 dev_info(&dev->dev, "BAR %d: assigned %pR\n", resno, res);
 275                 if (resno < PCI_BRIDGE_RESOURCES)
 276                         pci_update_resource(dev, resno);
 277         }
 278         return ret;
 279 }
 280
 281
 282 /* Sort resources by alignment */
 283 void pdev_sort_resources(struct pci_dev *dev, struct resource_list *head)
 284 {
 285         int i;
 286
 287         for (i = 0; i < PCI_NUM_RESOURCES; i++) {
 288                 struct resource *r;
 289                 struct resource_list *list, *tmp;
 290                 resource_size_t r_align;
 291
 292                 r = &dev->resource[i];
 293
 294                 if (r->flags & IORESOURCE_PCI_FIXED)
 295                         continue;
 296
 297                 if (!(r->flags) || r->parent)
 298                         continue;
 299
 300                 r_align = pci_resource_alignment(dev, r);
 301                 if (!r_align) {
 302                         dev_warn(&dev->dev, "BAR %d: %pR has bogus alignment\n",
 303                                  i, r);
 304                         continue;
 305                 }
 306                 for (list = head; ; list = list->next) {
 307                         resource_size_t align = 0;
 308                         struct resource_list *ln = list->next;
 309
 310                         if (ln)
 311                                 align = pci_resource_alignment(ln->dev, ln->res);
 312
 313                         if (r_align > align) {
 314                                 tmp = kmalloc(sizeof(*tmp), GFP_KERNEL);
 315                                 if (!tmp)
 316                                         panic("pdev_sort_resources(): "
 317                                               "kmalloc() failed!\n");
 318                                 tmp->next = ln;
 319                                 tmp->res = r;
 320                                 tmp->dev = dev;
 321                                 list->next = tmp;
 322                                 break;
 323                         }
 324                 }
 325         }
 326 }
 327
 328 int pci_enable_resources(struct pci_dev *dev, int mask)
 329 {
 330         u16 cmd, old_cmd;
 331         int i;
 332         struct resource *r;
 333
 334         pci_read_config_word(dev, PCI_COMMAND, &cmd);
 335         old_cmd = cmd;
 336
 337         for (i = 0; i < PCI_NUM_RESOURCES; i++) {
 338                 if (!(mask & (1 << i)))
 339                         continue;
 340
 341                 r = &dev->resource[i];
 342
 343                 if (!(r->flags & (IORESOURCE_IO | IORESOURCE_MEM)))
 344                         continue;
 345                 if ((i == PCI_ROM_RESOURCE) &&
 346                                 (!(r->flags & IORESOURCE_ROM_ENABLE)))
 347                         continue;
 348
 349                 if (!r->parent) {
 350                         dev_err(&dev->dev, "device not available "
 351                                 "(can't reserve %pR)\n", r);
 352                         return -EINVAL;
 353                 }
 354
 355                 if (r->flags & IORESOURCE_IO)
 356                         cmd |= PCI_COMMAND_IO;
 357                 if (r->flags & IORESOURCE_MEM)
 358                         cmd |= PCI_COMMAND_MEMORY;
 359         }
 360
 361         if (cmd != old_cmd) {
 362                 dev_info(&dev->dev, "enabling device (%04x -> %04x)\n",
 363                          old_cmd, cmd);
 364                 pci_write_config_word(dev, PCI_COMMAND, cmd);
 365         }
 366         return 0;
 367 }