x86: Fix S4 regression
[linux-btrfs-devel.git] / sound / soc / codecs / tlv320aic26.c
blob7859bdcc93db4064cad1474a8fe2533e19026f1e
1 /*
2 * Texas Instruments TLV320AIC26 low power audio CODEC
3 * ALSA SoC CODEC driver
5 * Copyright (C) 2008 Secret Lab Technologies Ltd.
6 */
8 #include <linux/module.h>
9 #include <linux/moduleparam.h>
10 #include <linux/init.h>
11 #include <linux/delay.h>
12 #include <linux/pm.h>
13 #include <linux/device.h>
14 #include <linux/sysfs.h>
15 #include <linux/spi/spi.h>
16 #include <linux/slab.h>
17 #include <sound/core.h>
18 #include <sound/pcm.h>
19 #include <sound/pcm_params.h>
20 #include <sound/soc.h>
21 #include <sound/initval.h>
23 #include "tlv320aic26.h"
25 MODULE_DESCRIPTION("ASoC TLV320AIC26 codec driver");
26 MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
27 MODULE_LICENSE("GPL");
29 /* AIC26 driver private data */
30 struct aic26 {
31 struct spi_device *spi;
32 struct snd_soc_codec codec;
33 int master;
34 int datfm;
35 int mclk;
37 /* Keyclick parameters */
38 int keyclick_amplitude;
39 int keyclick_freq;
40 int keyclick_len;
43 /* ---------------------------------------------------------------------
44 * Register access routines
46 static unsigned int aic26_reg_read(struct snd_soc_codec *codec,
47 unsigned int reg)
49 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
50 u16 *cache = codec->reg_cache;
51 u16 cmd, value;
52 u8 buffer[2];
53 int rc;
55 if (reg >= AIC26_NUM_REGS) {
56 WARN_ON_ONCE(1);
57 return 0;
60 /* Do SPI transfer; first 16bits are command; remaining is
61 * register contents */
62 cmd = AIC26_READ_COMMAND_WORD(reg);
63 buffer[0] = (cmd >> 8) & 0xff;
64 buffer[1] = cmd & 0xff;
65 rc = spi_write_then_read(aic26->spi, buffer, 2, buffer, 2);
66 if (rc) {
67 dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
68 return -EIO;
70 value = (buffer[0] << 8) | buffer[1];
72 /* Update the cache before returning with the value */
73 cache[reg] = value;
74 return value;
77 static unsigned int aic26_reg_read_cache(struct snd_soc_codec *codec,
78 unsigned int reg)
80 u16 *cache = codec->reg_cache;
82 if (reg >= AIC26_NUM_REGS) {
83 WARN_ON_ONCE(1);
84 return 0;
87 return cache[reg];
90 static int aic26_reg_write(struct snd_soc_codec *codec, unsigned int reg,
91 unsigned int value)
93 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
94 u16 *cache = codec->reg_cache;
95 u16 cmd;
96 u8 buffer[4];
97 int rc;
99 if (reg >= AIC26_NUM_REGS) {
100 WARN_ON_ONCE(1);
101 return -EINVAL;
104 /* Do SPI transfer; first 16bits are command; remaining is data
105 * to write into register */
106 cmd = AIC26_WRITE_COMMAND_WORD(reg);
107 buffer[0] = (cmd >> 8) & 0xff;
108 buffer[1] = cmd & 0xff;
109 buffer[2] = value >> 8;
110 buffer[3] = value;
111 rc = spi_write(aic26->spi, buffer, 4);
112 if (rc) {
113 dev_err(&aic26->spi->dev, "AIC26 reg read error\n");
114 return -EIO;
117 /* update cache before returning */
118 cache[reg] = value;
119 return 0;
122 /* ---------------------------------------------------------------------
123 * Digital Audio Interface Operations
125 static int aic26_hw_params(struct snd_pcm_substream *substream,
126 struct snd_pcm_hw_params *params,
127 struct snd_soc_dai *dai)
129 struct snd_soc_pcm_runtime *rtd = substream->private_data;
130 struct snd_soc_codec *codec = rtd->codec;
131 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
132 int fsref, divisor, wlen, pval, jval, dval, qval;
133 u16 reg;
135 dev_dbg(&aic26->spi->dev, "aic26_hw_params(substream=%p, params=%p)\n",
136 substream, params);
137 dev_dbg(&aic26->spi->dev, "rate=%i format=%i\n", params_rate(params),
138 params_format(params));
140 switch (params_rate(params)) {
141 case 8000: fsref = 48000; divisor = AIC26_DIV_6; break;
142 case 11025: fsref = 44100; divisor = AIC26_DIV_4; break;
143 case 12000: fsref = 48000; divisor = AIC26_DIV_4; break;
144 case 16000: fsref = 48000; divisor = AIC26_DIV_3; break;
145 case 22050: fsref = 44100; divisor = AIC26_DIV_2; break;
146 case 24000: fsref = 48000; divisor = AIC26_DIV_2; break;
147 case 32000: fsref = 48000; divisor = AIC26_DIV_1_5; break;
148 case 44100: fsref = 44100; divisor = AIC26_DIV_1; break;
149 case 48000: fsref = 48000; divisor = AIC26_DIV_1; break;
150 default:
151 dev_dbg(&aic26->spi->dev, "bad rate\n"); return -EINVAL;
154 /* select data word length */
155 switch (params_format(params)) {
156 case SNDRV_PCM_FORMAT_S8: wlen = AIC26_WLEN_16; break;
157 case SNDRV_PCM_FORMAT_S16_BE: wlen = AIC26_WLEN_16; break;
158 case SNDRV_PCM_FORMAT_S24_BE: wlen = AIC26_WLEN_24; break;
159 case SNDRV_PCM_FORMAT_S32_BE: wlen = AIC26_WLEN_32; break;
160 default:
161 dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
165 * Configure PLL
166 * fsref = (mclk * PLLM) / 2048
167 * where PLLM = J.DDDD (DDDD register ranges from 0 to 9999, decimal)
169 pval = 1;
170 /* compute J portion of multiplier */
171 jval = fsref / (aic26->mclk / 2048);
172 /* compute fractional DDDD component of multiplier */
173 dval = fsref - (jval * (aic26->mclk / 2048));
174 dval = (10000 * dval) / (aic26->mclk / 2048);
175 dev_dbg(&aic26->spi->dev, "Setting PLLM to %d.%04d\n", jval, dval);
176 qval = 0;
177 reg = 0x8000 | qval << 11 | pval << 8 | jval << 2;
178 aic26_reg_write(codec, AIC26_REG_PLL_PROG1, reg);
179 reg = dval << 2;
180 aic26_reg_write(codec, AIC26_REG_PLL_PROG2, reg);
182 /* Audio Control 3 (master mode, fsref rate) */
183 reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL3);
184 reg &= ~0xf800;
185 if (aic26->master)
186 reg |= 0x0800;
187 if (fsref == 48000)
188 reg |= 0x2000;
189 aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
191 /* Audio Control 1 (FSref divisor) */
192 reg = aic26_reg_read_cache(codec, AIC26_REG_AUDIO_CTRL1);
193 reg &= ~0x0fff;
194 reg |= wlen | aic26->datfm | (divisor << 3) | divisor;
195 aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL1, reg);
197 return 0;
201 * aic26_mute - Mute control to reduce noise when changing audio format
203 static int aic26_mute(struct snd_soc_dai *dai, int mute)
205 struct snd_soc_codec *codec = dai->codec;
206 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
207 u16 reg = aic26_reg_read_cache(codec, AIC26_REG_DAC_GAIN);
209 dev_dbg(&aic26->spi->dev, "aic26_mute(dai=%p, mute=%i)\n",
210 dai, mute);
212 if (mute)
213 reg |= 0x8080;
214 else
215 reg &= ~0x8080;
216 aic26_reg_write(codec, AIC26_REG_DAC_GAIN, reg);
218 return 0;
221 static int aic26_set_sysclk(struct snd_soc_dai *codec_dai,
222 int clk_id, unsigned int freq, int dir)
224 struct snd_soc_codec *codec = codec_dai->codec;
225 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
227 dev_dbg(&aic26->spi->dev, "aic26_set_sysclk(dai=%p, clk_id==%i,"
228 " freq=%i, dir=%i)\n",
229 codec_dai, clk_id, freq, dir);
231 /* MCLK needs to fall between 2MHz and 50 MHz */
232 if ((freq < 2000000) || (freq > 50000000))
233 return -EINVAL;
235 aic26->mclk = freq;
236 return 0;
239 static int aic26_set_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
241 struct snd_soc_codec *codec = codec_dai->codec;
242 struct aic26 *aic26 = snd_soc_codec_get_drvdata(codec);
244 dev_dbg(&aic26->spi->dev, "aic26_set_fmt(dai=%p, fmt==%i)\n",
245 codec_dai, fmt);
247 /* set master/slave audio interface */
248 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
249 case SND_SOC_DAIFMT_CBM_CFM: aic26->master = 1; break;
250 case SND_SOC_DAIFMT_CBS_CFS: aic26->master = 0; break;
251 default:
252 dev_dbg(&aic26->spi->dev, "bad master\n"); return -EINVAL;
255 /* interface format */
256 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
257 case SND_SOC_DAIFMT_I2S: aic26->datfm = AIC26_DATFM_I2S; break;
258 case SND_SOC_DAIFMT_DSP_A: aic26->datfm = AIC26_DATFM_DSP; break;
259 case SND_SOC_DAIFMT_RIGHT_J: aic26->datfm = AIC26_DATFM_RIGHTJ; break;
260 case SND_SOC_DAIFMT_LEFT_J: aic26->datfm = AIC26_DATFM_LEFTJ; break;
261 default:
262 dev_dbg(&aic26->spi->dev, "bad format\n"); return -EINVAL;
265 return 0;
268 /* ---------------------------------------------------------------------
269 * Digital Audio Interface Definition
271 #define AIC26_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
272 SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
273 SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 |\
274 SNDRV_PCM_RATE_48000)
275 #define AIC26_FORMATS (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |\
276 SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE)
278 static struct snd_soc_dai_ops aic26_dai_ops = {
279 .hw_params = aic26_hw_params,
280 .digital_mute = aic26_mute,
281 .set_sysclk = aic26_set_sysclk,
282 .set_fmt = aic26_set_fmt,
285 static struct snd_soc_dai_driver aic26_dai = {
286 .name = "tlv320aic26-hifi",
287 .playback = {
288 .stream_name = "Playback",
289 .channels_min = 2,
290 .channels_max = 2,
291 .rates = AIC26_RATES,
292 .formats = AIC26_FORMATS,
294 .capture = {
295 .stream_name = "Capture",
296 .channels_min = 2,
297 .channels_max = 2,
298 .rates = AIC26_RATES,
299 .formats = AIC26_FORMATS,
301 .ops = &aic26_dai_ops,
304 /* ---------------------------------------------------------------------
305 * ALSA controls
307 static const char *aic26_capture_src_text[] = {"Mic", "Aux"};
308 static const struct soc_enum aic26_capture_src_enum =
309 SOC_ENUM_SINGLE(AIC26_REG_AUDIO_CTRL1, 12, 2, aic26_capture_src_text);
311 static const struct snd_kcontrol_new aic26_snd_controls[] = {
312 /* Output */
313 SOC_DOUBLE("PCM Playback Volume", AIC26_REG_DAC_GAIN, 8, 0, 0x7f, 1),
314 SOC_DOUBLE("PCM Playback Switch", AIC26_REG_DAC_GAIN, 15, 7, 1, 1),
315 SOC_SINGLE("PCM Capture Volume", AIC26_REG_ADC_GAIN, 8, 0x7f, 0),
316 SOC_SINGLE("PCM Capture Mute", AIC26_REG_ADC_GAIN, 15, 1, 1),
317 SOC_SINGLE("Keyclick activate", AIC26_REG_AUDIO_CTRL2, 15, 0x1, 0),
318 SOC_SINGLE("Keyclick amplitude", AIC26_REG_AUDIO_CTRL2, 12, 0x7, 0),
319 SOC_SINGLE("Keyclick frequency", AIC26_REG_AUDIO_CTRL2, 8, 0x7, 0),
320 SOC_SINGLE("Keyclick period", AIC26_REG_AUDIO_CTRL2, 4, 0xf, 0),
321 SOC_ENUM("Capture Source", aic26_capture_src_enum),
324 /* ---------------------------------------------------------------------
325 * SPI device portion of driver: sysfs files for debugging
328 static ssize_t aic26_keyclick_show(struct device *dev,
329 struct device_attribute *attr, char *buf)
331 struct aic26 *aic26 = dev_get_drvdata(dev);
332 int val, amp, freq, len;
334 val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
335 amp = (val >> 12) & 0x7;
336 freq = (125 << ((val >> 8) & 0x7)) >> 1;
337 len = 2 * (1 + ((val >> 4) & 0xf));
339 return sprintf(buf, "amp=%x freq=%iHz len=%iclks\n", amp, freq, len);
342 /* Any write to the keyclick attribute will trigger the keyclick event */
343 static ssize_t aic26_keyclick_set(struct device *dev,
344 struct device_attribute *attr,
345 const char *buf, size_t count)
347 struct aic26 *aic26 = dev_get_drvdata(dev);
348 int val;
350 val = aic26_reg_read_cache(&aic26->codec, AIC26_REG_AUDIO_CTRL2);
351 val |= 0x8000;
352 aic26_reg_write(&aic26->codec, AIC26_REG_AUDIO_CTRL2, val);
354 return count;
357 static DEVICE_ATTR(keyclick, 0644, aic26_keyclick_show, aic26_keyclick_set);
359 /* ---------------------------------------------------------------------
360 * SoC CODEC portion of driver: probe and release routines
362 static int aic26_probe(struct snd_soc_codec *codec)
364 int ret, err, i, reg;
366 dev_info(codec->dev, "Probing AIC26 SoC CODEC driver\n");
368 /* Reset the codec to power on defaults */
369 aic26_reg_write(codec, AIC26_REG_RESET, 0xBB00);
371 /* Power up CODEC */
372 aic26_reg_write(codec, AIC26_REG_POWER_CTRL, 0);
374 /* Audio Control 3 (master mode, fsref rate) */
375 reg = aic26_reg_read(codec, AIC26_REG_AUDIO_CTRL3);
376 reg &= ~0xf800;
377 reg |= 0x0800; /* set master mode */
378 aic26_reg_write(codec, AIC26_REG_AUDIO_CTRL3, reg);
380 /* Fill register cache */
381 for (i = 0; i < codec->driver->reg_cache_size; i++)
382 aic26_reg_read(codec, i);
384 /* Register the sysfs files for debugging */
385 /* Create SysFS files */
386 ret = device_create_file(codec->dev, &dev_attr_keyclick);
387 if (ret)
388 dev_info(codec->dev, "error creating sysfs files\n");
390 /* register controls */
391 dev_dbg(codec->dev, "Registering controls\n");
392 err = snd_soc_add_controls(codec, aic26_snd_controls,
393 ARRAY_SIZE(aic26_snd_controls));
394 WARN_ON(err < 0);
396 return 0;
399 static struct snd_soc_codec_driver aic26_soc_codec_dev = {
400 .probe = aic26_probe,
401 .read = aic26_reg_read,
402 .write = aic26_reg_write,
403 .reg_cache_size = AIC26_NUM_REGS,
404 .reg_word_size = sizeof(u16),
407 /* ---------------------------------------------------------------------
408 * SPI device portion of driver: probe and release routines and SPI
409 * driver registration.
411 static int aic26_spi_probe(struct spi_device *spi)
413 struct aic26 *aic26;
414 int ret;
416 dev_dbg(&spi->dev, "probing tlv320aic26 spi device\n");
418 /* Allocate driver data */
419 aic26 = kzalloc(sizeof *aic26, GFP_KERNEL);
420 if (!aic26)
421 return -ENOMEM;
423 /* Initialize the driver data */
424 aic26->spi = spi;
425 dev_set_drvdata(&spi->dev, aic26);
426 aic26->master = 1;
428 ret = snd_soc_register_codec(&spi->dev,
429 &aic26_soc_codec_dev, &aic26_dai, 1);
430 if (ret < 0)
431 kfree(aic26);
432 return ret;
434 dev_dbg(&spi->dev, "SPI device initialized\n");
435 return 0;
438 static int aic26_spi_remove(struct spi_device *spi)
440 snd_soc_unregister_codec(&spi->dev);
441 kfree(spi_get_drvdata(spi));
442 return 0;
445 static struct spi_driver aic26_spi = {
446 .driver = {
447 .name = "tlv320aic26-codec",
448 .owner = THIS_MODULE,
450 .probe = aic26_spi_probe,
451 .remove = aic26_spi_remove,
454 static int __init aic26_init(void)
456 return spi_register_driver(&aic26_spi);
458 module_init(aic26_init);
460 static void __exit aic26_exit(void)
462 spi_unregister_driver(&aic26_spi);
464 module_exit(aic26_exit);