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Input: wacom - fix touch parsing on newer Bamboos
[linux-btrfs-devel.git] / drivers / media / video / cx23885 / cx23885-dvb.c
blob3c315f94cc8512c33f6a43a264722411fcf43a93
1 /*
2 * Driver for the Conexant CX23885 PCIe bridge
3 *
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 *
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/device.h>
25 #include <linux/fs.h>
26 #include <linux/kthread.h>
27 #include <linux/file.h>
28 #include <linux/suspend.h>
29
30 #include "cx23885.h"
31 #include <media/v4l2-common.h>
32
33 #include "dvb_ca_en50221.h"
34 #include "s5h1409.h"
35 #include "s5h1411.h"
36 #include "mt2131.h"
37 #include "tda8290.h"
38 #include "tda18271.h"
39 #include "lgdt330x.h"
40 #include "xc5000.h"
41 #include "max2165.h"
42 #include "tda10048.h"
43 #include "tuner-xc2028.h"
44 #include "tuner-simple.h"
45 #include "dib7000p.h"
46 #include "dibx000_common.h"
47 #include "zl10353.h"
48 #include "stv0900.h"
49 #include "stv0900_reg.h"
50 #include "stv6110.h"
51 #include "lnbh24.h"
52 #include "cx24116.h"
53 #include "cimax2.h"
54 #include "lgs8gxx.h"
55 #include "netup-eeprom.h"
56 #include "netup-init.h"
57 #include "lgdt3305.h"
58 #include "atbm8830.h"
59 #include "ds3000.h"
60 #include "cx23885-f300.h"
61 #include "altera-ci.h"
62 #include "stv0367.h"
63
64 static unsigned int debug;
65
66 #define dprintk(level, fmt, arg...)\
67 do { if (debug >= level)\
68 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
69 } while (0)
70
71 /* ------------------------------------------------------------------ */
72
73 static unsigned int alt_tuner;
74 module_param(alt_tuner, int, 0644);
75 MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
76
77 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
78
79 /* ------------------------------------------------------------------ */
80
81 static int dvb_buf_setup(struct videobuf_queue *q,
82 unsigned int *count, unsigned int *size)
83 {
84 struct cx23885_tsport *port = q->priv_data;
85
86 port->ts_packet_size = 188 * 4;
87 port->ts_packet_count = 32;
88
89 *size = port->ts_packet_size * port->ts_packet_count;
90 *count = 32;
91 return 0;
92 }
93
94 static int dvb_buf_prepare(struct videobuf_queue *q,
95 struct videobuf_buffer *vb, enum v4l2_field field)
96 {
97 struct cx23885_tsport *port = q->priv_data;
98 return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field);
99 }
100
101 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
102 {
103 struct cx23885_tsport *port = q->priv_data;
104 cx23885_buf_queue(port, (struct cx23885_buffer *)vb);
105 }
106
107 static void dvb_buf_release(struct videobuf_queue *q,
108 struct videobuf_buffer *vb)
109 {
110 cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
111 }
112
113 static void cx23885_dvb_gate_ctrl(struct cx23885_tsport *port, int open)
114 {
115 struct videobuf_dvb_frontends *f;
116 struct videobuf_dvb_frontend *fe;
117
118 f = &port->frontends;
119
120 if (f->gate <= 1) /* undefined or fe0 */
121 fe = videobuf_dvb_get_frontend(f, 1);
122 else
123 fe = videobuf_dvb_get_frontend(f, f->gate);
124
125 if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl)
126 fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open);
127 }
128
129 static struct videobuf_queue_ops dvb_qops = {
130 .buf_setup = dvb_buf_setup,
131 .buf_prepare = dvb_buf_prepare,
132 .buf_queue = dvb_buf_queue,
133 .buf_release = dvb_buf_release,
134 };
135
136 static struct s5h1409_config hauppauge_generic_config = {
137 .demod_address = 0x32 >> 1,
138 .output_mode = S5H1409_SERIAL_OUTPUT,
139 .gpio = S5H1409_GPIO_ON,
140 .qam_if = 44000,
141 .inversion = S5H1409_INVERSION_OFF,
142 .status_mode = S5H1409_DEMODLOCKING,
143 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
144 };
145
146 static struct tda10048_config hauppauge_hvr1200_config = {
147 .demod_address = 0x10 >> 1,
148 .output_mode = TDA10048_SERIAL_OUTPUT,
149 .fwbulkwritelen = TDA10048_BULKWRITE_200,
150 .inversion = TDA10048_INVERSION_ON,
151 .dtv6_if_freq_khz = TDA10048_IF_3300,
152 .dtv7_if_freq_khz = TDA10048_IF_3800,
153 .dtv8_if_freq_khz = TDA10048_IF_4300,
154 .clk_freq_khz = TDA10048_CLK_16000,
155 };
156
157 static struct tda10048_config hauppauge_hvr1210_config = {
158 .demod_address = 0x10 >> 1,
159 .output_mode = TDA10048_SERIAL_OUTPUT,
160 .fwbulkwritelen = TDA10048_BULKWRITE_200,
161 .inversion = TDA10048_INVERSION_ON,
162 .dtv6_if_freq_khz = TDA10048_IF_3300,
163 .dtv7_if_freq_khz = TDA10048_IF_3500,
164 .dtv8_if_freq_khz = TDA10048_IF_4000,
165 .clk_freq_khz = TDA10048_CLK_16000,
166 };
167
168 static struct s5h1409_config hauppauge_ezqam_config = {
169 .demod_address = 0x32 >> 1,
170 .output_mode = S5H1409_SERIAL_OUTPUT,
171 .gpio = S5H1409_GPIO_OFF,
172 .qam_if = 4000,
173 .inversion = S5H1409_INVERSION_ON,
174 .status_mode = S5H1409_DEMODLOCKING,
175 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
176 };
177
178 static struct s5h1409_config hauppauge_hvr1800lp_config = {
179 .demod_address = 0x32 >> 1,
180 .output_mode = S5H1409_SERIAL_OUTPUT,
181 .gpio = S5H1409_GPIO_OFF,
182 .qam_if = 44000,
183 .inversion = S5H1409_INVERSION_OFF,
184 .status_mode = S5H1409_DEMODLOCKING,
185 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
186 };
187
188 static struct s5h1409_config hauppauge_hvr1500_config = {
189 .demod_address = 0x32 >> 1,
190 .output_mode = S5H1409_SERIAL_OUTPUT,
191 .gpio = S5H1409_GPIO_OFF,
192 .inversion = S5H1409_INVERSION_OFF,
193 .status_mode = S5H1409_DEMODLOCKING,
194 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
195 };
196
197 static struct mt2131_config hauppauge_generic_tunerconfig = {
198 0x61
199 };
200
201 static struct lgdt330x_config fusionhdtv_5_express = {
202 .demod_address = 0x0e,
203 .demod_chip = LGDT3303,
204 .serial_mpeg = 0x40,
205 };
206
207 static struct s5h1409_config hauppauge_hvr1500q_config = {
208 .demod_address = 0x32 >> 1,
209 .output_mode = S5H1409_SERIAL_OUTPUT,
210 .gpio = S5H1409_GPIO_ON,
211 .qam_if = 44000,
212 .inversion = S5H1409_INVERSION_OFF,
213 .status_mode = S5H1409_DEMODLOCKING,
214 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
215 };
216
217 static struct s5h1409_config dvico_s5h1409_config = {
218 .demod_address = 0x32 >> 1,
219 .output_mode = S5H1409_SERIAL_OUTPUT,
220 .gpio = S5H1409_GPIO_ON,
221 .qam_if = 44000,
222 .inversion = S5H1409_INVERSION_OFF,
223 .status_mode = S5H1409_DEMODLOCKING,
224 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
225 };
226
227 static struct s5h1411_config dvico_s5h1411_config = {
228 .output_mode = S5H1411_SERIAL_OUTPUT,
229 .gpio = S5H1411_GPIO_ON,
230 .qam_if = S5H1411_IF_44000,
231 .vsb_if = S5H1411_IF_44000,
232 .inversion = S5H1411_INVERSION_OFF,
233 .status_mode = S5H1411_DEMODLOCKING,
234 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
235 };
236
237 static struct s5h1411_config hcw_s5h1411_config = {
238 .output_mode = S5H1411_SERIAL_OUTPUT,
239 .gpio = S5H1411_GPIO_OFF,
240 .vsb_if = S5H1411_IF_44000,
241 .qam_if = S5H1411_IF_4000,
242 .inversion = S5H1411_INVERSION_ON,
243 .status_mode = S5H1411_DEMODLOCKING,
244 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
245 };
246
247 static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
248 .i2c_address = 0x61,
249 .if_khz = 5380,
250 };
251
252 static struct xc5000_config dvico_xc5000_tunerconfig = {
253 .i2c_address = 0x64,
254 .if_khz = 5380,
255 };
256
257 static struct tda829x_config tda829x_no_probe = {
258 .probe_tuner = TDA829X_DONT_PROBE,
259 };
260
261 static struct tda18271_std_map hauppauge_tda18271_std_map = {
262 .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
263 .if_lvl = 6, .rfagc_top = 0x37 },
264 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
265 .if_lvl = 6, .rfagc_top = 0x37 },
266 };
267
268 static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
269 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
270 .if_lvl = 1, .rfagc_top = 0x37, },
271 .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5,
272 .if_lvl = 1, .rfagc_top = 0x37, },
273 .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6,
274 .if_lvl = 1, .rfagc_top = 0x37, },
275 };
276
277 static struct tda18271_config hauppauge_tda18271_config = {
278 .std_map = &hauppauge_tda18271_std_map,
279 .gate = TDA18271_GATE_ANALOG,
280 .output_opt = TDA18271_OUTPUT_LT_OFF,
281 };
282
283 static struct tda18271_config hauppauge_hvr1200_tuner_config = {
284 .std_map = &hauppauge_hvr1200_tda18271_std_map,
285 .gate = TDA18271_GATE_ANALOG,
286 .output_opt = TDA18271_OUTPUT_LT_OFF,
287 };
288
289 static struct tda18271_config hauppauge_hvr1210_tuner_config = {
290 .gate = TDA18271_GATE_DIGITAL,
291 .output_opt = TDA18271_OUTPUT_LT_OFF,
292 };
293
294 static struct tda18271_std_map hauppauge_hvr127x_std_map = {
295 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
296 .if_lvl = 1, .rfagc_top = 0x58 },
297 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
298 .if_lvl = 1, .rfagc_top = 0x58 },
299 };
300
301 static struct tda18271_config hauppauge_hvr127x_config = {
302 .std_map = &hauppauge_hvr127x_std_map,
303 .output_opt = TDA18271_OUTPUT_LT_OFF,
304 };
305
306 static struct lgdt3305_config hauppauge_lgdt3305_config = {
307 .i2c_addr = 0x0e,
308 .mpeg_mode = LGDT3305_MPEG_SERIAL,
309 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
310 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
311 .deny_i2c_rptr = 1,
312 .spectral_inversion = 1,
313 .qam_if_khz = 4000,
314 .vsb_if_khz = 3250,
315 };
316
317 static struct dibx000_agc_config xc3028_agc_config = {
318 BAND_VHF | BAND_UHF, /* band_caps */
319
320 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
321 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
322 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
323 * P_agc_nb_est=2, P_agc_write=0
324 */
325 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
326 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
327
328 712, /* inv_gain */
329 21, /* time_stabiliz */
330
331 0, /* alpha_level */
332 118, /* thlock */
333
334 0, /* wbd_inv */
335 2867, /* wbd_ref */
336 0, /* wbd_sel */
337 2, /* wbd_alpha */
338
339 0, /* agc1_max */
340 0, /* agc1_min */
341 39718, /* agc2_max */
342 9930, /* agc2_min */
343 0, /* agc1_pt1 */
344 0, /* agc1_pt2 */
345 0, /* agc1_pt3 */
346 0, /* agc1_slope1 */
347 0, /* agc1_slope2 */
348 0, /* agc2_pt1 */
349 128, /* agc2_pt2 */
350 29, /* agc2_slope1 */
351 29, /* agc2_slope2 */
352
353 17, /* alpha_mant */
354 27, /* alpha_exp */
355 23, /* beta_mant */
356 51, /* beta_exp */
357
358 1, /* perform_agc_softsplit */
359 };
360
361 /* PLL Configuration for COFDM BW_MHz = 8.000000
362 * With external clock = 30.000000 */
363 static struct dibx000_bandwidth_config xc3028_bw_config = {
364 60000, /* internal */
365 30000, /* sampling */
366 1, /* pll_cfg: prediv */
367 8, /* pll_cfg: ratio */
368 3, /* pll_cfg: range */
369 1, /* pll_cfg: reset */
370 0, /* pll_cfg: bypass */
371 0, /* misc: refdiv */
372 0, /* misc: bypclk_div */
373 1, /* misc: IO_CLK_en_core */
374 1, /* misc: ADClkSrc */
375 0, /* misc: modulo */
376 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
377 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
378 20452225, /* timf */
379 30000000 /* xtal_hz */
380 };
381
382 static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
383 .output_mpeg2_in_188_bytes = 1,
384 .hostbus_diversity = 1,
385 .tuner_is_baseband = 0,
386 .update_lna = NULL,
387
388 .agc_config_count = 1,
389 .agc = &xc3028_agc_config,
390 .bw = &xc3028_bw_config,
391
392 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
393 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
394 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
395
396 .pwm_freq_div = 0,
397 .agc_control = NULL,
398 .spur_protect = 0,
399
400 .output_mode = OUTMODE_MPEG2_SERIAL,
401 };
402
403 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
404 .demod_address = 0x0f,
405 .if2 = 45600,
406 .no_tuner = 1,
407 .disable_i2c_gate_ctrl = 1,
408 };
409
410 static struct stv0900_reg stv0900_ts_regs[] = {
411 { R0900_TSGENERAL, 0x00 },
412 { R0900_P1_TSSPEED, 0x40 },
413 { R0900_P2_TSSPEED, 0x40 },
414 { R0900_P1_TSCFGM, 0xc0 },
415 { R0900_P2_TSCFGM, 0xc0 },
416 { R0900_P1_TSCFGH, 0xe0 },
417 { R0900_P2_TSCFGH, 0xe0 },
418 { R0900_P1_TSCFGL, 0x20 },
419 { R0900_P2_TSCFGL, 0x20 },
420 { 0xffff, 0xff }, /* terminate */
421 };
422
423 static struct stv0900_config netup_stv0900_config = {
424 .demod_address = 0x68,
425 .demod_mode = 1, /* dual */
426 .xtal = 8000000,
427 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
428 .diseqc_mode = 2,/* 2/3 PWM */
429 .ts_config_regs = stv0900_ts_regs,
430 .tun1_maddress = 0,/* 0x60 */
431 .tun2_maddress = 3,/* 0x63 */
432 .tun1_adc = 1,/* 1 Vpp */
433 .tun2_adc = 1,/* 1 Vpp */
434 };
435
436 static struct stv6110_config netup_stv6110_tunerconfig_a = {
437 .i2c_address = 0x60,
438 .mclk = 16000000,
439 .clk_div = 1,
440 .gain = 8, /* +16 dB - maximum gain */
441 };
442
443 static struct stv6110_config netup_stv6110_tunerconfig_b = {
444 .i2c_address = 0x63,
445 .mclk = 16000000,
446 .clk_div = 1,
447 .gain = 8, /* +16 dB - maximum gain */
448 };
449
450 static struct cx24116_config tbs_cx24116_config = {
451 .demod_address = 0x55,
452 };
453
454 static struct ds3000_config tevii_ds3000_config = {
455 .demod_address = 0x68,
456 };
457
458 static struct cx24116_config dvbworld_cx24116_config = {
459 .demod_address = 0x05,
460 };
461
462 static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
463 .prod = LGS8GXX_PROD_LGS8GL5,
464 .demod_address = 0x19,
465 .serial_ts = 0,
466 .ts_clk_pol = 1,
467 .ts_clk_gated = 1,
468 .if_clk_freq = 30400, /* 30.4 MHz */
469 .if_freq = 5380, /* 5.38 MHz */
470 .if_neg_center = 1,
471 .ext_adc = 0,
472 .adc_signed = 0,
473 .if_neg_edge = 0,
474 };
475
476 static struct xc5000_config mygica_x8506_xc5000_config = {
477 .i2c_address = 0x61,
478 .if_khz = 5380,
479 };
480
481 static int cx23885_dvb_set_frontend(struct dvb_frontend *fe,
482 struct dvb_frontend_parameters *param)
483 {
484 struct cx23885_tsport *port = fe->dvb->priv;
485 struct cx23885_dev *dev = port->dev;
486
487 switch (dev->board) {
488 case CX23885_BOARD_HAUPPAUGE_HVR1275:
489 switch (param->u.vsb.modulation) {
490 case VSB_8:
491 cx23885_gpio_clear(dev, GPIO_5);
492 break;
493 case QAM_64:
494 case QAM_256:
495 default:
496 cx23885_gpio_set(dev, GPIO_5);
497 break;
498 }
499 break;
500 case CX23885_BOARD_MYGICA_X8506:
501 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
502 /* Select Digital TV */
503 cx23885_gpio_set(dev, GPIO_0);
504 break;
505 }
506 return 0;
507 }
508
509 static int cx23885_dvb_fe_ioctl_override(struct dvb_frontend *fe,
510 unsigned int cmd, void *parg,
511 unsigned int stage)
512 {
513 int err = 0;
514
515 switch (stage) {
516 case DVB_FE_IOCTL_PRE:
517
518 switch (cmd) {
519 case FE_SET_FRONTEND:
520 err = cx23885_dvb_set_frontend(fe,
521 (struct dvb_frontend_parameters *) parg);
522 break;
523 }
524 break;
525
526 case DVB_FE_IOCTL_POST:
527 /* no post-ioctl handling required */
528 break;
529 }
530 return err;
531 };
532
533
534 static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
535 .prod = LGS8GXX_PROD_LGS8G75,
536 .demod_address = 0x19,
537 .serial_ts = 0,
538 .ts_clk_pol = 1,
539 .ts_clk_gated = 1,
540 .if_clk_freq = 30400, /* 30.4 MHz */
541 .if_freq = 6500, /* 6.50 MHz */
542 .if_neg_center = 1,
543 .ext_adc = 0,
544 .adc_signed = 1,
545 .adc_vpp = 2, /* 1.6 Vpp */
546 .if_neg_edge = 1,
547 };
548
549 static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
550 .i2c_address = 0x61,
551 .if_khz = 6500,
552 };
553
554 static struct atbm8830_config mygica_x8558pro_atbm8830_cfg1 = {
555 .prod = ATBM8830_PROD_8830,
556 .demod_address = 0x44,
557 .serial_ts = 0,
558 .ts_sampling_edge = 1,
559 .ts_clk_gated = 0,
560 .osc_clk_freq = 30400, /* in kHz */
561 .if_freq = 0, /* zero IF */
562 .zif_swap_iq = 1,
563 .agc_min = 0x2E,
564 .agc_max = 0xFF,
565 .agc_hold_loop = 0,
566 };
567
568 static struct max2165_config mygic_x8558pro_max2165_cfg1 = {
569 .i2c_address = 0x60,
570 .osc_clk = 20
571 };
572
573 static struct atbm8830_config mygica_x8558pro_atbm8830_cfg2 = {
574 .prod = ATBM8830_PROD_8830,
575 .demod_address = 0x44,
576 .serial_ts = 1,
577 .ts_sampling_edge = 1,
578 .ts_clk_gated = 0,
579 .osc_clk_freq = 30400, /* in kHz */
580 .if_freq = 0, /* zero IF */
581 .zif_swap_iq = 1,
582 .agc_min = 0x2E,
583 .agc_max = 0xFF,
584 .agc_hold_loop = 0,
585 };
586
587 static struct max2165_config mygic_x8558pro_max2165_cfg2 = {
588 .i2c_address = 0x60,
589 .osc_clk = 20
590 };
591 static struct stv0367_config netup_stv0367_config[] = {
592 {
593 .demod_address = 0x1c,
594 .xtal = 27000000,
595 .if_khz = 4500,
596 .if_iq_mode = 0,
597 .ts_mode = 1,
598 .clk_pol = 0,
599 }, {
600 .demod_address = 0x1d,
601 .xtal = 27000000,
602 .if_khz = 4500,
603 .if_iq_mode = 0,
604 .ts_mode = 1,
605 .clk_pol = 0,
606 },
607 };
608
609 static struct xc5000_config netup_xc5000_config[] = {
610 {
611 .i2c_address = 0x61,
612 .if_khz = 4500,
613 }, {
614 .i2c_address = 0x64,
615 .if_khz = 4500,
616 },
617 };
618
619 int netup_altera_fpga_rw(void *device, int flag, int data, int read)
620 {
621 struct cx23885_dev *dev = (struct cx23885_dev *)device;
622 unsigned long timeout = jiffies + msecs_to_jiffies(1);
623 uint32_t mem = 0;
624
625 mem = cx_read(MC417_RWD);
626 if (read)
627 cx_set(MC417_OEN, ALT_DATA);
628 else {
629 cx_clear(MC417_OEN, ALT_DATA);/* D0-D7 out */
630 mem &= ~ALT_DATA;
631 mem |= (data & ALT_DATA);
632 }
633
634 if (flag)
635 mem |= ALT_AD_RG;
636 else
637 mem &= ~ALT_AD_RG;
638
639 mem &= ~ALT_CS;
640 if (read)
641 mem = (mem & ~ALT_RD) | ALT_WR;
642 else
643 mem = (mem & ~ALT_WR) | ALT_RD;
644
645 cx_write(MC417_RWD, mem); /* start RW cycle */
646
647 for (;;) {
648 mem = cx_read(MC417_RWD);
649 if ((mem & ALT_RDY) == 0)
650 break;
651 if (time_after(jiffies, timeout))
652 break;
653 udelay(1);
654 }
655
656 cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS);
657 if (read)
658 return mem & ALT_DATA;
659
660 return 0;
661 };
662
663 static int dvb_register(struct cx23885_tsport *port)
664 {
665 struct cx23885_dev *dev = port->dev;
666 struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
667 struct videobuf_dvb_frontend *fe0, *fe1 = NULL;
668 int mfe_shared = 0; /* bus not shared by default */
669 int ret;
670
671 /* Get the first frontend */
672 fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
673 if (!fe0)
674 return -EINVAL;
675
676 /* init struct videobuf_dvb */
677 fe0->dvb.name = dev->name;
678
679 /* multi-frontend gate control is undefined or defaults to fe0 */
680 port->frontends.gate = 0;
681
682 /* Sets the gate control callback to be used by i2c command calls */
683 port->gate_ctrl = cx23885_dvb_gate_ctrl;
684
685 /* init frontend */
686 switch (dev->board) {
687 case CX23885_BOARD_HAUPPAUGE_HVR1250:
688 i2c_bus = &dev->i2c_bus[0];
689 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
690 &hauppauge_generic_config,
691 &i2c_bus->i2c_adap);
692 if (fe0->dvb.frontend != NULL) {
693 dvb_attach(mt2131_attach, fe0->dvb.frontend,
694 &i2c_bus->i2c_adap,
695 &hauppauge_generic_tunerconfig, 0);
696 }
697 break;
698 case CX23885_BOARD_HAUPPAUGE_HVR1270:
699 case CX23885_BOARD_HAUPPAUGE_HVR1275:
700 i2c_bus = &dev->i2c_bus[0];
701 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
702 &hauppauge_lgdt3305_config,
703 &i2c_bus->i2c_adap);
704 if (fe0->dvb.frontend != NULL) {
705 dvb_attach(tda18271_attach, fe0->dvb.frontend,
706 0x60, &dev->i2c_bus[1].i2c_adap,
707 &hauppauge_hvr127x_config);
708 }
709 break;
710 case CX23885_BOARD_HAUPPAUGE_HVR1255:
711 i2c_bus = &dev->i2c_bus[0];
712 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
713 &hcw_s5h1411_config,
714 &i2c_bus->i2c_adap);
715 if (fe0->dvb.frontend != NULL) {
716 dvb_attach(tda18271_attach, fe0->dvb.frontend,
717 0x60, &dev->i2c_bus[1].i2c_adap,
718 &hauppauge_tda18271_config);
719 }
720 break;
721 case CX23885_BOARD_HAUPPAUGE_HVR1800:
722 i2c_bus = &dev->i2c_bus[0];
723 switch (alt_tuner) {
724 case 1:
725 fe0->dvb.frontend =
726 dvb_attach(s5h1409_attach,
727 &hauppauge_ezqam_config,
728 &i2c_bus->i2c_adap);
729 if (fe0->dvb.frontend != NULL) {
730 dvb_attach(tda829x_attach, fe0->dvb.frontend,
731 &dev->i2c_bus[1].i2c_adap, 0x42,
732 &tda829x_no_probe);
733 dvb_attach(tda18271_attach, fe0->dvb.frontend,
734 0x60, &dev->i2c_bus[1].i2c_adap,
735 &hauppauge_tda18271_config);
736 }
737 break;
738 case 0:
739 default:
740 fe0->dvb.frontend =
741 dvb_attach(s5h1409_attach,
742 &hauppauge_generic_config,
743 &i2c_bus->i2c_adap);
744 if (fe0->dvb.frontend != NULL)
745 dvb_attach(mt2131_attach, fe0->dvb.frontend,
746 &i2c_bus->i2c_adap,
747 &hauppauge_generic_tunerconfig, 0);
748 break;
749 }
750 break;
751 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
752 i2c_bus = &dev->i2c_bus[0];
753 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
754 &hauppauge_hvr1800lp_config,
755 &i2c_bus->i2c_adap);
756 if (fe0->dvb.frontend != NULL) {
757 dvb_attach(mt2131_attach, fe0->dvb.frontend,
758 &i2c_bus->i2c_adap,
759 &hauppauge_generic_tunerconfig, 0);
760 }
761 break;
762 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
763 i2c_bus = &dev->i2c_bus[0];
764 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
765 &fusionhdtv_5_express,
766 &i2c_bus->i2c_adap);
767 if (fe0->dvb.frontend != NULL) {
768 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
769 &i2c_bus->i2c_adap, 0x61,
770 TUNER_LG_TDVS_H06XF);
771 }
772 break;
773 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
774 i2c_bus = &dev->i2c_bus[1];
775 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
776 &hauppauge_hvr1500q_config,
777 &dev->i2c_bus[0].i2c_adap);
778 if (fe0->dvb.frontend != NULL)
779 dvb_attach(xc5000_attach, fe0->dvb.frontend,
780 &i2c_bus->i2c_adap,
781 &hauppauge_hvr1500q_tunerconfig);
782 break;
783 case CX23885_BOARD_HAUPPAUGE_HVR1500:
784 i2c_bus = &dev->i2c_bus[1];
785 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
786 &hauppauge_hvr1500_config,
787 &dev->i2c_bus[0].i2c_adap);
788 if (fe0->dvb.frontend != NULL) {
789 struct dvb_frontend *fe;
790 struct xc2028_config cfg = {
791 .i2c_adap = &i2c_bus->i2c_adap,
792 .i2c_addr = 0x61,
793 };
794 static struct xc2028_ctrl ctl = {
795 .fname = XC2028_DEFAULT_FIRMWARE,
796 .max_len = 64,
797 .demod = XC3028_FE_OREN538,
798 };
799
800 fe = dvb_attach(xc2028_attach,
801 fe0->dvb.frontend, &cfg);
802 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
803 fe->ops.tuner_ops.set_config(fe, &ctl);
804 }
805 break;
806 case CX23885_BOARD_HAUPPAUGE_HVR1200:
807 case CX23885_BOARD_HAUPPAUGE_HVR1700:
808 i2c_bus = &dev->i2c_bus[0];
809 fe0->dvb.frontend = dvb_attach(tda10048_attach,
810 &hauppauge_hvr1200_config,
811 &i2c_bus->i2c_adap);
812 if (fe0->dvb.frontend != NULL) {
813 dvb_attach(tda829x_attach, fe0->dvb.frontend,
814 &dev->i2c_bus[1].i2c_adap, 0x42,
815 &tda829x_no_probe);
816 dvb_attach(tda18271_attach, fe0->dvb.frontend,
817 0x60, &dev->i2c_bus[1].i2c_adap,
818 &hauppauge_hvr1200_tuner_config);
819 }
820 break;
821 case CX23885_BOARD_HAUPPAUGE_HVR1210:
822 i2c_bus = &dev->i2c_bus[0];
823 fe0->dvb.frontend = dvb_attach(tda10048_attach,
824 &hauppauge_hvr1210_config,
825 &i2c_bus->i2c_adap);
826 if (fe0->dvb.frontend != NULL) {
827 dvb_attach(tda18271_attach, fe0->dvb.frontend,
828 0x60, &dev->i2c_bus[1].i2c_adap,
829 &hauppauge_hvr1210_tuner_config);
830 }
831 break;
832 case CX23885_BOARD_HAUPPAUGE_HVR1400:
833 i2c_bus = &dev->i2c_bus[0];
834 fe0->dvb.frontend = dvb_attach(dib7000p_attach,
835 &i2c_bus->i2c_adap,
836 0x12, &hauppauge_hvr1400_dib7000_config);
837 if (fe0->dvb.frontend != NULL) {
838 struct dvb_frontend *fe;
839 struct xc2028_config cfg = {
840 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
841 .i2c_addr = 0x64,
842 };
843 static struct xc2028_ctrl ctl = {
844 .fname = XC3028L_DEFAULT_FIRMWARE,
845 .max_len = 64,
846 .demod = 5000,
847 /* This is true for all demods with
848 v36 firmware? */
849 .type = XC2028_D2633,
850 };
851
852 fe = dvb_attach(xc2028_attach,
853 fe0->dvb.frontend, &cfg);
854 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
855 fe->ops.tuner_ops.set_config(fe, &ctl);
856 }
857 break;
858 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
859 i2c_bus = &dev->i2c_bus[port->nr - 1];
860
861 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
862 &dvico_s5h1409_config,
863 &i2c_bus->i2c_adap);
864 if (fe0->dvb.frontend == NULL)
865 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
866 &dvico_s5h1411_config,
867 &i2c_bus->i2c_adap);
868 if (fe0->dvb.frontend != NULL)
869 dvb_attach(xc5000_attach, fe0->dvb.frontend,
870 &i2c_bus->i2c_adap,
871 &dvico_xc5000_tunerconfig);
872 break;
873 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
874 i2c_bus = &dev->i2c_bus[port->nr - 1];
875
876 fe0->dvb.frontend = dvb_attach(zl10353_attach,
877 &dvico_fusionhdtv_xc3028,
878 &i2c_bus->i2c_adap);
879 if (fe0->dvb.frontend != NULL) {
880 struct dvb_frontend *fe;
881 struct xc2028_config cfg = {
882 .i2c_adap = &i2c_bus->i2c_adap,
883 .i2c_addr = 0x61,
884 };
885 static struct xc2028_ctrl ctl = {
886 .fname = XC2028_DEFAULT_FIRMWARE,
887 .max_len = 64,
888 .demod = XC3028_FE_ZARLINK456,
889 };
890
891 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
892 &cfg);
893 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
894 fe->ops.tuner_ops.set_config(fe, &ctl);
895 }
896 break;
897 }
898 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
899 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
900 case CX23885_BOARD_COMPRO_VIDEOMATE_E800:
901 i2c_bus = &dev->i2c_bus[0];
902
903 fe0->dvb.frontend = dvb_attach(zl10353_attach,
904 &dvico_fusionhdtv_xc3028,
905 &i2c_bus->i2c_adap);
906 if (fe0->dvb.frontend != NULL) {
907 struct dvb_frontend *fe;
908 struct xc2028_config cfg = {
909 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
910 .i2c_addr = 0x61,
911 };
912 static struct xc2028_ctrl ctl = {
913 .fname = XC2028_DEFAULT_FIRMWARE,
914 .max_len = 64,
915 .demod = XC3028_FE_ZARLINK456,
916 };
917
918 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
919 &cfg);
920 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
921 fe->ops.tuner_ops.set_config(fe, &ctl);
922 }
923 break;
924 case CX23885_BOARD_TBS_6920:
925 i2c_bus = &dev->i2c_bus[1];
926
927 fe0->dvb.frontend = dvb_attach(cx24116_attach,
928 &tbs_cx24116_config,
929 &i2c_bus->i2c_adap);
930 if (fe0->dvb.frontend != NULL)
931 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
932
933 break;
934 case CX23885_BOARD_TEVII_S470:
935 i2c_bus = &dev->i2c_bus[1];
936
937 fe0->dvb.frontend = dvb_attach(ds3000_attach,
938 &tevii_ds3000_config,
939 &i2c_bus->i2c_adap);
940 if (fe0->dvb.frontend != NULL)
941 fe0->dvb.frontend->ops.set_voltage = f300_set_voltage;
942
943 break;
944 case CX23885_BOARD_DVBWORLD_2005:
945 i2c_bus = &dev->i2c_bus[1];
946
947 fe0->dvb.frontend = dvb_attach(cx24116_attach,
948 &dvbworld_cx24116_config,
949 &i2c_bus->i2c_adap);
950 break;
951 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
952 i2c_bus = &dev->i2c_bus[0];
953 switch (port->nr) {
954 /* port B */
955 case 1:
956 fe0->dvb.frontend = dvb_attach(stv0900_attach,
957 &netup_stv0900_config,
958 &i2c_bus->i2c_adap, 0);
959 if (fe0->dvb.frontend != NULL) {
960 if (dvb_attach(stv6110_attach,
961 fe0->dvb.frontend,
962 &netup_stv6110_tunerconfig_a,
963 &i2c_bus->i2c_adap)) {
964 if (!dvb_attach(lnbh24_attach,
965 fe0->dvb.frontend,
966 &i2c_bus->i2c_adap,
967 LNBH24_PCL | LNBH24_TTX,
968 LNBH24_TEN, 0x09))
969 printk(KERN_ERR
970 "No LNBH24 found!\n");
971
972 }
973 }
974 break;
975 /* port C */
976 case 2:
977 fe0->dvb.frontend = dvb_attach(stv0900_attach,
978 &netup_stv0900_config,
979 &i2c_bus->i2c_adap, 1);
980 if (fe0->dvb.frontend != NULL) {
981 if (dvb_attach(stv6110_attach,
982 fe0->dvb.frontend,
983 &netup_stv6110_tunerconfig_b,
984 &i2c_bus->i2c_adap)) {
985 if (!dvb_attach(lnbh24_attach,
986 fe0->dvb.frontend,
987 &i2c_bus->i2c_adap,
988 LNBH24_PCL | LNBH24_TTX,
989 LNBH24_TEN, 0x0a))
990 printk(KERN_ERR
991 "No LNBH24 found!\n");
992
993 }
994 }
995 break;
996 }
997 break;
998 case CX23885_BOARD_MYGICA_X8506:
999 i2c_bus = &dev->i2c_bus[0];
1000 i2c_bus2 = &dev->i2c_bus[1];
1001 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1002 &mygica_x8506_lgs8gl5_config,
1003 &i2c_bus->i2c_adap);
1004 if (fe0->dvb.frontend != NULL) {
1005 dvb_attach(xc5000_attach,
1006 fe0->dvb.frontend,
1007 &i2c_bus2->i2c_adap,
1008 &mygica_x8506_xc5000_config);
1009 }
1010 break;
1011 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
1012 i2c_bus = &dev->i2c_bus[0];
1013 i2c_bus2 = &dev->i2c_bus[1];
1014 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1015 &magicpro_prohdtve2_lgs8g75_config,
1016 &i2c_bus->i2c_adap);
1017 if (fe0->dvb.frontend != NULL) {
1018 dvb_attach(xc5000_attach,
1019 fe0->dvb.frontend,
1020 &i2c_bus2->i2c_adap,
1021 &magicpro_prohdtve2_xc5000_config);
1022 }
1023 break;
1024 case CX23885_BOARD_HAUPPAUGE_HVR1850:
1025 case CX23885_BOARD_HAUPPAUGE_HVR1290:
1026 i2c_bus = &dev->i2c_bus[0];
1027 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1028 &hcw_s5h1411_config,
1029 &i2c_bus->i2c_adap);
1030 if (fe0->dvb.frontend != NULL)
1031 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1032 0x60, &dev->i2c_bus[0].i2c_adap,
1033 &hauppauge_tda18271_config);
1034 break;
1035 case CX23885_BOARD_MYGICA_X8558PRO:
1036 switch (port->nr) {
1037 /* port B */
1038 case 1:
1039 i2c_bus = &dev->i2c_bus[0];
1040 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1041 &mygica_x8558pro_atbm8830_cfg1,
1042 &i2c_bus->i2c_adap);
1043 if (fe0->dvb.frontend != NULL) {
1044 dvb_attach(max2165_attach,
1045 fe0->dvb.frontend,
1046 &i2c_bus->i2c_adap,
1047 &mygic_x8558pro_max2165_cfg1);
1048 }
1049 break;
1050 /* port C */
1051 case 2:
1052 i2c_bus = &dev->i2c_bus[1];
1053 fe0->dvb.frontend = dvb_attach(atbm8830_attach,
1054 &mygica_x8558pro_atbm8830_cfg2,
1055 &i2c_bus->i2c_adap);
1056 if (fe0->dvb.frontend != NULL) {
1057 dvb_attach(max2165_attach,
1058 fe0->dvb.frontend,
1059 &i2c_bus->i2c_adap,
1060 &mygic_x8558pro_max2165_cfg2);
1061 }
1062 break;
1063 }
1064 break;
1065 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1066 i2c_bus = &dev->i2c_bus[0];
1067 mfe_shared = 1;/* MFE */
1068 port->frontends.gate = 0;/* not clear for me yet */
1069 /* ports B, C */
1070 /* MFE frontend 1 DVB-T */
1071 fe0->dvb.frontend = dvb_attach(stv0367ter_attach,
1072 &netup_stv0367_config[port->nr - 1],
1073 &i2c_bus->i2c_adap);
1074 if (fe0->dvb.frontend != NULL) {
1075 if (NULL == dvb_attach(xc5000_attach,
1076 fe0->dvb.frontend,
1077 &i2c_bus->i2c_adap,
1078 &netup_xc5000_config[port->nr - 1]))
1079 goto frontend_detach;
1080 /* load xc5000 firmware */
1081 fe0->dvb.frontend->ops.tuner_ops.init(fe0->dvb.frontend);
1082 }
1083 /* MFE frontend 2 */
1084 fe1 = videobuf_dvb_get_frontend(&port->frontends, 2);
1085 if (fe1 == NULL)
1086 goto frontend_detach;
1087 /* DVB-C init */
1088 fe1->dvb.frontend = dvb_attach(stv0367cab_attach,
1089 &netup_stv0367_config[port->nr - 1],
1090 &i2c_bus->i2c_adap);
1091 if (fe1->dvb.frontend != NULL) {
1092 fe1->dvb.frontend->id = 1;
1093 if (NULL == dvb_attach(xc5000_attach,
1094 fe1->dvb.frontend,
1095 &i2c_bus->i2c_adap,
1096 &netup_xc5000_config[port->nr - 1]))
1097 goto frontend_detach;
1098 }
1099 break;
1100 default:
1101 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
1102 " isn't supported yet\n",
1103 dev->name);
1104 break;
1105 }
1106
1107 if ((NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend)) {
1108 printk(KERN_ERR "%s: frontend initialization failed\n",
1109 dev->name);
1110 goto frontend_detach;
1111 }
1112
1113 /* define general-purpose callback pointer */
1114 fe0->dvb.frontend->callback = cx23885_tuner_callback;
1115 if (fe1)
1116 fe1->dvb.frontend->callback = cx23885_tuner_callback;
1117 #if 0
1118 /* Ensure all frontends negotiate bus access */
1119 fe0->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
1120 if (fe1)
1121 fe1->dvb.frontend->ops.ts_bus_ctrl = cx23885_dvb_bus_ctrl;
1122 #endif
1123
1124 /* Put the analog decoder in standby to keep it quiet */
1125 call_all(dev, core, s_power, 0);
1126
1127 if (fe0->dvb.frontend->ops.analog_ops.standby)
1128 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
1129
1130 /* register everything */
1131 ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
1132 &dev->pci->dev, adapter_nr, mfe_shared,
1133 cx23885_dvb_fe_ioctl_override);
1134 if (ret)
1135 goto frontend_detach;
1136
1137 /* init CI & MAC */
1138 switch (dev->board) {
1139 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
1140 static struct netup_card_info cinfo;
1141
1142 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
1143 memcpy(port->frontends.adapter.proposed_mac,
1144 cinfo.port[port->nr - 1].mac, 6);
1145 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC=%pM\n",
1146 port->nr, port->frontends.adapter.proposed_mac);
1147
1148 netup_ci_init(port);
1149 break;
1150 }
1151 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF: {
1152 struct altera_ci_config netup_ci_cfg = {
1153 .dev = dev,/* magic number to identify*/
1154 .adapter = &port->frontends.adapter,/* for CI */
1155 .demux = &fe0->dvb.demux,/* for hw pid filter */
1156 .fpga_rw = netup_altera_fpga_rw,
1157 };
1158
1159 altera_ci_init(&netup_ci_cfg, port->nr);
1160 break;
1161 }
1162 case CX23885_BOARD_TEVII_S470: {
1163 u8 eeprom[256]; /* 24C02 i2c eeprom */
1164
1165 if (port->nr != 1)
1166 break;
1167
1168 /* Read entire EEPROM */
1169 dev->i2c_bus[0].i2c_client.addr = 0xa0 >> 1;
1170 tveeprom_read(&dev->i2c_bus[0].i2c_client, eeprom, sizeof(eeprom));
1171 printk(KERN_INFO "TeVii S470 MAC= %pM\n", eeprom + 0xa0);
1172 memcpy(port->frontends.adapter.proposed_mac, eeprom + 0xa0, 6);
1173 break;
1174 }
1175 }
1176
1177 return ret;
1178
1179 frontend_detach:
1180 port->gate_ctrl = NULL;
1181 videobuf_dvb_dealloc_frontends(&port->frontends);
1182 return -EINVAL;
1183 }
1184
1185 int cx23885_dvb_register(struct cx23885_tsport *port)
1186 {
1187
1188 struct videobuf_dvb_frontend *fe0;
1189 struct cx23885_dev *dev = port->dev;
1190 int err, i;
1191
1192 /* Here we need to allocate the correct number of frontends,
1193 * as reflected in the cards struct. The reality is that currently
1194 * no cx23885 boards support this - yet. But, if we don't modify this
1195 * code then the second frontend would never be allocated (later)
1196 * and fail with error before the attach in dvb_register().
1197 * Without these changes we risk an OOPS later. The changes here
1198 * are for safety, and should provide a good foundation for the
1199 * future addition of any multi-frontend cx23885 based boards.
1200 */
1201 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
1202 port->num_frontends);
1203
1204 for (i = 1; i <= port->num_frontends; i++) {
1205 if (videobuf_dvb_alloc_frontend(
1206 &port->frontends, i) == NULL) {
1207 printk(KERN_ERR "%s() failed to alloc\n", __func__);
1208 return -ENOMEM;
1209 }
1210
1211 fe0 = videobuf_dvb_get_frontend(&port->frontends, i);
1212 if (!fe0)
1213 err = -EINVAL;
1214
1215 dprintk(1, "%s\n", __func__);
1216 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
1217 dev->board,
1218 dev->name,
1219 dev->pci_bus,
1220 dev->pci_slot);
1221
1222 err = -ENODEV;
1223
1224 /* dvb stuff */
1225 /* We have to init the queue for each frontend on a port. */
1226 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
1227 videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops,
1228 &dev->pci->dev, &port->slock,
1229 V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
1230 sizeof(struct cx23885_buffer), port, NULL);
1231 }
1232 err = dvb_register(port);
1233 if (err != 0)
1234 printk(KERN_ERR "%s() dvb_register failed err = %d\n",
1235 __func__, err);
1236
1237 return err;
1238 }
1239
1240 int cx23885_dvb_unregister(struct cx23885_tsport *port)
1241 {
1242 struct videobuf_dvb_frontend *fe0;
1243
1244 /* FIXME: in an error condition where the we have
1245 * an expected number of frontends (attach problem)
1246 * then this might not clean up correctly, if 1
1247 * is invalid.
1248 * This comment only applies to future boards IF they
1249 * implement MFE support.
1250 */
1251 fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
1252 if (fe0->dvb.frontend)
1253 videobuf_dvb_unregister_bus(&port->frontends);
1254
1255 switch (port->dev->board) {
1256 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1257 netup_ci_exit(port);
1258 break;
1259 case CX23885_BOARD_NETUP_DUAL_DVB_T_C_CI_RF:
1260 altera_ci_release(port->dev, port->nr);
1261 break;
1262 }
1263
1264 port->gate_ctrl = NULL;
1265
1266 return 0;
1267 }
1268
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