arch/arm/mach-s5p64x0/include/mach/uncompress.h

   1 /* linux/arch/arm/mach-s5p64x0/include/mach/uncompress.h
   2  *
   3  * Copyright (c) 2009-2010 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * S5P64X0 - uncompress code
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License version 2 as
  10  * published by the Free Software Foundation.
  11 */
  12
  13 #ifndef __ASM_ARCH_UNCOMPRESS_H
  14 #define __ASM_ARCH_UNCOMPRESS_H
  15
  16 #include <mach/map.h>
  17
  18 /*
  19  * cannot use commonly <plat/uncompress.h>
  20  * because uart base of S5P6440 and S5P6450 is different
  21  */
  22
  23 typedef unsigned int upf_t;     /* cannot include linux/serial_core.h */
  24
  25 /* uart setup */
  26
  27 unsigned int fifo_mask;
  28 unsigned int fifo_max;
  29
  30 /* forward declerations */
  31
  32 static void arch_detect_cpu(void);
  33
  34 /* defines for UART registers */
  35
  36 #include <plat/regs-serial.h>
  37 #include <plat/regs-watchdog.h>
  38
  39 /* working in physical space... */
  40 #undef S3C2410_WDOGREG
  41 #define S3C2410_WDOGREG(x) ((S3C24XX_PA_WATCHDOG + (x)))
  42
  43 /* how many bytes we allow into the FIFO at a time in FIFO mode */
  44 #define FIFO_MAX         (14)
  45
  46 unsigned long uart_base;
  47
  48 static __inline__ void get_uart_base(void)
  49 {
  50         unsigned int chipid;
  51
  52         chipid = *(const volatile unsigned int __force *) 0xE0100118;
  53
  54         uart_base = S3C_UART_OFFSET * CONFIG_S3C_LOWLEVEL_UART_PORT;
  55
  56         if ((chipid & 0xff000) == 0x50000)
  57                 uart_base += 0xEC800000;
  58         else
  59                 uart_base += 0xEC000000;
  60 }
  61
  62 static __inline__ void uart_wr(unsigned int reg, unsigned int val)
  63 {
  64         volatile unsigned int *ptr;
  65
  66         get_uart_base();
  67         ptr = (volatile unsigned int *)(reg + uart_base);
  68         *ptr = val;
  69 }
  70
  71 static __inline__ unsigned int uart_rd(unsigned int reg)
  72 {
  73         volatile unsigned int *ptr;
  74
  75         get_uart_base();
  76         ptr = (volatile unsigned int *)(reg + uart_base);
  77         return *ptr;
  78 }
  79
  80 /*
  81  * we can deal with the case the UARTs are being run
  82  * in FIFO mode, so that we don't hold up our execution
  83  * waiting for tx to happen...
  84  */
  85
  86 static void putc(int ch)
  87 {
  88         if (uart_rd(S3C2410_UFCON) & S3C2410_UFCON_FIFOMODE) {
  89                 int level;
  90
  91                 while (1) {
  92                         level = uart_rd(S3C2410_UFSTAT);
  93                         level &= fifo_mask;
  94
  95                         if (level < fifo_max)
  96                                 break;
  97                 }
  98
  99         } else {
 100                 /* not using fifos */
 101
 102                 while ((uart_rd(S3C2410_UTRSTAT) & S3C2410_UTRSTAT_TXE) != S3C2410_UTRSTAT_TXE)
 103                         barrier();
 104         }
 105
 106         /* write byte to transmission register */
 107         uart_wr(S3C2410_UTXH, ch);
 108 }
 109
 110 static inline void flush(void)
 111 {
 112 }
 113
 114 #define __raw_writel(d, ad)                     \
 115         do {                                                    \
 116                 *((volatile unsigned int __force *)(ad)) = (d); \
 117         } while (0)
 118
 119 /*
 120  * CONFIG_S3C_BOOT_WATCHDOG
 121  *
 122  * Simple boot-time watchdog setup, to reboot the system if there is
 123  * any problem with the boot process
 124  */
 125
 126 #ifdef CONFIG_S3C_BOOT_WATCHDOG
 127
 128 #define WDOG_COUNT (0xff00)
 129
 130 static inline void arch_decomp_wdog(void)
 131 {
 132         __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
 133 }
 134
 135 static void arch_decomp_wdog_start(void)
 136 {
 137         __raw_writel(WDOG_COUNT, S3C2410_WTDAT);
 138         __raw_writel(WDOG_COUNT, S3C2410_WTCNT);
 139         __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x80), S3C2410_WTCON);
 140 }
 141
 142 #else
 143 #define arch_decomp_wdog_start()
 144 #define arch_decomp_wdog()
 145 #endif
 146
 147 #ifdef CONFIG_S3C_BOOT_ERROR_RESET
 148
 149 static void arch_decomp_error(const char *x)
 150 {
 151         putstr("\n\n");
 152         putstr(x);
 153         putstr("\n\n -- System resetting\n");
 154
 155         __raw_writel(0x4000, S3C2410_WTDAT);
 156         __raw_writel(0x4000, S3C2410_WTCNT);
 157         __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV128 | S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x40), S3C2410_WTCON);
 158
 159         while(1);
 160 }
 161
 162 #define arch_error arch_decomp_error
 163 #endif
 164
 165 #ifdef CONFIG_S3C_BOOT_UART_FORCE_FIFO
 166 static inline void arch_enable_uart_fifo(void)
 167 {
 168         u32 fifocon = uart_rd(S3C2410_UFCON);
 169
 170         if (!(fifocon & S3C2410_UFCON_FIFOMODE)) {
 171                 fifocon |= S3C2410_UFCON_RESETBOTH;
 172                 uart_wr(S3C2410_UFCON, fifocon);
 173
 174                 /* wait for fifo reset to complete */
 175                 while (1) {
 176                         fifocon = uart_rd(S3C2410_UFCON);
 177                         if (!(fifocon & S3C2410_UFCON_RESETBOTH))
 178                                 break;
 179                 }
 180         }
 181 }
 182 #else
 183 #define arch_enable_uart_fifo() do { } while(0)
 184 #endif
 185
 186 static void arch_decomp_setup(void)
 187 {
 188         /*
 189          * we may need to setup the uart(s) here if we are not running
 190          * on an BAST... the BAST will have left the uarts configured
 191          * after calling linux.
 192          */
 193
 194         arch_detect_cpu();
 195         arch_decomp_wdog_start();
 196
 197         /*
 198          * Enable the UART FIFOs if they where not enabled and our
 199          * configuration says we should turn them on.
 200          */
 201
 202         arch_enable_uart_fifo();
 203 }
 204
 205
 206
 207 static void arch_detect_cpu(void)
 208 {
 209         /* we do not need to do any cpu detection here at the moment. */
 210 }
 211
 212 #endif /* __ASM_ARCH_UNCOMPRESS_H */