| blob | 41b02c792aa387b43c16f8d861564be1482cde01 |
1 /*
2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
6 *
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
9 *
10 * Most of this originates from head_64.S and thus has the same
11 * copyright history.
12 *
13 */
15 #include <asm/exception-64s.h>
16 #include <asm/ptrace.h>
18 /*
19 * We layout physical memory as follows:
20 * 0x0000 - 0x00ff : Secondary processor spin code
21 * 0x0100 - 0x2fff : pSeries Interrupt prologs
22 * 0x3000 - 0x5fff : interrupt support, iSeries and common interrupt prologs
23 * 0x6000 - 0x6fff : Initial (CPU0) segment table
24 * 0x7000 - 0x7fff : FWNMI data area
25 * 0x8000 - : Early init and support code
26 */
28 /*
29 * This is the start of the interrupt handlers for pSeries
30 * This code runs with relocation off.
31 * Code from here to __end_interrupts gets copied down to real
32 * address 0x100 when we are running a relocatable kernel.
33 * Therefore any relative branches in this section must only
34 * branch to labels in this section.
35 */
36 . = 0x100
37 .globl __start_interrupts
38 __start_interrupts:
40 .globl system_reset_pSeries;
41 system_reset_pSeries:
42 HMT_MEDIUM;
43 SET_SCRATCH0(r13)
44 #ifdef CONFIG_PPC_P7_NAP
45 BEGIN_FTR_SECTION
46 /* Running native on arch 2.06 or later, check if we are
47 * waking up from nap. We only handle no state loss and
48 * supervisor state loss. We do -not- handle hypervisor
49 * state loss at this time.
50 */
51 mfspr r13,SPRN_SRR1
52 rlwinm. r13,r13,47-31,30,31
53 beq 9f
55 /* waking up from powersave (nap) state */
56 cmpwi cr1,r13,2
57 /* Total loss of HV state is fatal, we could try to use the
58 * PIR to locate a PACA, then use an emergency stack etc...
59 * but for now, let's just stay stuck here
60 */
61 bgt cr1,.
62 GET_PACA(r13)
64 #ifdef CONFIG_KVM_BOOK3S_64_HV
65 lbz r0,PACAPROCSTART(r13)
66 cmpwi r0,0x80
67 bne 1f
68 li r0,0
69 stb r0,PACAPROCSTART(r13)
70 b kvm_start_guest
71 1:
72 #endif
74 beq cr1,2f
75 b .power7_wakeup_noloss
76 2: b .power7_wakeup_loss
77 9:
78 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
79 #endif /* CONFIG_PPC_P7_NAP */
80 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
81 NOTEST, 0x100)
83 . = 0x200
84 machine_check_pSeries_1:
85 /* This is moved out of line as it can be patched by FW, but
86 * some code path might still want to branch into the original
87 * vector
88 */
89 b machine_check_pSeries
91 . = 0x300
92 .globl data_access_pSeries
93 data_access_pSeries:
94 HMT_MEDIUM
95 SET_SCRATCH0(r13)
96 #ifndef CONFIG_POWER4_ONLY
97 BEGIN_FTR_SECTION
98 b data_access_check_stab
99 data_access_not_stab:
100 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
101 #endif
102 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
103 KVMTEST_PR, 0x300)
105 . = 0x380
106 .globl data_access_slb_pSeries
107 data_access_slb_pSeries:
108 HMT_MEDIUM
109 SET_SCRATCH0(r13)
110 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x380)
111 std r3,PACA_EXSLB+EX_R3(r13)
112 mfspr r3,SPRN_DAR
113 #ifdef __DISABLED__
114 /* Keep that around for when we re-implement dynamic VSIDs */
115 cmpdi r3,0
116 bge slb_miss_user_pseries
117 #endif /* __DISABLED__ */
118 mfspr r12,SPRN_SRR1
119 #ifndef CONFIG_RELOCATABLE
120 b .slb_miss_realmode
121 #else
122 /*
123 * We can't just use a direct branch to .slb_miss_realmode
124 * because the distance from here to there depends on where
125 * the kernel ends up being put.
126 */
127 mfctr r11
128 ld r10,PACAKBASE(r13)
129 LOAD_HANDLER(r10, .slb_miss_realmode)
130 mtctr r10
131 bctr
132 #endif
134 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
136 . = 0x480
137 .globl instruction_access_slb_pSeries
138 instruction_access_slb_pSeries:
139 HMT_MEDIUM
140 SET_SCRATCH0(r13)
141 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
142 std r3,PACA_EXSLB+EX_R3(r13)
143 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
144 #ifdef __DISABLED__
145 /* Keep that around for when we re-implement dynamic VSIDs */
146 cmpdi r3,0
147 bge slb_miss_user_pseries
148 #endif /* __DISABLED__ */
149 mfspr r12,SPRN_SRR1
150 #ifndef CONFIG_RELOCATABLE
151 b .slb_miss_realmode
152 #else
153 mfctr r11
154 ld r10,PACAKBASE(r13)
155 LOAD_HANDLER(r10, .slb_miss_realmode)
156 mtctr r10
157 bctr
158 #endif
160 /* We open code these as we can't have a ". = x" (even with
161 * x = "." within a feature section
162 */
163 . = 0x500;
164 .globl hardware_interrupt_pSeries;
165 .globl hardware_interrupt_hv;
166 hardware_interrupt_pSeries:
167 hardware_interrupt_hv:
168 BEGIN_FTR_SECTION
169 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
170 EXC_HV, SOFTEN_TEST_HV)
171 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
172 FTR_SECTION_ELSE
173 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
174 EXC_STD, SOFTEN_TEST_HV_201)
175 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
176 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
178 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
179 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
181 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
182 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
184 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
185 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
187 MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
188 MASKABLE_EXCEPTION_HV(0x980, 0x982, decrementer)
190 STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a)
191 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
193 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
194 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
196 . = 0xc00
197 .globl system_call_pSeries
198 system_call_pSeries:
199 HMT_MEDIUM
200 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
201 SET_SCRATCH0(r13)
202 GET_PACA(r13)
203 std r9,PACA_EXGEN+EX_R9(r13)
204 std r10,PACA_EXGEN+EX_R10(r13)
205 mfcr r9
206 KVMTEST(0xc00)
207 GET_SCRATCH0(r13)
208 #endif
209 BEGIN_FTR_SECTION
210 cmpdi r0,0x1ebe
211 beq- 1f
212 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
213 mr r9,r13
214 GET_PACA(r13)
215 mfspr r11,SPRN_SRR0
216 mfspr r12,SPRN_SRR1
217 ld r10,PACAKBASE(r13)
218 LOAD_HANDLER(r10, system_call_entry)
219 mtspr SPRN_SRR0,r10
220 ld r10,PACAKMSR(r13)
221 mtspr SPRN_SRR1,r10
222 rfid
223 b . /* prevent speculative execution */
225 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
227 /* Fast LE/BE switch system call */
228 1: mfspr r12,SPRN_SRR1
229 xori r12,r12,MSR_LE
230 mtspr SPRN_SRR1,r12
231 rfid /* return to userspace */
232 b .
234 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
235 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
237 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
238 * out of line to handle them
239 */
240 . = 0xe00
241 b h_data_storage_hv
242 . = 0xe20
243 b h_instr_storage_hv
244 . = 0xe40
245 b emulation_assist_hv
246 . = 0xe50
247 b hmi_exception_hv
248 . = 0xe60
249 b hmi_exception_hv
251 /* We need to deal with the Altivec unavailable exception
252 * here which is at 0xf20, thus in the middle of the
253 * prolog code of the PerformanceMonitor one. A little
254 * trickery is thus necessary
255 */
256 performance_monitor_pSeries_1:
257 . = 0xf00
258 b performance_monitor_pSeries
260 altivec_unavailable_pSeries_1:
261 . = 0xf20
262 b altivec_unavailable_pSeries
264 vsx_unavailable_pSeries_1:
265 . = 0xf40
266 b vsx_unavailable_pSeries
268 #ifdef CONFIG_CBE_RAS
269 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
270 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
271 #endif /* CONFIG_CBE_RAS */
273 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
274 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
276 #ifdef CONFIG_CBE_RAS
277 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
278 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
279 #endif /* CONFIG_CBE_RAS */
281 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
282 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
284 #ifdef CONFIG_CBE_RAS
285 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
286 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
287 #endif /* CONFIG_CBE_RAS */
289 . = 0x3000
291 /*** Out of line interrupts support ***/
293 /* moved from 0x200 */
294 machine_check_pSeries:
295 .globl machine_check_fwnmi
296 machine_check_fwnmi:
297 HMT_MEDIUM
298 SET_SCRATCH0(r13) /* save r13 */
299 EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common,
300 EXC_STD, KVMTEST, 0x200)
301 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
303 #ifndef CONFIG_POWER4_ONLY
304 /* moved from 0x300 */
305 data_access_check_stab:
306 GET_PACA(r13)
307 std r9,PACA_EXSLB+EX_R9(r13)
308 std r10,PACA_EXSLB+EX_R10(r13)
309 mfspr r10,SPRN_DAR
310 mfspr r9,SPRN_DSISR
311 srdi r10,r10,60
312 rlwimi r10,r9,16,0x20
313 #ifdef CONFIG_KVM_BOOK3S_PR
314 lbz r9,HSTATE_IN_GUEST(r13)
315 rlwimi r10,r9,8,0x300
316 #endif
317 mfcr r9
318 cmpwi r10,0x2c
319 beq do_stab_bolted_pSeries
320 mtcrf 0x80,r9
321 ld r9,PACA_EXSLB+EX_R9(r13)
322 ld r10,PACA_EXSLB+EX_R10(r13)
323 b data_access_not_stab
324 do_stab_bolted_pSeries:
325 std r11,PACA_EXSLB+EX_R11(r13)
326 std r12,PACA_EXSLB+EX_R12(r13)
327 GET_SCRATCH0(r10)
328 std r10,PACA_EXSLB+EX_R13(r13)
329 EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
330 #endif /* CONFIG_POWER4_ONLY */
332 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x300)
333 KVM_HANDLER_PR_SKIP(PACA_EXSLB, EXC_STD, 0x380)
334 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
335 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
336 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
337 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
339 .align 7
340 /* moved from 0xe00 */
341 STD_EXCEPTION_HV(., 0xe02, h_data_storage)
342 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
343 STD_EXCEPTION_HV(., 0xe22, h_instr_storage)
344 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
345 STD_EXCEPTION_HV(., 0xe42, emulation_assist)
346 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
347 STD_EXCEPTION_HV(., 0xe62, hmi_exception) /* need to flush cache ? */
348 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
350 /* moved from 0xf00 */
351 STD_EXCEPTION_PSERIES(., 0xf00, performance_monitor)
352 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
353 STD_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable)
354 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
355 STD_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable)
356 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
358 /*
359 * An interrupt came in while soft-disabled; clear EE in SRR1,
360 * clear paca->hard_enabled and return.
361 */
362 masked_interrupt:
363 stb r10,PACAHARDIRQEN(r13)
364 mtcrf 0x80,r9
365 ld r9,PACA_EXGEN+EX_R9(r13)
366 mfspr r10,SPRN_SRR1
367 rldicl r10,r10,48,1 /* clear MSR_EE */
368 rotldi r10,r10,16
369 mtspr SPRN_SRR1,r10
370 ld r10,PACA_EXGEN+EX_R10(r13)
371 GET_SCRATCH0(r13)
372 rfid
373 b .
375 masked_Hinterrupt:
376 stb r10,PACAHARDIRQEN(r13)
377 mtcrf 0x80,r9
378 ld r9,PACA_EXGEN+EX_R9(r13)
379 mfspr r10,SPRN_HSRR1
380 rldicl r10,r10,48,1 /* clear MSR_EE */
381 rotldi r10,r10,16
382 mtspr SPRN_HSRR1,r10
383 ld r10,PACA_EXGEN+EX_R10(r13)
384 GET_SCRATCH0(r13)
385 hrfid
386 b .
388 #ifdef CONFIG_PPC_PSERIES
389 /*
390 * Vectors for the FWNMI option. Share common code.
391 */
392 .globl system_reset_fwnmi
393 .align 7
394 system_reset_fwnmi:
395 HMT_MEDIUM
396 SET_SCRATCH0(r13) /* save r13 */
397 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
398 NOTEST, 0x100)
400 #endif /* CONFIG_PPC_PSERIES */
402 #ifdef __DISABLED__
403 /*
404 * This is used for when the SLB miss handler has to go virtual,
405 * which doesn't happen for now anymore but will once we re-implement
406 * dynamic VSIDs for shared page tables
407 */
408 slb_miss_user_pseries:
409 std r10,PACA_EXGEN+EX_R10(r13)
410 std r11,PACA_EXGEN+EX_R11(r13)
411 std r12,PACA_EXGEN+EX_R12(r13)
412 GET_SCRATCH0(r10)
413 ld r11,PACA_EXSLB+EX_R9(r13)
414 ld r12,PACA_EXSLB+EX_R3(r13)
415 std r10,PACA_EXGEN+EX_R13(r13)
416 std r11,PACA_EXGEN+EX_R9(r13)
417 std r12,PACA_EXGEN+EX_R3(r13)
418 clrrdi r12,r13,32
419 mfmsr r10
420 mfspr r11,SRR0 /* save SRR0 */
421 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
422 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
423 mtspr SRR0,r12
424 mfspr r12,SRR1 /* and SRR1 */
425 mtspr SRR1,r10
426 rfid
427 b . /* prevent spec. execution */
428 #endif /* __DISABLED__ */
430 /* KVM's trampoline code needs to be close to the interrupt handlers */
432 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
433 #ifdef CONFIG_KVM_BOOK3S_PR
434 #include "../kvm/book3s_rmhandlers.S"
435 #else
436 #include "../kvm/book3s_hv_rmhandlers.S"
437 #endif
438 #endif
440 .align 7
441 .globl __end_interrupts
442 __end_interrupts:
444 /*
445 * Code from here down to __end_handlers is invoked from the
446 * exception prologs above. Because the prologs assemble the
447 * addresses of these handlers using the LOAD_HANDLER macro,
448 * which uses an addi instruction, these handlers must be in
449 * the first 32k of the kernel image.
450 */
452 /*** Common interrupt handlers ***/
454 STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
456 /*
457 * Machine check is different because we use a different
458 * save area: PACA_EXMC instead of PACA_EXGEN.
459 */
460 .align 7
461 .globl machine_check_common
462 machine_check_common:
463 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
464 FINISH_NAP
465 DISABLE_INTS
466 bl .save_nvgprs
467 addi r3,r1,STACK_FRAME_OVERHEAD
468 bl .machine_check_exception
469 b .ret_from_except
471 STD_EXCEPTION_COMMON_LITE(0x900, decrementer, .timer_interrupt)
472 STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception)
473 STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
474 STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
475 STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
476 STD_EXCEPTION_COMMON(0xe40, emulation_assist, .program_check_exception)
477 STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
478 STD_EXCEPTION_COMMON_IDLE(0xf00, performance_monitor, .performance_monitor_exception)
479 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
480 #ifdef CONFIG_ALTIVEC
481 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
482 #else
483 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
484 #endif
485 #ifdef CONFIG_CBE_RAS
486 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
487 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
488 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
489 #endif /* CONFIG_CBE_RAS */
491 .align 7
492 system_call_entry:
493 b system_call_common
495 /*
496 * Here we have detected that the kernel stack pointer is bad.
497 * R9 contains the saved CR, r13 points to the paca,
498 * r10 contains the (bad) kernel stack pointer,
499 * r11 and r12 contain the saved SRR0 and SRR1.
500 * We switch to using an emergency stack, save the registers there,
501 * and call kernel_bad_stack(), which panics.
502 */
503 bad_stack:
504 ld r1,PACAEMERGSP(r13)
505 subi r1,r1,64+INT_FRAME_SIZE
506 std r9,_CCR(r1)
507 std r10,GPR1(r1)
508 std r11,_NIP(r1)
509 std r12,_MSR(r1)
510 mfspr r11,SPRN_DAR
511 mfspr r12,SPRN_DSISR
512 std r11,_DAR(r1)
513 std r12,_DSISR(r1)
514 mflr r10
515 mfctr r11
516 mfxer r12
517 std r10,_LINK(r1)
518 std r11,_CTR(r1)
519 std r12,_XER(r1)
520 SAVE_GPR(0,r1)
521 SAVE_GPR(2,r1)
522 ld r10,EX_R3(r3)
523 std r10,GPR3(r1)
524 SAVE_GPR(4,r1)
525 SAVE_4GPRS(5,r1)
526 ld r9,EX_R9(r3)
527 ld r10,EX_R10(r3)
528 SAVE_2GPRS(9,r1)
529 ld r9,EX_R11(r3)
530 ld r10,EX_R12(r3)
531 ld r11,EX_R13(r3)
532 std r9,GPR11(r1)
533 std r10,GPR12(r1)
534 std r11,GPR13(r1)
535 BEGIN_FTR_SECTION
536 ld r10,EX_CFAR(r3)
537 std r10,ORIG_GPR3(r1)
538 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
539 SAVE_8GPRS(14,r1)
540 SAVE_10GPRS(22,r1)
541 lhz r12,PACA_TRAP_SAVE(r13)
542 std r12,_TRAP(r1)
543 addi r11,r1,INT_FRAME_SIZE
544 std r11,0(r1)
545 li r12,0
546 std r12,0(r11)
547 ld r2,PACATOC(r13)
548 ld r11,exception_marker@toc(r2)
549 std r12,RESULT(r1)
550 std r11,STACK_FRAME_OVERHEAD-16(r1)
551 1: addi r3,r1,STACK_FRAME_OVERHEAD
552 bl .kernel_bad_stack
553 b 1b
555 /*
556 * Here r13 points to the paca, r9 contains the saved CR,
557 * SRR0 and SRR1 are saved in r11 and r12,
558 * r9 - r13 are saved in paca->exgen.
559 */
560 .align 7
561 .globl data_access_common
562 data_access_common:
563 mfspr r10,SPRN_DAR
564 std r10,PACA_EXGEN+EX_DAR(r13)
565 mfspr r10,SPRN_DSISR
566 stw r10,PACA_EXGEN+EX_DSISR(r13)
567 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
568 ld r3,PACA_EXGEN+EX_DAR(r13)
569 lwz r4,PACA_EXGEN+EX_DSISR(r13)
570 li r5,0x300
571 b .do_hash_page /* Try to handle as hpte fault */
573 .align 7
574 .globl h_data_storage_common
575 h_data_storage_common:
576 mfspr r10,SPRN_HDAR
577 std r10,PACA_EXGEN+EX_DAR(r13)
578 mfspr r10,SPRN_HDSISR
579 stw r10,PACA_EXGEN+EX_DSISR(r13)
580 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
581 bl .save_nvgprs
582 addi r3,r1,STACK_FRAME_OVERHEAD
583 bl .unknown_exception
584 b .ret_from_except
586 .align 7
587 .globl instruction_access_common
588 instruction_access_common:
589 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
590 ld r3,_NIP(r1)
591 andis. r4,r12,0x5820
592 li r5,0x400
593 b .do_hash_page /* Try to handle as hpte fault */
595 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
597 /*
598 * Here is the common SLB miss user that is used when going to virtual
599 * mode for SLB misses, that is currently not used
600 */
601 #ifdef __DISABLED__
602 .align 7
603 .globl slb_miss_user_common
604 slb_miss_user_common:
605 mflr r10
606 std r3,PACA_EXGEN+EX_DAR(r13)
607 stw r9,PACA_EXGEN+EX_CCR(r13)
608 std r10,PACA_EXGEN+EX_LR(r13)
609 std r11,PACA_EXGEN+EX_SRR0(r13)
610 bl .slb_allocate_user
612 ld r10,PACA_EXGEN+EX_LR(r13)
613 ld r3,PACA_EXGEN+EX_R3(r13)
614 lwz r9,PACA_EXGEN+EX_CCR(r13)
615 ld r11,PACA_EXGEN+EX_SRR0(r13)
616 mtlr r10
617 beq- slb_miss_fault
619 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
620 beq- unrecov_user_slb
621 mfmsr r10
623 .machine push
624 .machine "power4"
625 mtcrf 0x80,r9
626 .machine pop
628 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
629 mtmsrd r10,1
631 mtspr SRR0,r11
632 mtspr SRR1,r12
634 ld r9,PACA_EXGEN+EX_R9(r13)
635 ld r10,PACA_EXGEN+EX_R10(r13)
636 ld r11,PACA_EXGEN+EX_R11(r13)
637 ld r12,PACA_EXGEN+EX_R12(r13)
638 ld r13,PACA_EXGEN+EX_R13(r13)
639 rfid
640 b .
642 slb_miss_fault:
643 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
644 ld r4,PACA_EXGEN+EX_DAR(r13)
645 li r5,0
646 std r4,_DAR(r1)
647 std r5,_DSISR(r1)
648 b handle_page_fault
650 unrecov_user_slb:
651 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
652 DISABLE_INTS
653 bl .save_nvgprs
654 1: addi r3,r1,STACK_FRAME_OVERHEAD
655 bl .unrecoverable_exception
656 b 1b
658 #endif /* __DISABLED__ */
661 /*
662 * r13 points to the PACA, r9 contains the saved CR,
663 * r12 contain the saved SRR1, SRR0 is still ready for return
664 * r3 has the faulting address
665 * r9 - r13 are saved in paca->exslb.
666 * r3 is saved in paca->slb_r3
667 * We assume we aren't going to take any exceptions during this procedure.
668 */
669 _GLOBAL(slb_miss_realmode)
670 mflr r10
671 #ifdef CONFIG_RELOCATABLE
672 mtctr r11
673 #endif
675 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
676 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
678 bl .slb_allocate_realmode
680 /* All done -- return from exception. */
682 ld r10,PACA_EXSLB+EX_LR(r13)
683 ld r3,PACA_EXSLB+EX_R3(r13)
684 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
685 #ifdef CONFIG_PPC_ISERIES
686 BEGIN_FW_FTR_SECTION
687 ld r11,PACALPPACAPTR(r13)
688 ld r11,LPPACASRR0(r11) /* get SRR0 value */
689 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
690 #endif /* CONFIG_PPC_ISERIES */
692 mtlr r10
694 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
695 beq- 2f
697 .machine push
698 .machine "power4"
699 mtcrf 0x80,r9
700 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
701 .machine pop
703 #ifdef CONFIG_PPC_ISERIES
704 BEGIN_FW_FTR_SECTION
705 mtspr SPRN_SRR0,r11
706 mtspr SPRN_SRR1,r12
707 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
708 #endif /* CONFIG_PPC_ISERIES */
709 ld r9,PACA_EXSLB+EX_R9(r13)
710 ld r10,PACA_EXSLB+EX_R10(r13)
711 ld r11,PACA_EXSLB+EX_R11(r13)
712 ld r12,PACA_EXSLB+EX_R12(r13)
713 ld r13,PACA_EXSLB+EX_R13(r13)
714 rfid
715 b . /* prevent speculative execution */
717 2:
718 #ifdef CONFIG_PPC_ISERIES
719 BEGIN_FW_FTR_SECTION
720 b unrecov_slb
721 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
722 #endif /* CONFIG_PPC_ISERIES */
723 mfspr r11,SPRN_SRR0
724 ld r10,PACAKBASE(r13)
725 LOAD_HANDLER(r10,unrecov_slb)
726 mtspr SPRN_SRR0,r10
727 ld r10,PACAKMSR(r13)
728 mtspr SPRN_SRR1,r10
729 rfid
730 b .
732 unrecov_slb:
733 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
734 DISABLE_INTS
735 bl .save_nvgprs
736 1: addi r3,r1,STACK_FRAME_OVERHEAD
737 bl .unrecoverable_exception
738 b 1b
740 .align 7
741 .globl hardware_interrupt_common
742 .globl hardware_interrupt_entry
743 hardware_interrupt_common:
744 EXCEPTION_PROLOG_COMMON(0x500, PACA_EXGEN)
745 FINISH_NAP
746 hardware_interrupt_entry:
747 DISABLE_INTS
748 BEGIN_FTR_SECTION
749 bl .ppc64_runlatch_on
750 END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
751 addi r3,r1,STACK_FRAME_OVERHEAD
752 bl .do_IRQ
753 b .ret_from_except_lite
755 #ifdef CONFIG_PPC_970_NAP
756 power4_fixup_nap:
757 andc r9,r9,r10
758 std r9,TI_LOCAL_FLAGS(r11)
759 ld r10,_LINK(r1) /* make idle task do the */
760 std r10,_NIP(r1) /* equivalent of a blr */
761 blr
762 #endif
764 .align 7
765 .globl alignment_common
766 alignment_common:
767 mfspr r10,SPRN_DAR
768 std r10,PACA_EXGEN+EX_DAR(r13)
769 mfspr r10,SPRN_DSISR
770 stw r10,PACA_EXGEN+EX_DSISR(r13)
771 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
772 ld r3,PACA_EXGEN+EX_DAR(r13)
773 lwz r4,PACA_EXGEN+EX_DSISR(r13)
774 std r3,_DAR(r1)
775 std r4,_DSISR(r1)
776 bl .save_nvgprs
777 addi r3,r1,STACK_FRAME_OVERHEAD
778 ENABLE_INTS
779 bl .alignment_exception
780 b .ret_from_except
782 .align 7
783 .globl program_check_common
784 program_check_common:
785 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
786 bl .save_nvgprs
787 addi r3,r1,STACK_FRAME_OVERHEAD
788 ENABLE_INTS
789 bl .program_check_exception
790 b .ret_from_except
792 .align 7
793 .globl fp_unavailable_common
794 fp_unavailable_common:
795 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
796 bne 1f /* if from user, just load it up */
797 bl .save_nvgprs
798 addi r3,r1,STACK_FRAME_OVERHEAD
799 ENABLE_INTS
800 bl .kernel_fp_unavailable_exception
801 BUG_OPCODE
802 1: bl .load_up_fpu
803 b fast_exception_return
805 .align 7
806 .globl altivec_unavailable_common
807 altivec_unavailable_common:
808 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
809 #ifdef CONFIG_ALTIVEC
810 BEGIN_FTR_SECTION
811 beq 1f
812 bl .load_up_altivec
813 b fast_exception_return
814 1:
815 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
816 #endif
817 bl .save_nvgprs
818 addi r3,r1,STACK_FRAME_OVERHEAD
819 ENABLE_INTS
820 bl .altivec_unavailable_exception
821 b .ret_from_except
823 .align 7
824 .globl vsx_unavailable_common
825 vsx_unavailable_common:
826 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
827 #ifdef CONFIG_VSX
828 BEGIN_FTR_SECTION
829 bne .load_up_vsx
830 1:
831 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
832 #endif
833 bl .save_nvgprs
834 addi r3,r1,STACK_FRAME_OVERHEAD
835 ENABLE_INTS
836 bl .vsx_unavailable_exception
837 b .ret_from_except
839 .align 7
840 .globl __end_handlers
841 __end_handlers:
843 /*
844 * Return from an exception with minimal checks.
845 * The caller is assumed to have done EXCEPTION_PROLOG_COMMON.
846 * If interrupts have been enabled, or anything has been
847 * done that might have changed the scheduling status of
848 * any task or sent any task a signal, you should use
849 * ret_from_except or ret_from_except_lite instead of this.
850 */
851 fast_exc_return_irq: /* restores irq state too */
852 ld r3,SOFTE(r1)
853 TRACE_AND_RESTORE_IRQ(r3);
854 ld r12,_MSR(r1)
855 rldicl r4,r12,49,63 /* get MSR_EE to LSB */
856 stb r4,PACAHARDIRQEN(r13) /* restore paca->hard_enabled */
857 b 1f
859 .globl fast_exception_return
860 fast_exception_return:
861 ld r12,_MSR(r1)
862 1: ld r11,_NIP(r1)
863 andi. r3,r12,MSR_RI /* check if RI is set */
864 beq- unrecov_fer
866 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
867 andi. r3,r12,MSR_PR
868 beq 2f
869 ACCOUNT_CPU_USER_EXIT(r3, r4)
870 2:
871 #endif
873 ld r3,_CCR(r1)
874 ld r4,_LINK(r1)
875 ld r5,_CTR(r1)
876 ld r6,_XER(r1)
877 mtcr r3
878 mtlr r4
879 mtctr r5
880 mtxer r6
881 REST_GPR(0, r1)
882 REST_8GPRS(2, r1)
884 mfmsr r10
885 rldicl r10,r10,48,1 /* clear EE */
886 rldicr r10,r10,16,61 /* clear RI (LE is 0 already) */
887 mtmsrd r10,1
889 mtspr SPRN_SRR1,r12
890 mtspr SPRN_SRR0,r11
891 REST_4GPRS(10, r1)
892 ld r1,GPR1(r1)
893 rfid
894 b . /* prevent speculative execution */
896 unrecov_fer:
897 bl .save_nvgprs
898 1: addi r3,r1,STACK_FRAME_OVERHEAD
899 bl .unrecoverable_exception
900 b 1b
903 /*
904 * Hash table stuff
905 */
906 .align 7
907 _STATIC(do_hash_page)
908 std r3,_DAR(r1)
909 std r4,_DSISR(r1)
911 andis. r0,r4,0xa410 /* weird error? */
912 bne- handle_page_fault /* if not, try to insert a HPTE */
913 andis. r0,r4,DSISR_DABRMATCH@h
914 bne- handle_dabr_fault
916 BEGIN_FTR_SECTION
917 andis. r0,r4,0x0020 /* Is it a segment table fault? */
918 bne- do_ste_alloc /* If so handle it */
919 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
921 clrrdi r11,r1,THREAD_SHIFT
922 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
923 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
924 bne 77f /* then don't call hash_page now */
926 /*
927 * On iSeries, we soft-disable interrupts here, then
928 * hard-enable interrupts so that the hash_page code can spin on
929 * the hash_table_lock without problems on a shared processor.
930 */
931 DISABLE_INTS
933 /*
934 * Currently, trace_hardirqs_off() will be called by DISABLE_INTS
935 * and will clobber volatile registers when irq tracing is enabled
936 * so we need to reload them. It may be possible to be smarter here
937 * and move the irq tracing elsewhere but let's keep it simple for
938 * now
939 */
940 #ifdef CONFIG_TRACE_IRQFLAGS
941 ld r3,_DAR(r1)
942 ld r4,_DSISR(r1)
943 ld r5,_TRAP(r1)
944 ld r12,_MSR(r1)
945 clrrdi r5,r5,4
946 #endif /* CONFIG_TRACE_IRQFLAGS */
947 /*
948 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
949 * accessing a userspace segment (even from the kernel). We assume
950 * kernel addresses always have the high bit set.
951 */
952 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
953 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
954 orc r0,r12,r0 /* MSR_PR | ~high_bit */
955 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
956 ori r4,r4,1 /* add _PAGE_PRESENT */
957 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
959 /*
960 * r3 contains the faulting address
961 * r4 contains the required access permissions
962 * r5 contains the trap number
963 *
964 * at return r3 = 0 for success
965 */
966 bl .hash_page /* build HPTE if possible */
967 cmpdi r3,0 /* see if hash_page succeeded */
969 BEGIN_FW_FTR_SECTION
970 /*
971 * If we had interrupts soft-enabled at the point where the
972 * DSI/ISI occurred, and an interrupt came in during hash_page,
973 * handle it now.
974 * We jump to ret_from_except_lite rather than fast_exception_return
975 * because ret_from_except_lite will check for and handle pending
976 * interrupts if necessary.
977 */
978 beq 13f
979 END_FW_FTR_SECTION_IFSET(FW_FEATURE_ISERIES)
981 BEGIN_FW_FTR_SECTION
982 /*
983 * Here we have interrupts hard-disabled, so it is sufficient
984 * to restore paca->{soft,hard}_enable and get out.
985 */
986 beq fast_exc_return_irq /* Return from exception on success */
987 END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES)
989 /* For a hash failure, we don't bother re-enabling interrupts */
990 ble- 12f
992 /*
993 * hash_page couldn't handle it, set soft interrupt enable back
994 * to what it was before the trap. Note that .arch_local_irq_restore
995 * handles any interrupts pending at this point.
996 */
997 ld r3,SOFTE(r1)
998 TRACE_AND_RESTORE_IRQ_PARTIAL(r3, 11f)
999 bl .arch_local_irq_restore
1000 b 11f
1002 /* We have a data breakpoint exception - handle it */
1003 handle_dabr_fault:
1004 bl .save_nvgprs
1005 ld r4,_DAR(r1)
1006 ld r5,_DSISR(r1)
1007 addi r3,r1,STACK_FRAME_OVERHEAD
1008 bl .do_dabr
1009 b .ret_from_except_lite
1011 /* Here we have a page fault that hash_page can't handle. */
1012 handle_page_fault:
1013 ENABLE_INTS
1014 11: ld r4,_DAR(r1)
1015 ld r5,_DSISR(r1)
1016 addi r3,r1,STACK_FRAME_OVERHEAD
1017 bl .do_page_fault
1018 cmpdi r3,0
1019 beq+ 13f
1020 bl .save_nvgprs
1021 mr r5,r3
1022 addi r3,r1,STACK_FRAME_OVERHEAD
1023 lwz r4,_DAR(r1)
1024 bl .bad_page_fault
1025 b .ret_from_except
1027 13: b .ret_from_except_lite
1029 /* We have a page fault that hash_page could handle but HV refused
1030 * the PTE insertion
1031 */
1032 12: bl .save_nvgprs
1033 mr r5,r3
1034 addi r3,r1,STACK_FRAME_OVERHEAD
1035 ld r4,_DAR(r1)
1036 bl .low_hash_fault
1037 b .ret_from_except
1039 /*
1040 * We come here as a result of a DSI at a point where we don't want
1041 * to call hash_page, such as when we are accessing memory (possibly
1042 * user memory) inside a PMU interrupt that occurred while interrupts
1043 * were soft-disabled. We want to invoke the exception handler for
1044 * the access, or panic if there isn't a handler.
1045 */
1046 77: bl .save_nvgprs
1047 mr r4,r3
1048 addi r3,r1,STACK_FRAME_OVERHEAD
1049 li r5,SIGSEGV
1050 bl .bad_page_fault
1051 b .ret_from_except
1053 /* here we have a segment miss */
1054 do_ste_alloc:
1055 bl .ste_allocate /* try to insert stab entry */
1056 cmpdi r3,0
1057 bne- handle_page_fault
1058 b fast_exception_return
1060 /*
1061 * r13 points to the PACA, r9 contains the saved CR,
1062 * r11 and r12 contain the saved SRR0 and SRR1.
1063 * r9 - r13 are saved in paca->exslb.
1064 * We assume we aren't going to take any exceptions during this procedure.
1065 * We assume (DAR >> 60) == 0xc.
1066 */
1067 .align 7
1068 _GLOBAL(do_stab_bolted)
1069 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1070 std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
1072 /* Hash to the primary group */
1073 ld r10,PACASTABVIRT(r13)
1074 mfspr r11,SPRN_DAR
1075 srdi r11,r11,28
1076 rldimi r10,r11,7,52 /* r10 = first ste of the group */
1078 /* Calculate VSID */
1079 /* This is a kernel address, so protovsid = ESID */
1080 ASM_VSID_SCRAMBLE(r11, r9, 256M)
1081 rldic r9,r11,12,16 /* r9 = vsid << 12 */
1083 /* Search the primary group for a free entry */
1084 1: ld r11,0(r10) /* Test valid bit of the current ste */
1085 andi. r11,r11,0x80
1086 beq 2f
1087 addi r10,r10,16
1088 andi. r11,r10,0x70
1089 bne 1b
1091 /* Stick for only searching the primary group for now. */
1092 /* At least for now, we use a very simple random castout scheme */
1093 /* Use the TB as a random number ; OR in 1 to avoid entry 0 */
1094 mftb r11
1095 rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */
1096 ori r11,r11,0x10
1098 /* r10 currently points to an ste one past the group of interest */
1099 /* make it point to the randomly selected entry */
1100 subi r10,r10,128
1101 or r10,r10,r11 /* r10 is the entry to invalidate */
1103 isync /* mark the entry invalid */
1104 ld r11,0(r10)
1105 rldicl r11,r11,56,1 /* clear the valid bit */
1106 rotldi r11,r11,8
1107 std r11,0(r10)
1108 sync
1110 clrrdi r11,r11,28 /* Get the esid part of the ste */
1111 slbie r11
1113 2: std r9,8(r10) /* Store the vsid part of the ste */
1114 eieio
1116 mfspr r11,SPRN_DAR /* Get the new esid */
1117 clrrdi r11,r11,28 /* Permits a full 32b of ESID */
1118 ori r11,r11,0x90 /* Turn on valid and kp */
1119 std r11,0(r10) /* Put new entry back into the stab */
1121 sync
1123 /* All done -- return from exception. */
1124 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1125 ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */
1127 andi. r10,r12,MSR_RI
1128 beq- unrecov_slb
1130 mtcrf 0x80,r9 /* restore CR */
1132 mfmsr r10
1133 clrrdi r10,r10,2
1134 mtmsrd r10,1
1136 mtspr SPRN_SRR0,r11
1137 mtspr SPRN_SRR1,r12
1138 ld r9,PACA_EXSLB+EX_R9(r13)
1139 ld r10,PACA_EXSLB+EX_R10(r13)
1140 ld r11,PACA_EXSLB+EX_R11(r13)
1141 ld r12,PACA_EXSLB+EX_R12(r13)
1142 ld r13,PACA_EXSLB+EX_R13(r13)
1143 rfid
1144 b . /* prevent speculative execution */
1146 #ifdef CONFIG_PPC_PSERIES
1147 /*
1148 * Data area reserved for FWNMI option.
1149 * This address (0x7000) is fixed by the RPA.
1150 */
1151 .= 0x7000
1152 .globl fwnmi_data_area
1153 fwnmi_data_area:
1154 #endif /* CONFIG_PPC_PSERIES */
1156 /* iSeries does not use the FWNMI stuff, so it is safe to put
1157 * this here, even if we later allow kernels that will boot on
1158 * both pSeries and iSeries */
1159 #ifdef CONFIG_PPC_ISERIES
1160 . = LPARMAP_PHYS
1161 .globl xLparMap
1162 xLparMap:
1163 .quad HvEsidsToMap /* xNumberEsids */
1164 .quad HvRangesToMap /* xNumberRanges */
1165 .quad STAB0_PAGE /* xSegmentTableOffs */
1166 .zero 40 /* xRsvd */
1167 /* xEsids (HvEsidsToMap entries of 2 quads) */
1168 .quad PAGE_OFFSET_ESID /* xKernelEsid */
1169 .quad PAGE_OFFSET_VSID /* xKernelVsid */
1170 .quad VMALLOC_START_ESID /* xKernelEsid */
1171 .quad VMALLOC_START_VSID /* xKernelVsid */
1172 /* xRanges (HvRangesToMap entries of 3 quads) */
1173 .quad HvPagesToMap /* xPages */
1174 .quad 0 /* xOffset */
1175 .quad PAGE_OFFSET_VSID << (SID_SHIFT - HW_PAGE_SHIFT) /* xVPN */
1177 #endif /* CONFIG_PPC_ISERIES */
1179 #ifdef CONFIG_PPC_PSERIES
1180 . = 0x8000
1181 #endif /* CONFIG_PPC_PSERIES */
1183 /*
1184 * Space for CPU0's segment table.
1185 *
1186 * On iSeries, the hypervisor must fill in at least one entry before
1187 * we get control (with relocate on). The address is given to the hv
1188 * as a page number (see xLparMap above), so this must be at a
1189 * fixed address (the linker can't compute (u64)&initial_stab >>
1190 * PAGE_SHIFT).
1191 */
1192 . = STAB0_OFFSET /* 0x8000 */
1193 .globl initial_stab
1194 initial_stab:
1195 .space 4096