arch/sparc/include/asm/sfp-machine_32.h

   1 /* Machine-dependent software floating-point definitions.
   2    Sparc userland (_Q_*) version.
   3    Copyright (C) 1997,1998,1999 Free Software Foundation, Inc.
   4    This file is part of the GNU C Library.
   5    Contributed by Richard Henderson (rth@cygnus.com),
   6                   Jakub Jelinek (jj@ultra.linux.cz),
   7                   David S. Miller (davem@redhat.com) and
   8                   Peter Maydell (pmaydell@chiark.greenend.org.uk).
   9
  10    The GNU C Library is free software; you can redistribute it and/or
  11    modify it under the terms of the GNU Library General Public License as
  12    published by the Free Software Foundation; either version 2 of the
  13    License, or (at your option) any later version.
  14
  15    The GNU C Library is distributed in the hope that it will be useful,
  16    but WITHOUT ANY WARRANTY; without even the implied warranty of
  17    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  18    Library General Public License for more details.
  19
  20    You should have received a copy of the GNU Library General Public
  21    License along with the GNU C Library; see the file COPYING.LIB.  If
  22    not, write to the Free Software Foundation, Inc.,
  23    59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  24
  25 #ifndef _SFP_MACHINE_H
  26 #define _SFP_MACHINE_H
  27
  28
  29 #define _FP_W_TYPE_SIZE         32
  30 #define _FP_W_TYPE              unsigned long
  31 #define _FP_WS_TYPE             signed long
  32 #define _FP_I_TYPE              long
  33
  34 #define _FP_MUL_MEAT_S(R,X,Y)                                   \
  35   _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
  36 #define _FP_MUL_MEAT_D(R,X,Y)                                   \
  37   _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
  38 #define _FP_MUL_MEAT_Q(R,X,Y)                                   \
  39   _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
  40
  41 #define _FP_DIV_MEAT_S(R,X,Y)   _FP_DIV_MEAT_1_udiv(S,R,X,Y)
  42 #define _FP_DIV_MEAT_D(R,X,Y)   _FP_DIV_MEAT_2_udiv(D,R,X,Y)
  43 #define _FP_DIV_MEAT_Q(R,X,Y)   _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
  44
  45 #define _FP_NANFRAC_S           ((_FP_QNANBIT_S << 1) - 1)
  46 #define _FP_NANFRAC_D           ((_FP_QNANBIT_D << 1) - 1), -1
  47 #define _FP_NANFRAC_Q           ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
  48 #define _FP_NANSIGN_S           0
  49 #define _FP_NANSIGN_D           0
  50 #define _FP_NANSIGN_Q           0
  51
  52 #define _FP_KEEPNANFRACP 1
  53
  54 /* If one NaN is signaling and the other is not,
  55  * we choose that one, otherwise we choose X.
  56  */
  57 /* For _Qp_* and _Q_*, this should prefer X, for
  58  * CPU instruction emulation this should prefer Y.
  59  * (see SPAMv9 B.2.2 section).
  60  */
  61 #define _FP_CHOOSENAN(fs, wc, R, X, Y, OP)                      \
  62   do {                                                          \
  63     if ((_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)          \
  64         && !(_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs))     \
  65       {                                                         \
  66         R##_s = X##_s;                                          \
  67         _FP_FRAC_COPY_##wc(R,X);                                \
  68       }                                                         \
  69     else                                                        \
  70       {                                                         \
  71         R##_s = Y##_s;                                          \
  72         _FP_FRAC_COPY_##wc(R,Y);                                \
  73       }                                                         \
  74     R##_c = FP_CLS_NAN;                                         \
  75   } while (0)
  76
  77 /* Some assembly to speed things up. */
  78 #define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0)                     \
  79   __asm__ ("addcc %r7,%8,%2\n\t"                                        \
  80            "addxcc %r5,%6,%1\n\t"                                       \
  81            "addx %r3,%4,%0\n"                                           \
  82            : "=r" ((USItype)(r2)),                                      \
  83              "=&r" ((USItype)(r1)),                                     \
  84              "=&r" ((USItype)(r0))                                      \
  85            : "%rJ" ((USItype)(x2)),                                     \
  86              "rI" ((USItype)(y2)),                                      \
  87              "%rJ" ((USItype)(x1)),                                     \
  88              "rI" ((USItype)(y1)),                                      \
  89              "%rJ" ((USItype)(x0)),                                     \
  90              "rI" ((USItype)(y0))                                       \
  91            : "cc")
  92
  93 #define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0)                     \
  94   __asm__ ("subcc %r7,%8,%2\n\t"                                        \
  95             "subxcc %r5,%6,%1\n\t"                                      \
  96             "subx %r3,%4,%0\n"                                          \
  97            : "=r" ((USItype)(r2)),                                      \
  98              "=&r" ((USItype)(r1)),                                     \
  99              "=&r" ((USItype)(r0))                                      \
 100            : "%rJ" ((USItype)(x2)),                                     \
 101              "rI" ((USItype)(y2)),                                      \
 102              "%rJ" ((USItype)(x1)),                                     \
 103              "rI" ((USItype)(y1)),                                      \
 104              "%rJ" ((USItype)(x0)),                                     \
 105              "rI" ((USItype)(y0))                                       \
 106            : "cc")
 107
 108 #define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0)            \
 109   do {                                                                  \
 110     /* We need to fool gcc,  as we need to pass more than 10            \
 111        input/outputs.  */                                               \
 112     register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2");            \
 113     __asm__ __volatile__ (                                              \
 114             "addcc %r8,%9,%1\n\t"                                       \
 115             "addxcc %r6,%7,%0\n\t"                                      \
 116             "addxcc %r4,%5,%%g2\n\t"                                    \
 117             "addx %r2,%3,%%g1\n\t"                                      \
 118            : "=&r" ((USItype)(r1)),                                     \
 119              "=&r" ((USItype)(r0))                                      \
 120            : "%rJ" ((USItype)(x3)),                                     \
 121              "rI" ((USItype)(y3)),                                      \
 122              "%rJ" ((USItype)(x2)),                                     \
 123              "rI" ((USItype)(y2)),                                      \
 124              "%rJ" ((USItype)(x1)),                                     \
 125              "rI" ((USItype)(y1)),                                      \
 126              "%rJ" ((USItype)(x0)),                                     \
 127              "rI" ((USItype)(y0))                                       \
 128            : "cc", "g1", "g2");                                         \
 129     __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2));                 \
 130     r3 = _t1; r2 = _t2;                                                 \
 131   } while (0)
 132
 133 #define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0)            \
 134   do {                                                                  \
 135     /* We need to fool gcc,  as we need to pass more than 10            \
 136        input/outputs.  */                                               \
 137     register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2");            \
 138     __asm__ __volatile__ (                                              \
 139             "subcc %r8,%9,%1\n\t"                                       \
 140             "subxcc %r6,%7,%0\n\t"                                      \
 141             "subxcc %r4,%5,%%g2\n\t"                                    \
 142             "subx %r2,%3,%%g1\n\t"                                      \
 143            : "=&r" ((USItype)(r1)),                                     \
 144              "=&r" ((USItype)(r0))                                      \
 145            : "%rJ" ((USItype)(x3)),                                     \
 146              "rI" ((USItype)(y3)),                                      \
 147              "%rJ" ((USItype)(x2)),                                     \
 148              "rI" ((USItype)(y2)),                                      \
 149              "%rJ" ((USItype)(x1)),                                     \
 150              "rI" ((USItype)(y1)),                                      \
 151              "%rJ" ((USItype)(x0)),                                     \
 152              "rI" ((USItype)(y0))                                       \
 153            : "cc", "g1", "g2");                                         \
 154     __asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2));                 \
 155     r3 = _t1; r2 = _t2;                                                 \
 156   } while (0)
 157
 158 #define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0)
 159
 160 #define __FP_FRAC_DEC_4(x3,x2,x1,x0,y3,y2,y1,y0) __FP_FRAC_SUB_4(x3,x2,x1,x0,x3,x2,x1,x0,y3,y2,y1,y0)
 161
 162 #define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i)                                 \
 163   __asm__ ("addcc %3,%4,%3\n\t"                                         \
 164            "addxcc %2,%%g0,%2\n\t"                                      \
 165            "addxcc %1,%%g0,%1\n\t"                                      \
 166            "addx %0,%%g0,%0\n\t"                                        \
 167            : "=&r" ((USItype)(x3)),                                     \
 168              "=&r" ((USItype)(x2)),                                     \
 169              "=&r" ((USItype)(x1)),                                     \
 170              "=&r" ((USItype)(x0))                                      \
 171            : "rI" ((USItype)(i)),                                       \
 172              "0" ((USItype)(x3)),                                       \
 173              "1" ((USItype)(x2)),                                       \
 174              "2" ((USItype)(x1)),                                       \
 175              "3" ((USItype)(x0))                                        \
 176            : "cc")
 177
 178 #ifndef CONFIG_SMP
 179 extern struct task_struct *last_task_used_math;
 180 #endif
 181
 182 /* Obtain the current rounding mode. */
 183 #ifndef FP_ROUNDMODE
 184 #ifdef CONFIG_SMP
 185 #define FP_ROUNDMODE    ((current->thread.fsr >> 30) & 0x3)
 186 #else
 187 #define FP_ROUNDMODE    ((last_task_used_math->thread.fsr >> 30) & 0x3)
 188 #endif
 189 #endif
 190
 191 /* Exception flags. */
 192 #define FP_EX_INVALID           (1 << 4)
 193 #define FP_EX_OVERFLOW          (1 << 3)
 194 #define FP_EX_UNDERFLOW         (1 << 2)
 195 #define FP_EX_DIVZERO           (1 << 1)
 196 #define FP_EX_INEXACT           (1 << 0)
 197
 198 #define FP_HANDLE_EXCEPTIONS return _fex
 199
 200 #ifdef CONFIG_SMP
 201 #define FP_INHIBIT_RESULTS ((current->thread.fsr >> 23) & _fex)
 202 #else
 203 #define FP_INHIBIT_RESULTS ((last_task_used_math->thread.fsr >> 23) & _fex)
 204 #endif
 205
 206 #ifdef CONFIG_SMP
 207 #define FP_TRAPPING_EXCEPTIONS ((current->thread.fsr >> 23) & 0x1f)
 208 #else
 209 #define FP_TRAPPING_EXCEPTIONS ((last_task_used_math->thread.fsr >> 23) & 0x1f)
 210 #endif
 211
 212 #endif