1 /* smp.h: Sparc specific SMP stuff.
3 * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
9 #include <linux/threads.h>
11 #include <asm/btfixup.h>
15 #include <linux/cpumask.h>
17 #endif /* __ASSEMBLY__ */
23 #include <asm/ptrace.h>
25 #include <linux/atomic.h>
28 * Private routines/data
31 extern unsigned char boot_cpu_id
;
32 extern volatile unsigned long cpu_callin_map
[NR_CPUS
];
33 extern cpumask_t smp_commenced_mask
;
34 extern struct linux_prom_registers smp_penguin_ctable
;
36 typedef void (*smpfunc_t
)(unsigned long, unsigned long, unsigned long,
37 unsigned long, unsigned long);
40 extern void smp4m_irq_rotate(int cpu
);
43 * General functions that each host system must provide.
46 void sun4m_init_smp(void);
47 void sun4d_init_smp(void);
49 void smp_callin(void);
50 void smp_boot_cpus(void);
51 void smp_store_cpu_info(int);
53 void smp_resched_interrupt(void);
54 void smp_call_function_single_interrupt(void);
55 void smp_call_function_interrupt(void);
58 void smp_bogo(struct seq_file
*);
59 void smp_info(struct seq_file
*);
61 BTFIXUPDEF_CALL(void, smp_cross_call
, smpfunc_t
, cpumask_t
, unsigned long, unsigned long, unsigned long, unsigned long)
62 BTFIXUPDEF_CALL(int, __hard_smp_processor_id
, void)
63 BTFIXUPDEF_CALL(void, smp_ipi_resched
, int);
64 BTFIXUPDEF_CALL(void, smp_ipi_single
, int);
65 BTFIXUPDEF_CALL(void, smp_ipi_mask_one
, int);
66 BTFIXUPDEF_BLACKBOX(hard_smp_processor_id
)
67 BTFIXUPDEF_BLACKBOX(load_current
)
69 #define smp_cross_call(func,mask,arg1,arg2,arg3,arg4) BTFIXUP_CALL(smp_cross_call)(func,mask,arg1,arg2,arg3,arg4)
71 static inline void xc0(smpfunc_t func
) { smp_cross_call(func
, *cpu_online_mask
, 0, 0, 0, 0); }
72 static inline void xc1(smpfunc_t func
, unsigned long arg1
)
73 { smp_cross_call(func
, *cpu_online_mask
, arg1
, 0, 0, 0); }
74 static inline void xc2(smpfunc_t func
, unsigned long arg1
, unsigned long arg2
)
75 { smp_cross_call(func
, *cpu_online_mask
, arg1
, arg2
, 0, 0); }
76 static inline void xc3(smpfunc_t func
, unsigned long arg1
, unsigned long arg2
,
78 { smp_cross_call(func
, *cpu_online_mask
, arg1
, arg2
, arg3
, 0); }
79 static inline void xc4(smpfunc_t func
, unsigned long arg1
, unsigned long arg2
,
80 unsigned long arg3
, unsigned long arg4
)
81 { smp_cross_call(func
, *cpu_online_mask
, arg1
, arg2
, arg3
, arg4
); }
83 extern void arch_send_call_function_single_ipi(int cpu
);
84 extern void arch_send_call_function_ipi_mask(const struct cpumask
*mask
);
86 static inline int cpu_logical_map(int cpu
)
91 static inline int hard_smp4m_processor_id(void)
95 __asm__
__volatile__("rd %%tbr, %0\n\t"
102 static inline int hard_smp4d_processor_id(void)
106 __asm__
__volatile__("lda [%%g0] %1, %0\n\t" :
107 "=&r" (cpuid
) : "i" (ASI_M_VIKING_TMP1
));
111 extern inline int hard_smpleon_processor_id(void)
114 __asm__
__volatile__("rd %%asr17,%0\n\t"
121 static inline int hard_smp_processor_id(void)
126 __asm__ __volatile__("rd %%tbr, %0\n\t"
128 "and %0, 3, %0\n\t" :
131 __asm__ __volatile__("lda [%g0] ASI_M_VIKING_TMP1, %0\n\t"
135 __asm__ __volatile__( "rd %asr17, %0\n\t"
136 "srl %0, 0x1c, %0\n\t"
139 See btfixup.h and btfixupprep.c to understand how a blackbox works.
141 __asm__
__volatile__("sethi %%hi(___b_hard_smp_processor_id), %0\n\t"
142 "sethi %%hi(boot_cpu_id), %0\n\t"
143 "ldub [%0 + %%lo(boot_cpu_id)], %0\n\t" :
148 static inline int hard_smp_processor_id(void)
152 __asm__
__volatile__("mov %%o7, %%g1\n\t"
153 "call ___f___hard_smp_processor_id\n\t"
155 "mov %%g2, %0\n\t" : "=r"(cpuid
) : : "g1", "g2");
160 #define raw_smp_processor_id() (current_thread_info()->cpu)
162 #define prof_multiplier(__cpu) cpu_data(__cpu).multiplier
163 #define prof_counter(__cpu) cpu_data(__cpu).counter
165 void smp_setup_cpu_possible_map(void);
167 #endif /* !(__ASSEMBLY__) */
169 /* Sparc specific messages. */
170 #define MSG_CROSS_CALL 0x0005 /* run func on cpus */
172 /* Empirical PROM processor mailbox constants. If the per-cpu mailbox
173 * contains something other than one of these then the ipi is from
174 * Linux's active_kernel_processor. This facility exists so that
175 * the boot monitor can capture all the other cpus when one catches
176 * a watchdog reset or the user enters the monitor using L1-A keys.
178 #define MBOX_STOPCPU 0xFB
179 #define MBOX_IDLECPU 0xFC
180 #define MBOX_IDLECPU2 0xFD
181 #define MBOX_STOPCPU2 0xFE
185 #define hard_smp_processor_id() 0
186 #define smp_setup_cpu_possible_map() do { } while (0)
189 #endif /* !(_SPARC_SMP_H) */