arch/x86/include/asm/irq_vectors.h

   1 #ifndef _ASM_X86_IRQ_VECTORS_H
   2 #define _ASM_X86_IRQ_VECTORS_H
   3
   4 #include <linux/threads.h>
   5 /*
   6  * Linux IRQ vector layout.
   7  *
   8  * There are 256 IDT entries (per CPU - each entry is 8 bytes) which can
   9  * be defined by Linux. They are used as a jump table by the CPU when a
  10  * given vector is triggered - by a CPU-external, CPU-internal or
  11  * software-triggered event.
  12  *
  13  * Linux sets the kernel code address each entry jumps to early during
  14  * bootup, and never changes them. This is the general layout of the
  15  * IDT entries:
  16  *
  17  *  Vectors   0 ...  31 : system traps and exceptions - hardcoded events
  18  *  Vectors  32 ... 127 : device interrupts
  19  *  Vector  128         : legacy int80 syscall interface
  20  *  Vector  204         : legacy x86_64 vsyscall emulation
  21  *  Vectors 129 ... INVALIDATE_TLB_VECTOR_START-1 except 204 : device interrupts
  22  *  Vectors INVALIDATE_TLB_VECTOR_START ... 255 : special interrupts
  23  *
  24  * 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table.
  25  *
  26  * This file enumerates the exact layout of them:
  27  */
  28
  29 #define NMI_VECTOR                      0x02
  30 #define MCE_VECTOR                      0x12
  31
  32 /*
  33  * IDT vectors usable for external interrupt sources start at 0x20.
  34  * (0x80 is the syscall vector, 0x30-0x3f are for ISA)
  35  */
  36 #define FIRST_EXTERNAL_VECTOR           0x20
  37 /*
  38  * We start allocating at 0x21 to spread out vectors evenly between
  39  * priority levels. (0x80 is the syscall vector)
  40  */
  41 #define VECTOR_OFFSET_START             1
  42
  43 /*
  44  * Reserve the lowest usable vector (and hence lowest priority)  0x20 for
  45  * triggering cleanup after irq migration. 0x21-0x2f will still be used
  46  * for device interrupts.
  47  */
  48 #define IRQ_MOVE_CLEANUP_VECTOR         FIRST_EXTERNAL_VECTOR
  49
  50 #define IA32_SYSCALL_VECTOR             0x80
  51 #ifdef CONFIG_X86_32
  52 # define SYSCALL_VECTOR                 0x80
  53 #endif
  54 #ifdef CONFIG_X86_64
  55 # define VSYSCALL_EMU_VECTOR            0xcc
  56 #endif
  57
  58 /*
  59  * Vectors 0x30-0x3f are used for ISA interrupts.
  60  *   round up to the next 16-vector boundary
  61  */
  62 #define IRQ0_VECTOR                     ((FIRST_EXTERNAL_VECTOR + 16) & ~15)
  63
  64 #define IRQ1_VECTOR                     (IRQ0_VECTOR +  1)
  65 #define IRQ2_VECTOR                     (IRQ0_VECTOR +  2)
  66 #define IRQ3_VECTOR                     (IRQ0_VECTOR +  3)
  67 #define IRQ4_VECTOR                     (IRQ0_VECTOR +  4)
  68 #define IRQ5_VECTOR                     (IRQ0_VECTOR +  5)
  69 #define IRQ6_VECTOR                     (IRQ0_VECTOR +  6)
  70 #define IRQ7_VECTOR                     (IRQ0_VECTOR +  7)
  71 #define IRQ8_VECTOR                     (IRQ0_VECTOR +  8)
  72 #define IRQ9_VECTOR                     (IRQ0_VECTOR +  9)
  73 #define IRQ10_VECTOR                    (IRQ0_VECTOR + 10)
  74 #define IRQ11_VECTOR                    (IRQ0_VECTOR + 11)
  75 #define IRQ12_VECTOR                    (IRQ0_VECTOR + 12)
  76 #define IRQ13_VECTOR                    (IRQ0_VECTOR + 13)
  77 #define IRQ14_VECTOR                    (IRQ0_VECTOR + 14)
  78 #define IRQ15_VECTOR                    (IRQ0_VECTOR + 15)
  79
  80 /*
  81  * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
  82  *
  83  *  some of the following vectors are 'rare', they are merged
  84  *  into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
  85  *  TLB, reschedule and local APIC vectors are performance-critical.
  86  */
  87
  88 #define SPURIOUS_APIC_VECTOR            0xff
  89 /*
  90  * Sanity check
  91  */
  92 #if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)
  93 # error SPURIOUS_APIC_VECTOR definition error
  94 #endif
  95
  96 #define ERROR_APIC_VECTOR               0xfe
  97 #define RESCHEDULE_VECTOR               0xfd
  98 #define CALL_FUNCTION_VECTOR            0xfc
  99 #define CALL_FUNCTION_SINGLE_VECTOR     0xfb
 100 #define THERMAL_APIC_VECTOR             0xfa
 101 #define THRESHOLD_APIC_VECTOR           0xf9
 102 #define REBOOT_VECTOR                   0xf8
 103
 104 /*
 105  * Generic system vector for platform specific use
 106  */
 107 #define X86_PLATFORM_IPI_VECTOR         0xf7
 108
 109 /*
 110  * IRQ work vector:
 111  */
 112 #define IRQ_WORK_VECTOR                 0xf6
 113
 114 #define UV_BAU_MESSAGE                  0xf5
 115
 116 /* Xen vector callback to receive events in a HVM domain */
 117 #define XEN_HVM_EVTCHN_CALLBACK         0xf3
 118
 119 /*
 120  * Local APIC timer IRQ vector is on a different priority level,
 121  * to work around the 'lost local interrupt if more than 2 IRQ
 122  * sources per level' errata.
 123  */
 124 #define LOCAL_TIMER_VECTOR              0xef
 125
 126 /* up to 32 vectors used for spreading out TLB flushes: */
 127 #if NR_CPUS <= 32
 128 # define NUM_INVALIDATE_TLB_VECTORS     (NR_CPUS)
 129 #else
 130 # define NUM_INVALIDATE_TLB_VECTORS     (32)
 131 #endif
 132
 133 #define INVALIDATE_TLB_VECTOR_END       (0xee)
 134 #define INVALIDATE_TLB_VECTOR_START     \
 135         (INVALIDATE_TLB_VECTOR_END-NUM_INVALIDATE_TLB_VECTORS+1)
 136
 137 #define NR_VECTORS                       256
 138
 139 #define FPU_IRQ                           13
 140
 141 #define FIRST_VM86_IRQ                     3
 142 #define LAST_VM86_IRQ                     15
 143
 144 #ifndef __ASSEMBLY__
 145 static inline int invalid_vm86_irq(int irq)
 146 {
 147         return irq < FIRST_VM86_IRQ || irq > LAST_VM86_IRQ;
 148 }
 149 #endif
 150
 151 /*
 152  * Size the maximum number of interrupts.
 153  *
 154  * If the irq_desc[] array has a sparse layout, we can size things
 155  * generously - it scales up linearly with the maximum number of CPUs,
 156  * and the maximum number of IO-APICs, whichever is higher.
 157  *
 158  * In other cases we size more conservatively, to not create too large
 159  * static arrays.
 160  */
 161
 162 #define NR_IRQS_LEGACY                    16
 163
 164 #define IO_APIC_VECTOR_LIMIT            ( 32 * MAX_IO_APICS )
 165
 166 #ifdef CONFIG_X86_IO_APIC
 167 # ifdef CONFIG_SPARSE_IRQ
 168 #  define CPU_VECTOR_LIMIT              (64 * NR_CPUS)
 169 #  define NR_IRQS                                       \
 170         (CPU_VECTOR_LIMIT > IO_APIC_VECTOR_LIMIT ?      \
 171                 (NR_VECTORS + CPU_VECTOR_LIMIT)  :      \
 172                 (NR_VECTORS + IO_APIC_VECTOR_LIMIT))
 173 # else
 174 #  define CPU_VECTOR_LIMIT              (32 * NR_CPUS)
 175 #  define NR_IRQS                                       \
 176         (CPU_VECTOR_LIMIT < IO_APIC_VECTOR_LIMIT ?      \
 177                 (NR_VECTORS + CPU_VECTOR_LIMIT)  :      \
 178                 (NR_VECTORS + IO_APIC_VECTOR_LIMIT))
 179 # endif
 180 #else /* !CONFIG_X86_IO_APIC: */
 181 # define NR_IRQS                        NR_IRQS_LEGACY
 182 #endif
 183
 184 #endif /* _ASM_X86_IRQ_VECTORS_H */