2 * Blackfin On-Chip CAN Driver
4 * Copyright 2004-2009 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/kernel.h>
14 #include <linux/bitops.h>
15 #include <linux/interrupt.h>
16 #include <linux/errno.h>
17 #include <linux/netdevice.h>
18 #include <linux/skbuff.h>
19 #include <linux/platform_device.h>
21 #include <linux/can/dev.h>
22 #include <linux/can/error.h>
24 #include <asm/bfin_can.h>
25 #include <asm/portmux.h>
27 #define DRV_NAME "bfin_can"
28 #define BFIN_CAN_TIMEOUT 100
29 #define TX_ECHO_SKB_MAX 1
32 * bfin can private data
34 struct bfin_can_priv
{
35 struct can_priv can
; /* must be the first member */
36 struct net_device
*dev
;
37 void __iomem
*membase
;
41 unsigned short *pin_list
;
45 * bfin can timing parameters
47 static struct can_bittiming_const bfin_can_bittiming_const
= {
55 * Although the BRP field can be set to any value, it is recommended
56 * that the value be greater than or equal to 4, as restrictions
57 * apply to the bit timing configuration when BRP is less than 4.
64 static int bfin_can_set_bittiming(struct net_device
*dev
)
66 struct bfin_can_priv
*priv
= netdev_priv(dev
);
67 struct bfin_can_regs __iomem
*reg
= priv
->membase
;
68 struct can_bittiming
*bt
= &priv
->can
.bittiming
;
72 timing
= ((bt
->sjw
- 1) << 8) | (bt
->prop_seg
+ bt
->phase_seg1
- 1) |
73 ((bt
->phase_seg2
- 1) << 4);
76 * If the SAM bit is set, the input signal is oversampled three times
79 if (priv
->can
.ctrlmode
& CAN_CTRLMODE_3_SAMPLES
)
82 bfin_write(®
->clock
, clk
);
83 bfin_write(®
->timing
, timing
);
85 dev_info(dev
->dev
.parent
, "setting CLOCK=0x%04x TIMING=0x%04x\n",
91 static void bfin_can_set_reset_mode(struct net_device
*dev
)
93 struct bfin_can_priv
*priv
= netdev_priv(dev
);
94 struct bfin_can_regs __iomem
*reg
= priv
->membase
;
95 int timeout
= BFIN_CAN_TIMEOUT
;
98 /* disable interrupts */
99 bfin_write(®
->mbim1
, 0);
100 bfin_write(®
->mbim2
, 0);
101 bfin_write(®
->gim
, 0);
103 /* reset can and enter configuration mode */
104 bfin_write(®
->control
, SRS
| CCR
);
106 bfin_write(®
->control
, CCR
);
108 while (!(bfin_read(®
->control
) & CCA
)) {
110 if (--timeout
== 0) {
111 dev_err(dev
->dev
.parent
,
112 "fail to enter configuration mode\n");
118 * All mailbox configurations are marked as inactive
119 * by writing to CAN Mailbox Configuration Registers 1 and 2
120 * For all bits: 0 - Mailbox disabled, 1 - Mailbox enabled
122 bfin_write(®
->mc1
, 0);
123 bfin_write(®
->mc2
, 0);
125 /* Set Mailbox Direction */
126 bfin_write(®
->md1
, 0xFFFF); /* mailbox 1-16 are RX */
127 bfin_write(®
->md2
, 0); /* mailbox 17-32 are TX */
129 /* RECEIVE_STD_CHL */
130 for (i
= 0; i
< 2; i
++) {
131 bfin_write(®
->chl
[RECEIVE_STD_CHL
+ i
].id0
, 0);
132 bfin_write(®
->chl
[RECEIVE_STD_CHL
+ i
].id1
, AME
);
133 bfin_write(®
->chl
[RECEIVE_STD_CHL
+ i
].dlc
, 0);
134 bfin_write(®
->msk
[RECEIVE_STD_CHL
+ i
].amh
, 0x1FFF);
135 bfin_write(®
->msk
[RECEIVE_STD_CHL
+ i
].aml
, 0xFFFF);
138 /* RECEIVE_EXT_CHL */
139 for (i
= 0; i
< 2; i
++) {
140 bfin_write(®
->chl
[RECEIVE_EXT_CHL
+ i
].id0
, 0);
141 bfin_write(®
->chl
[RECEIVE_EXT_CHL
+ i
].id1
, AME
| IDE
);
142 bfin_write(®
->chl
[RECEIVE_EXT_CHL
+ i
].dlc
, 0);
143 bfin_write(®
->msk
[RECEIVE_EXT_CHL
+ i
].amh
, 0x1FFF);
144 bfin_write(®
->msk
[RECEIVE_EXT_CHL
+ i
].aml
, 0xFFFF);
147 bfin_write(®
->mc2
, BIT(TRANSMIT_CHL
- 16));
148 bfin_write(®
->mc1
, BIT(RECEIVE_STD_CHL
) + BIT(RECEIVE_EXT_CHL
));
151 priv
->can
.state
= CAN_STATE_STOPPED
;
154 static void bfin_can_set_normal_mode(struct net_device
*dev
)
156 struct bfin_can_priv
*priv
= netdev_priv(dev
);
157 struct bfin_can_regs __iomem
*reg
= priv
->membase
;
158 int timeout
= BFIN_CAN_TIMEOUT
;
161 * leave configuration mode
163 bfin_write(®
->control
, bfin_read(®
->control
) & ~CCR
);
165 while (bfin_read(®
->status
) & CCA
) {
167 if (--timeout
== 0) {
168 dev_err(dev
->dev
.parent
,
169 "fail to leave configuration mode\n");
175 * clear _All_ tx and rx interrupts
177 bfin_write(®
->mbtif1
, 0xFFFF);
178 bfin_write(®
->mbtif2
, 0xFFFF);
179 bfin_write(®
->mbrif1
, 0xFFFF);
180 bfin_write(®
->mbrif2
, 0xFFFF);
183 * clear global interrupt status register
185 bfin_write(®
->gis
, 0x7FF); /* overwrites with '1' */
188 * Initialize Interrupts
189 * - set bits in the mailbox interrupt mask register
190 * - global interrupt mask
192 bfin_write(®
->mbim1
, BIT(RECEIVE_STD_CHL
) + BIT(RECEIVE_EXT_CHL
));
193 bfin_write(®
->mbim2
, BIT(TRANSMIT_CHL
- 16));
195 bfin_write(®
->gim
, EPIM
| BOIM
| RMLIM
);
199 static void bfin_can_start(struct net_device
*dev
)
201 struct bfin_can_priv
*priv
= netdev_priv(dev
);
203 /* enter reset mode */
204 if (priv
->can
.state
!= CAN_STATE_STOPPED
)
205 bfin_can_set_reset_mode(dev
);
207 /* leave reset mode */
208 bfin_can_set_normal_mode(dev
);
211 static int bfin_can_set_mode(struct net_device
*dev
, enum can_mode mode
)
216 if (netif_queue_stopped(dev
))
217 netif_wake_queue(dev
);
227 static int bfin_can_start_xmit(struct sk_buff
*skb
, struct net_device
*dev
)
229 struct bfin_can_priv
*priv
= netdev_priv(dev
);
230 struct bfin_can_regs __iomem
*reg
= priv
->membase
;
231 struct can_frame
*cf
= (struct can_frame
*)skb
->data
;
232 u8 dlc
= cf
->can_dlc
;
233 canid_t id
= cf
->can_id
;
238 if (can_dropped_invalid_skb(dev
, skb
))
241 netif_stop_queue(dev
);
244 if (id
& CAN_EFF_FLAG
) {
245 bfin_write(®
->chl
[TRANSMIT_CHL
].id0
, id
);
246 val
= ((id
& 0x1FFF0000) >> 16) | IDE
;
249 if (id
& CAN_RTR_FLAG
)
251 bfin_write(®
->chl
[TRANSMIT_CHL
].id1
, val
| AME
);
254 for (i
= 0; i
< 8; i
+= 2) {
255 val
= ((7 - i
) < dlc
? (data
[7 - i
]) : 0) +
256 ((6 - i
) < dlc
? (data
[6 - i
] << 8) : 0);
257 bfin_write(®
->chl
[TRANSMIT_CHL
].data
[i
], val
);
260 /* fill data length code */
261 bfin_write(®
->chl
[TRANSMIT_CHL
].dlc
, dlc
);
263 can_put_echo_skb(skb
, dev
, 0);
265 /* set transmit request */
266 bfin_write(®
->trs2
, BIT(TRANSMIT_CHL
- 16));
271 static void bfin_can_rx(struct net_device
*dev
, u16 isrc
)
273 struct bfin_can_priv
*priv
= netdev_priv(dev
);
274 struct net_device_stats
*stats
= &dev
->stats
;
275 struct bfin_can_regs __iomem
*reg
= priv
->membase
;
276 struct can_frame
*cf
;
282 skb
= alloc_can_skb(dev
, &cf
);
287 if (isrc
& BIT(RECEIVE_EXT_CHL
)) {
288 /* extended frame format (EFF) */
289 cf
->can_id
= ((bfin_read(®
->chl
[RECEIVE_EXT_CHL
].id1
)
291 + bfin_read(®
->chl
[RECEIVE_EXT_CHL
].id0
);
292 cf
->can_id
|= CAN_EFF_FLAG
;
293 obj
= RECEIVE_EXT_CHL
;
295 /* standard frame format (SFF) */
296 cf
->can_id
= (bfin_read(®
->chl
[RECEIVE_STD_CHL
].id1
)
298 obj
= RECEIVE_STD_CHL
;
300 if (bfin_read(®
->chl
[obj
].id1
) & RTR
)
301 cf
->can_id
|= CAN_RTR_FLAG
;
303 /* get data length code */
304 cf
->can_dlc
= get_can_dlc(bfin_read(®
->chl
[obj
].dlc
) & 0xF);
307 for (i
= 0; i
< 8; i
+= 2) {
308 val
= bfin_read(®
->chl
[obj
].data
[i
]);
309 cf
->data
[7 - i
] = (7 - i
) < cf
->can_dlc
? val
: 0;
310 cf
->data
[6 - i
] = (6 - i
) < cf
->can_dlc
? (val
>> 8) : 0;
316 stats
->rx_bytes
+= cf
->can_dlc
;
319 static int bfin_can_err(struct net_device
*dev
, u16 isrc
, u16 status
)
321 struct bfin_can_priv
*priv
= netdev_priv(dev
);
322 struct bfin_can_regs __iomem
*reg
= priv
->membase
;
323 struct net_device_stats
*stats
= &dev
->stats
;
324 struct can_frame
*cf
;
326 enum can_state state
= priv
->can
.state
;
328 skb
= alloc_can_err_skb(dev
, &cf
);
333 /* data overrun interrupt */
334 dev_dbg(dev
->dev
.parent
, "data overrun interrupt\n");
335 cf
->can_id
|= CAN_ERR_CRTL
;
336 cf
->data
[1] = CAN_ERR_CRTL_RX_OVERFLOW
;
337 stats
->rx_over_errors
++;
342 dev_dbg(dev
->dev
.parent
, "bus-off mode interrupt\n");
343 state
= CAN_STATE_BUS_OFF
;
344 cf
->can_id
|= CAN_ERR_BUSOFF
;
349 /* error passive interrupt */
350 dev_dbg(dev
->dev
.parent
, "error passive interrupt\n");
351 state
= CAN_STATE_ERROR_PASSIVE
;
354 if ((isrc
& EWTIS
) || (isrc
& EWRIS
)) {
355 dev_dbg(dev
->dev
.parent
,
356 "Error Warning Transmit/Receive Interrupt\n");
357 state
= CAN_STATE_ERROR_WARNING
;
360 if (state
!= priv
->can
.state
&& (state
== CAN_STATE_ERROR_WARNING
||
361 state
== CAN_STATE_ERROR_PASSIVE
)) {
362 u16 cec
= bfin_read(®
->cec
);
366 cf
->can_id
|= CAN_ERR_CRTL
;
367 if (state
== CAN_STATE_ERROR_WARNING
) {
368 priv
->can
.can_stats
.error_warning
++;
369 cf
->data
[1] = (txerr
> rxerr
) ?
370 CAN_ERR_CRTL_TX_WARNING
:
371 CAN_ERR_CRTL_RX_WARNING
;
373 priv
->can
.can_stats
.error_passive
++;
374 cf
->data
[1] = (txerr
> rxerr
) ?
375 CAN_ERR_CRTL_TX_PASSIVE
:
376 CAN_ERR_CRTL_RX_PASSIVE
;
381 priv
->can
.can_stats
.bus_error
++;
383 cf
->can_id
|= CAN_ERR_PROT
| CAN_ERR_BUSERROR
;
386 cf
->data
[2] |= CAN_ERR_PROT_BIT
;
387 else if (status
& FER
)
388 cf
->data
[2] |= CAN_ERR_PROT_FORM
;
389 else if (status
& SER
)
390 cf
->data
[2] |= CAN_ERR_PROT_STUFF
;
392 cf
->data
[2] |= CAN_ERR_PROT_UNSPEC
;
395 priv
->can
.state
= state
;
400 stats
->rx_bytes
+= cf
->can_dlc
;
405 irqreturn_t
bfin_can_interrupt(int irq
, void *dev_id
)
407 struct net_device
*dev
= dev_id
;
408 struct bfin_can_priv
*priv
= netdev_priv(dev
);
409 struct bfin_can_regs __iomem
*reg
= priv
->membase
;
410 struct net_device_stats
*stats
= &dev
->stats
;
413 if ((irq
== priv
->tx_irq
) && bfin_read(®
->mbtif2
)) {
414 /* transmission complete interrupt */
415 bfin_write(®
->mbtif2
, 0xFFFF);
417 stats
->tx_bytes
+= bfin_read(®
->chl
[TRANSMIT_CHL
].dlc
);
418 can_get_echo_skb(dev
, 0);
419 netif_wake_queue(dev
);
420 } else if ((irq
== priv
->rx_irq
) && bfin_read(®
->mbrif1
)) {
421 /* receive interrupt */
422 isrc
= bfin_read(®
->mbrif1
);
423 bfin_write(®
->mbrif1
, 0xFFFF);
424 bfin_can_rx(dev
, isrc
);
425 } else if ((irq
== priv
->err_irq
) && bfin_read(®
->gis
)) {
426 /* error interrupt */
427 isrc
= bfin_read(®
->gis
);
428 status
= bfin_read(®
->esr
);
429 bfin_write(®
->gis
, 0x7FF);
430 bfin_can_err(dev
, isrc
, status
);
438 static int bfin_can_open(struct net_device
*dev
)
440 struct bfin_can_priv
*priv
= netdev_priv(dev
);
443 /* set chip into reset mode */
444 bfin_can_set_reset_mode(dev
);
447 err
= open_candev(dev
);
451 /* register interrupt handler */
452 err
= request_irq(priv
->rx_irq
, &bfin_can_interrupt
, 0,
456 err
= request_irq(priv
->tx_irq
, &bfin_can_interrupt
, 0,
460 err
= request_irq(priv
->err_irq
, &bfin_can_interrupt
, 0,
461 "bfin-can-err", dev
);
467 netif_start_queue(dev
);
472 free_irq(priv
->tx_irq
, dev
);
474 free_irq(priv
->rx_irq
, dev
);
481 static int bfin_can_close(struct net_device
*dev
)
483 struct bfin_can_priv
*priv
= netdev_priv(dev
);
485 netif_stop_queue(dev
);
486 bfin_can_set_reset_mode(dev
);
490 free_irq(priv
->rx_irq
, dev
);
491 free_irq(priv
->tx_irq
, dev
);
492 free_irq(priv
->err_irq
, dev
);
497 struct net_device
*alloc_bfin_candev(void)
499 struct net_device
*dev
;
500 struct bfin_can_priv
*priv
;
502 dev
= alloc_candev(sizeof(*priv
), TX_ECHO_SKB_MAX
);
506 priv
= netdev_priv(dev
);
509 priv
->can
.bittiming_const
= &bfin_can_bittiming_const
;
510 priv
->can
.do_set_bittiming
= bfin_can_set_bittiming
;
511 priv
->can
.do_set_mode
= bfin_can_set_mode
;
512 priv
->can
.ctrlmode_supported
= CAN_CTRLMODE_3_SAMPLES
;
517 static const struct net_device_ops bfin_can_netdev_ops
= {
518 .ndo_open
= bfin_can_open
,
519 .ndo_stop
= bfin_can_close
,
520 .ndo_start_xmit
= bfin_can_start_xmit
,
523 static int __devinit
bfin_can_probe(struct platform_device
*pdev
)
526 struct net_device
*dev
;
527 struct bfin_can_priv
*priv
;
528 struct resource
*res_mem
, *rx_irq
, *tx_irq
, *err_irq
;
529 unsigned short *pdata
;
531 pdata
= pdev
->dev
.platform_data
;
533 dev_err(&pdev
->dev
, "No platform data provided!\n");
538 res_mem
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
539 rx_irq
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
540 tx_irq
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 1);
541 err_irq
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 2);
542 if (!res_mem
|| !rx_irq
|| !tx_irq
|| !err_irq
) {
547 if (!request_mem_region(res_mem
->start
, resource_size(res_mem
),
548 dev_name(&pdev
->dev
))) {
553 /* request peripheral pins */
554 err
= peripheral_request_list(pdata
, dev_name(&pdev
->dev
));
556 goto exit_mem_release
;
558 dev
= alloc_bfin_candev();
561 goto exit_peri_pin_free
;
564 priv
= netdev_priv(dev
);
565 priv
->membase
= (void __iomem
*)res_mem
->start
;
566 priv
->rx_irq
= rx_irq
->start
;
567 priv
->tx_irq
= tx_irq
->start
;
568 priv
->err_irq
= err_irq
->start
;
569 priv
->pin_list
= pdata
;
570 priv
->can
.clock
.freq
= get_sclk();
572 dev_set_drvdata(&pdev
->dev
, dev
);
573 SET_NETDEV_DEV(dev
, &pdev
->dev
);
575 dev
->flags
|= IFF_ECHO
; /* we support local echo */
576 dev
->netdev_ops
= &bfin_can_netdev_ops
;
578 bfin_can_set_reset_mode(dev
);
580 err
= register_candev(dev
);
582 dev_err(&pdev
->dev
, "registering failed (err=%d)\n", err
);
583 goto exit_candev_free
;
587 "%s device registered"
588 "(®_base=%p, rx_irq=%d, tx_irq=%d, err_irq=%d, sclk=%d)\n",
589 DRV_NAME
, (void *)priv
->membase
, priv
->rx_irq
,
590 priv
->tx_irq
, priv
->err_irq
, priv
->can
.clock
.freq
);
596 peripheral_free_list(pdata
);
598 release_mem_region(res_mem
->start
, resource_size(res_mem
));
603 static int __devexit
bfin_can_remove(struct platform_device
*pdev
)
605 struct net_device
*dev
= dev_get_drvdata(&pdev
->dev
);
606 struct bfin_can_priv
*priv
= netdev_priv(dev
);
607 struct resource
*res
;
609 bfin_can_set_reset_mode(dev
);
611 unregister_candev(dev
);
613 dev_set_drvdata(&pdev
->dev
, NULL
);
615 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
616 release_mem_region(res
->start
, resource_size(res
));
618 peripheral_free_list(priv
->pin_list
);
625 static int bfin_can_suspend(struct platform_device
*pdev
, pm_message_t mesg
)
627 struct net_device
*dev
= dev_get_drvdata(&pdev
->dev
);
628 struct bfin_can_priv
*priv
= netdev_priv(dev
);
629 struct bfin_can_regs __iomem
*reg
= priv
->membase
;
630 int timeout
= BFIN_CAN_TIMEOUT
;
632 if (netif_running(dev
)) {
633 /* enter sleep mode */
634 bfin_write(®
->control
, bfin_read(®
->control
) | SMR
);
636 while (!(bfin_read(®
->intr
) & SMACK
)) {
638 if (--timeout
== 0) {
639 dev_err(dev
->dev
.parent
,
640 "fail to enter sleep mode\n");
649 static int bfin_can_resume(struct platform_device
*pdev
)
651 struct net_device
*dev
= dev_get_drvdata(&pdev
->dev
);
652 struct bfin_can_priv
*priv
= netdev_priv(dev
);
653 struct bfin_can_regs __iomem
*reg
= priv
->membase
;
655 if (netif_running(dev
)) {
656 /* leave sleep mode */
657 bfin_write(®
->intr
, 0);
664 #define bfin_can_suspend NULL
665 #define bfin_can_resume NULL
666 #endif /* CONFIG_PM */
668 static struct platform_driver bfin_can_driver
= {
669 .probe
= bfin_can_probe
,
670 .remove
= __devexit_p(bfin_can_remove
),
671 .suspend
= bfin_can_suspend
,
672 .resume
= bfin_can_resume
,
675 .owner
= THIS_MODULE
,
679 static int __init
bfin_can_init(void)
681 return platform_driver_register(&bfin_can_driver
);
683 module_init(bfin_can_init
);
685 static void __exit
bfin_can_exit(void)
687 platform_driver_unregister(&bfin_can_driver
);
689 module_exit(bfin_can_exit
);
691 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
692 MODULE_LICENSE("GPL");
693 MODULE_DESCRIPTION("Blackfin on-chip CAN netdevice driver");