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Merge branch 'for-linus' of git://git.infradead.org/users/sameo/mfd-2.6
[linux-btrfs-devel.git] / drivers / net / wireless / iwlegacy / iwl3945-base.c
blob66ee15629a76454f849639fc2f5f29aadf6c47f4
1 /******************************************************************************
2 *
3 * Copyright(c) 2003 - 2011 Intel Corporation. All rights reserved.
4 *
5 * Portions of this file are derived from the ipw3945 project, as well
6 * as portions of the ieee80211 subsystem header files.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of version 2 of the GNU General Public License as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but WITHOUT
13 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
15 * more details.
16 *
17 * You should have received a copy of the GNU General Public License along with
18 * this program; if not, write to the Free Software Foundation, Inc.,
19 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
20 *
21 * The full GNU General Public License is included in this distribution in the
22 * file called LICENSE.
23 *
24 * Contact Information:
25 * Intel Linux Wireless <ilw@linux.intel.com>
26 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27 *
28 *****************************************************************************/
29
30 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
31
32 #include <linux/kernel.h>
33 #include <linux/module.h>
34 #include <linux/init.h>
35 #include <linux/pci.h>
36 #include <linux/pci-aspm.h>
37 #include <linux/slab.h>
38 #include <linux/dma-mapping.h>
39 #include <linux/delay.h>
40 #include <linux/sched.h>
41 #include <linux/skbuff.h>
42 #include <linux/netdevice.h>
43 #include <linux/wireless.h>
44 #include <linux/firmware.h>
45 #include <linux/etherdevice.h>
46 #include <linux/if_arp.h>
47
48 #include <net/ieee80211_radiotap.h>
49 #include <net/mac80211.h>
50
51 #include <asm/div64.h>
52
53 #define DRV_NAME "iwl3945"
54
55 #include "iwl-fh.h"
56 #include "iwl-3945-fh.h"
57 #include "iwl-commands.h"
58 #include "iwl-sta.h"
59 #include "iwl-3945.h"
60 #include "iwl-core.h"
61 #include "iwl-helpers.h"
62 #include "iwl-dev.h"
63 #include "iwl-spectrum.h"
64
65 /*
66 * module name, copyright, version, etc.
67 */
68
69 #define DRV_DESCRIPTION \
70 "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
71
72 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
73 #define VD "d"
74 #else
75 #define VD
76 #endif
77
78 /*
79 * add "s" to indicate spectrum measurement included.
80 * we add it here to be consistent with previous releases in which
81 * this was configurable.
82 */
83 #define DRV_VERSION IWLWIFI_VERSION VD "s"
84 #define DRV_COPYRIGHT "Copyright(c) 2003-2011 Intel Corporation"
85 #define DRV_AUTHOR "<ilw@linux.intel.com>"
86
87 MODULE_DESCRIPTION(DRV_DESCRIPTION);
88 MODULE_VERSION(DRV_VERSION);
89 MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
90 MODULE_LICENSE("GPL");
91
92 /* module parameters */
93 struct iwl_mod_params iwl3945_mod_params = {
94 .sw_crypto = 1,
95 .restart_fw = 1,
96 .disable_hw_scan = 1,
97 /* the rest are 0 by default */
98 };
99
100 /**
101 * iwl3945_get_antenna_flags - Get antenna flags for RXON command
102 * @priv: eeprom and antenna fields are used to determine antenna flags
103 *
104 * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
105 * iwl3945_mod_params.antenna specifies the antenna diversity mode:
106 *
107 * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
108 * IWL_ANTENNA_MAIN - Force MAIN antenna
109 * IWL_ANTENNA_AUX - Force AUX antenna
110 */
111 __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
112 {
113 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
114
115 switch (iwl3945_mod_params.antenna) {
116 case IWL_ANTENNA_DIVERSITY:
117 return 0;
118
119 case IWL_ANTENNA_MAIN:
120 if (eeprom->antenna_switch_type)
121 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
122 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
123
124 case IWL_ANTENNA_AUX:
125 if (eeprom->antenna_switch_type)
126 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
127 return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
128 }
129
130 /* bad antenna selector value */
131 IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
132 iwl3945_mod_params.antenna);
133
134 return 0; /* "diversity" is default if error */
135 }
136
137 static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
138 struct ieee80211_key_conf *keyconf,
139 u8 sta_id)
140 {
141 unsigned long flags;
142 __le16 key_flags = 0;
143 int ret;
144
145 key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
146 key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
147
148 if (sta_id == priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id)
149 key_flags |= STA_KEY_MULTICAST_MSK;
150
151 keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
152 keyconf->hw_key_idx = keyconf->keyidx;
153 key_flags &= ~STA_KEY_FLG_INVALID;
154
155 spin_lock_irqsave(&priv->sta_lock, flags);
156 priv->stations[sta_id].keyinfo.cipher = keyconf->cipher;
157 priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
158 memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
159 keyconf->keylen);
160
161 memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
162 keyconf->keylen);
163
164 if ((priv->stations[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
165 == STA_KEY_FLG_NO_ENC)
166 priv->stations[sta_id].sta.key.key_offset =
167 iwl_legacy_get_free_ucode_key_index(priv);
168 /* else, we are overriding an existing key => no need to allocated room
169 * in uCode. */
170
171 WARN(priv->stations[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
172 "no space for a new key");
173
174 priv->stations[sta_id].sta.key.key_flags = key_flags;
175 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
176 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
177
178 IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
179
180 ret = iwl_legacy_send_add_sta(priv,
181 &priv->stations[sta_id].sta, CMD_ASYNC);
182
183 spin_unlock_irqrestore(&priv->sta_lock, flags);
184
185 return ret;
186 }
187
188 static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
189 struct ieee80211_key_conf *keyconf,
190 u8 sta_id)
191 {
192 return -EOPNOTSUPP;
193 }
194
195 static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
196 struct ieee80211_key_conf *keyconf,
197 u8 sta_id)
198 {
199 return -EOPNOTSUPP;
200 }
201
202 static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
203 {
204 unsigned long flags;
205 struct iwl_legacy_addsta_cmd sta_cmd;
206
207 spin_lock_irqsave(&priv->sta_lock, flags);
208 memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl_hw_key));
209 memset(&priv->stations[sta_id].sta.key, 0,
210 sizeof(struct iwl4965_keyinfo));
211 priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
212 priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
213 priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
214 memcpy(&sta_cmd, &priv->stations[sta_id].sta, sizeof(struct iwl_legacy_addsta_cmd));
215 spin_unlock_irqrestore(&priv->sta_lock, flags);
216
217 IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
218 return iwl_legacy_send_add_sta(priv, &sta_cmd, CMD_SYNC);
219 }
220
221 static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
222 struct ieee80211_key_conf *keyconf, u8 sta_id)
223 {
224 int ret = 0;
225
226 keyconf->hw_key_idx = HW_KEY_DYNAMIC;
227
228 switch (keyconf->cipher) {
229 case WLAN_CIPHER_SUITE_CCMP:
230 ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
231 break;
232 case WLAN_CIPHER_SUITE_TKIP:
233 ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
234 break;
235 case WLAN_CIPHER_SUITE_WEP40:
236 case WLAN_CIPHER_SUITE_WEP104:
237 ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
238 break;
239 default:
240 IWL_ERR(priv, "Unknown alg: %s alg=%x\n", __func__,
241 keyconf->cipher);
242 ret = -EINVAL;
243 }
244
245 IWL_DEBUG_WEP(priv, "Set dynamic key: alg=%x len=%d idx=%d sta=%d ret=%d\n",
246 keyconf->cipher, keyconf->keylen, keyconf->keyidx,
247 sta_id, ret);
248
249 return ret;
250 }
251
252 static int iwl3945_remove_static_key(struct iwl_priv *priv)
253 {
254 int ret = -EOPNOTSUPP;
255
256 return ret;
257 }
258
259 static int iwl3945_set_static_key(struct iwl_priv *priv,
260 struct ieee80211_key_conf *key)
261 {
262 if (key->cipher == WLAN_CIPHER_SUITE_WEP40 ||
263 key->cipher == WLAN_CIPHER_SUITE_WEP104)
264 return -EOPNOTSUPP;
265
266 IWL_ERR(priv, "Static key invalid: cipher %x\n", key->cipher);
267 return -EINVAL;
268 }
269
270 static void iwl3945_clear_free_frames(struct iwl_priv *priv)
271 {
272 struct list_head *element;
273
274 IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
275 priv->frames_count);
276
277 while (!list_empty(&priv->free_frames)) {
278 element = priv->free_frames.next;
279 list_del(element);
280 kfree(list_entry(element, struct iwl3945_frame, list));
281 priv->frames_count--;
282 }
283
284 if (priv->frames_count) {
285 IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
286 priv->frames_count);
287 priv->frames_count = 0;
288 }
289 }
290
291 static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
292 {
293 struct iwl3945_frame *frame;
294 struct list_head *element;
295 if (list_empty(&priv->free_frames)) {
296 frame = kzalloc(sizeof(*frame), GFP_KERNEL);
297 if (!frame) {
298 IWL_ERR(priv, "Could not allocate frame!\n");
299 return NULL;
300 }
301
302 priv->frames_count++;
303 return frame;
304 }
305
306 element = priv->free_frames.next;
307 list_del(element);
308 return list_entry(element, struct iwl3945_frame, list);
309 }
310
311 static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
312 {
313 memset(frame, 0, sizeof(*frame));
314 list_add(&frame->list, &priv->free_frames);
315 }
316
317 unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
318 struct ieee80211_hdr *hdr,
319 int left)
320 {
321
322 if (!iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS) || !priv->beacon_skb)
323 return 0;
324
325 if (priv->beacon_skb->len > left)
326 return 0;
327
328 memcpy(hdr, priv->beacon_skb->data, priv->beacon_skb->len);
329
330 return priv->beacon_skb->len;
331 }
332
333 static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
334 {
335 struct iwl3945_frame *frame;
336 unsigned int frame_size;
337 int rc;
338 u8 rate;
339
340 frame = iwl3945_get_free_frame(priv);
341
342 if (!frame) {
343 IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
344 "command.\n");
345 return -ENOMEM;
346 }
347
348 rate = iwl_legacy_get_lowest_plcp(priv,
349 &priv->contexts[IWL_RXON_CTX_BSS]);
350
351 frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
352
353 rc = iwl_legacy_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
354 &frame->u.cmd[0]);
355
356 iwl3945_free_frame(priv, frame);
357
358 return rc;
359 }
360
361 static void iwl3945_unset_hw_params(struct iwl_priv *priv)
362 {
363 if (priv->_3945.shared_virt)
364 dma_free_coherent(&priv->pci_dev->dev,
365 sizeof(struct iwl3945_shared),
366 priv->_3945.shared_virt,
367 priv->_3945.shared_phys);
368 }
369
370 static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
371 struct ieee80211_tx_info *info,
372 struct iwl_device_cmd *cmd,
373 struct sk_buff *skb_frag,
374 int sta_id)
375 {
376 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
377 struct iwl_hw_key *keyinfo = &priv->stations[sta_id].keyinfo;
378
379 tx_cmd->sec_ctl = 0;
380
381 switch (keyinfo->cipher) {
382 case WLAN_CIPHER_SUITE_CCMP:
383 tx_cmd->sec_ctl = TX_CMD_SEC_CCM;
384 memcpy(tx_cmd->key, keyinfo->key, keyinfo->keylen);
385 IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
386 break;
387
388 case WLAN_CIPHER_SUITE_TKIP:
389 break;
390
391 case WLAN_CIPHER_SUITE_WEP104:
392 tx_cmd->sec_ctl |= TX_CMD_SEC_KEY128;
393 /* fall through */
394 case WLAN_CIPHER_SUITE_WEP40:
395 tx_cmd->sec_ctl |= TX_CMD_SEC_WEP |
396 (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
397
398 memcpy(&tx_cmd->key[3], keyinfo->key, keyinfo->keylen);
399
400 IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
401 "with key %d\n", info->control.hw_key->hw_key_idx);
402 break;
403
404 default:
405 IWL_ERR(priv, "Unknown encode cipher %x\n", keyinfo->cipher);
406 break;
407 }
408 }
409
410 /*
411 * handle build REPLY_TX command notification.
412 */
413 static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
414 struct iwl_device_cmd *cmd,
415 struct ieee80211_tx_info *info,
416 struct ieee80211_hdr *hdr, u8 std_id)
417 {
418 struct iwl3945_tx_cmd *tx_cmd = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
419 __le32 tx_flags = tx_cmd->tx_flags;
420 __le16 fc = hdr->frame_control;
421
422 tx_cmd->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
423 if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
424 tx_flags |= TX_CMD_FLG_ACK_MSK;
425 if (ieee80211_is_mgmt(fc))
426 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
427 if (ieee80211_is_probe_resp(fc) &&
428 !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
429 tx_flags |= TX_CMD_FLG_TSF_MSK;
430 } else {
431 tx_flags &= (~TX_CMD_FLG_ACK_MSK);
432 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
433 }
434
435 tx_cmd->sta_id = std_id;
436 if (ieee80211_has_morefrags(fc))
437 tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
438
439 if (ieee80211_is_data_qos(fc)) {
440 u8 *qc = ieee80211_get_qos_ctl(hdr);
441 tx_cmd->tid_tspec = qc[0] & 0xf;
442 tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
443 } else {
444 tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
445 }
446
447 iwl_legacy_tx_cmd_protection(priv, info, fc, &tx_flags);
448
449 tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
450 if (ieee80211_is_mgmt(fc)) {
451 if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
452 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(3);
453 else
454 tx_cmd->timeout.pm_frame_timeout = cpu_to_le16(2);
455 } else {
456 tx_cmd->timeout.pm_frame_timeout = 0;
457 }
458
459 tx_cmd->driver_txop = 0;
460 tx_cmd->tx_flags = tx_flags;
461 tx_cmd->next_frame_len = 0;
462 }
463
464 /*
465 * start REPLY_TX command process
466 */
467 static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
468 {
469 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
470 struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
471 struct iwl3945_tx_cmd *tx_cmd;
472 struct iwl_tx_queue *txq = NULL;
473 struct iwl_queue *q = NULL;
474 struct iwl_device_cmd *out_cmd;
475 struct iwl_cmd_meta *out_meta;
476 dma_addr_t phys_addr;
477 dma_addr_t txcmd_phys;
478 int txq_id = skb_get_queue_mapping(skb);
479 u16 len, idx, hdr_len;
480 u8 id;
481 u8 unicast;
482 u8 sta_id;
483 u8 tid = 0;
484 __le16 fc;
485 u8 wait_write_ptr = 0;
486 unsigned long flags;
487
488 spin_lock_irqsave(&priv->lock, flags);
489 if (iwl_legacy_is_rfkill(priv)) {
490 IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
491 goto drop_unlock;
492 }
493
494 if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
495 IWL_ERR(priv, "ERROR: No TX rate available.\n");
496 goto drop_unlock;
497 }
498
499 unicast = !is_multicast_ether_addr(hdr->addr1);
500 id = 0;
501
502 fc = hdr->frame_control;
503
504 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
505 if (ieee80211_is_auth(fc))
506 IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
507 else if (ieee80211_is_assoc_req(fc))
508 IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
509 else if (ieee80211_is_reassoc_req(fc))
510 IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
511 #endif
512
513 spin_unlock_irqrestore(&priv->lock, flags);
514
515 hdr_len = ieee80211_hdrlen(fc);
516
517 /* Find index into station table for destination station */
518 sta_id = iwl_legacy_sta_id_or_broadcast(
519 priv, &priv->contexts[IWL_RXON_CTX_BSS],
520 info->control.sta);
521 if (sta_id == IWL_INVALID_STATION) {
522 IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
523 hdr->addr1);
524 goto drop;
525 }
526
527 IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
528
529 if (ieee80211_is_data_qos(fc)) {
530 u8 *qc = ieee80211_get_qos_ctl(hdr);
531 tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
532 if (unlikely(tid >= MAX_TID_COUNT))
533 goto drop;
534 }
535
536 /* Descriptor for chosen Tx queue */
537 txq = &priv->txq[txq_id];
538 q = &txq->q;
539
540 if ((iwl_legacy_queue_space(q) < q->high_mark))
541 goto drop;
542
543 spin_lock_irqsave(&priv->lock, flags);
544
545 idx = iwl_legacy_get_cmd_index(q, q->write_ptr, 0);
546
547 /* Set up driver data for this TFD */
548 memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
549 txq->txb[q->write_ptr].skb = skb;
550 txq->txb[q->write_ptr].ctx = &priv->contexts[IWL_RXON_CTX_BSS];
551
552 /* Init first empty entry in queue's array of Tx/cmd buffers */
553 out_cmd = txq->cmd[idx];
554 out_meta = &txq->meta[idx];
555 tx_cmd = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
556 memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
557 memset(tx_cmd, 0, sizeof(*tx_cmd));
558
559 /*
560 * Set up the Tx-command (not MAC!) header.
561 * Store the chosen Tx queue and TFD index within the sequence field;
562 * after Tx, uCode's Tx response will return this value so driver can
563 * locate the frame within the tx queue and do post-tx processing.
564 */
565 out_cmd->hdr.cmd = REPLY_TX;
566 out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
567 INDEX_TO_SEQ(q->write_ptr)));
568
569 /* Copy MAC header from skb into command buffer */
570 memcpy(tx_cmd->hdr, hdr, hdr_len);
571
572
573 if (info->control.hw_key)
574 iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
575
576 /* TODO need this for burst mode later on */
577 iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
578
579 /* set is_hcca to 0; it probably will never be implemented */
580 iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
581
582 /* Total # bytes to be transmitted */
583 len = (u16)skb->len;
584 tx_cmd->len = cpu_to_le16(len);
585
586 iwl_legacy_dbg_log_tx_data_frame(priv, len, hdr);
587 iwl_legacy_update_stats(priv, true, fc, len);
588 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
589 tx_cmd->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
590
591 if (!ieee80211_has_morefrags(hdr->frame_control)) {
592 txq->need_update = 1;
593 } else {
594 wait_write_ptr = 1;
595 txq->need_update = 0;
596 }
597
598 IWL_DEBUG_TX(priv, "sequence nr = 0X%x\n",
599 le16_to_cpu(out_cmd->hdr.sequence));
600 IWL_DEBUG_TX(priv, "tx_flags = 0X%x\n", le32_to_cpu(tx_cmd->tx_flags));
601 iwl_print_hex_dump(priv, IWL_DL_TX, tx_cmd, sizeof(*tx_cmd));
602 iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx_cmd->hdr,
603 ieee80211_hdrlen(fc));
604
605 /*
606 * Use the first empty entry in this queue's command buffer array
607 * to contain the Tx command and MAC header concatenated together
608 * (payload data will be in another buffer).
609 * Size of this varies, due to varying MAC header length.
610 * If end is not dword aligned, we'll have 2 extra bytes at the end
611 * of the MAC header (device reads on dword boundaries).
612 * We'll tell device about this padding later.
613 */
614 len = sizeof(struct iwl3945_tx_cmd) +
615 sizeof(struct iwl_cmd_header) + hdr_len;
616 len = (len + 3) & ~3;
617
618 /* Physical address of this Tx command's header (not MAC header!),
619 * within command buffer array. */
620 txcmd_phys = pci_map_single(priv->pci_dev, &out_cmd->hdr,
621 len, PCI_DMA_TODEVICE);
622 /* we do not map meta data ... so we can safely access address to
623 * provide to unmap command*/
624 dma_unmap_addr_set(out_meta, mapping, txcmd_phys);
625 dma_unmap_len_set(out_meta, len, len);
626
627 /* Add buffer containing Tx command and MAC(!) header to TFD's
628 * first entry */
629 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
630 txcmd_phys, len, 1, 0);
631
632
633 /* Set up TFD's 2nd entry to point directly to remainder of skb,
634 * if any (802.11 null frames have no payload). */
635 len = skb->len - hdr_len;
636 if (len) {
637 phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
638 len, PCI_DMA_TODEVICE);
639 priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
640 phys_addr, len,
641 0, U32_PAD(len));
642 }
643
644
645 /* Tell device the write index *just past* this latest filled TFD */
646 q->write_ptr = iwl_legacy_queue_inc_wrap(q->write_ptr, q->n_bd);
647 iwl_legacy_txq_update_write_ptr(priv, txq);
648 spin_unlock_irqrestore(&priv->lock, flags);
649
650 if ((iwl_legacy_queue_space(q) < q->high_mark)
651 && priv->mac80211_registered) {
652 if (wait_write_ptr) {
653 spin_lock_irqsave(&priv->lock, flags);
654 txq->need_update = 1;
655 iwl_legacy_txq_update_write_ptr(priv, txq);
656 spin_unlock_irqrestore(&priv->lock, flags);
657 }
658
659 iwl_legacy_stop_queue(priv, txq);
660 }
661
662 return 0;
663
664 drop_unlock:
665 spin_unlock_irqrestore(&priv->lock, flags);
666 drop:
667 return -1;
668 }
669
670 static int iwl3945_get_measurement(struct iwl_priv *priv,
671 struct ieee80211_measurement_params *params,
672 u8 type)
673 {
674 struct iwl_spectrum_cmd spectrum;
675 struct iwl_rx_packet *pkt;
676 struct iwl_host_cmd cmd = {
677 .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
678 .data = (void *)&spectrum,
679 .flags = CMD_WANT_SKB,
680 };
681 u32 add_time = le64_to_cpu(params->start_time);
682 int rc;
683 int spectrum_resp_status;
684 int duration = le16_to_cpu(params->duration);
685 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
686
687 if (iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS))
688 add_time = iwl_legacy_usecs_to_beacons(priv,
689 le64_to_cpu(params->start_time) - priv->_3945.last_tsf,
690 le16_to_cpu(ctx->timing.beacon_interval));
691
692 memset(&spectrum, 0, sizeof(spectrum));
693
694 spectrum.channel_count = cpu_to_le16(1);
695 spectrum.flags =
696 RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
697 spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
698 cmd.len = sizeof(spectrum);
699 spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
700
701 if (iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS))
702 spectrum.start_time =
703 iwl_legacy_add_beacon_time(priv,
704 priv->_3945.last_beacon_time, add_time,
705 le16_to_cpu(ctx->timing.beacon_interval));
706 else
707 spectrum.start_time = 0;
708
709 spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
710 spectrum.channels[0].channel = params->channel;
711 spectrum.channels[0].type = type;
712 if (ctx->active.flags & RXON_FLG_BAND_24G_MSK)
713 spectrum.flags |= RXON_FLG_BAND_24G_MSK |
714 RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
715
716 rc = iwl_legacy_send_cmd_sync(priv, &cmd);
717 if (rc)
718 return rc;
719
720 pkt = (struct iwl_rx_packet *)cmd.reply_page;
721 if (pkt->hdr.flags & IWL_CMD_FAILED_MSK) {
722 IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
723 rc = -EIO;
724 }
725
726 spectrum_resp_status = le16_to_cpu(pkt->u.spectrum.status);
727 switch (spectrum_resp_status) {
728 case 0: /* Command will be handled */
729 if (pkt->u.spectrum.id != 0xff) {
730 IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
731 pkt->u.spectrum.id);
732 priv->measurement_status &= ~MEASUREMENT_READY;
733 }
734 priv->measurement_status |= MEASUREMENT_ACTIVE;
735 rc = 0;
736 break;
737
738 case 1: /* Command will not be handled */
739 rc = -EAGAIN;
740 break;
741 }
742
743 iwl_legacy_free_pages(priv, cmd.reply_page);
744
745 return rc;
746 }
747
748 static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
749 struct iwl_rx_mem_buffer *rxb)
750 {
751 struct iwl_rx_packet *pkt = rxb_addr(rxb);
752 struct iwl_alive_resp *palive;
753 struct delayed_work *pwork;
754
755 palive = &pkt->u.alive_frame;
756
757 IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
758 "0x%01X 0x%01X\n",
759 palive->is_valid, palive->ver_type,
760 palive->ver_subtype);
761
762 if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
763 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
764 memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
765 sizeof(struct iwl_alive_resp));
766 pwork = &priv->init_alive_start;
767 } else {
768 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
769 memcpy(&priv->card_alive, &pkt->u.alive_frame,
770 sizeof(struct iwl_alive_resp));
771 pwork = &priv->alive_start;
772 iwl3945_disable_events(priv);
773 }
774
775 /* We delay the ALIVE response by 5ms to
776 * give the HW RF Kill time to activate... */
777 if (palive->is_valid == UCODE_VALID_OK)
778 queue_delayed_work(priv->workqueue, pwork,
779 msecs_to_jiffies(5));
780 else
781 IWL_WARN(priv, "uCode did not respond OK.\n");
782 }
783
784 static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
785 struct iwl_rx_mem_buffer *rxb)
786 {
787 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
788 struct iwl_rx_packet *pkt = rxb_addr(rxb);
789 #endif
790
791 IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
792 }
793
794 static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
795 struct iwl_rx_mem_buffer *rxb)
796 {
797 struct iwl_rx_packet *pkt = rxb_addr(rxb);
798 struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
799 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
800 u8 rate = beacon->beacon_notify_hdr.rate;
801
802 IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
803 "tsf %d %d rate %d\n",
804 le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
805 beacon->beacon_notify_hdr.failure_frame,
806 le32_to_cpu(beacon->ibss_mgr_status),
807 le32_to_cpu(beacon->high_tsf),
808 le32_to_cpu(beacon->low_tsf), rate);
809 #endif
810
811 priv->ibss_manager = le32_to_cpu(beacon->ibss_mgr_status);
812
813 }
814
815 /* Handle notification from uCode that card's power state is changing
816 * due to software, hardware, or critical temperature RFKILL */
817 static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
818 struct iwl_rx_mem_buffer *rxb)
819 {
820 struct iwl_rx_packet *pkt = rxb_addr(rxb);
821 u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
822 unsigned long status = priv->status;
823
824 IWL_WARN(priv, "Card state received: HW:%s SW:%s\n",
825 (flags & HW_CARD_DISABLED) ? "Kill" : "On",
826 (flags & SW_CARD_DISABLED) ? "Kill" : "On");
827
828 iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
829 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
830
831 if (flags & HW_CARD_DISABLED)
832 set_bit(STATUS_RF_KILL_HW, &priv->status);
833 else
834 clear_bit(STATUS_RF_KILL_HW, &priv->status);
835
836
837 iwl_legacy_scan_cancel(priv);
838
839 if ((test_bit(STATUS_RF_KILL_HW, &status) !=
840 test_bit(STATUS_RF_KILL_HW, &priv->status)))
841 wiphy_rfkill_set_hw_state(priv->hw->wiphy,
842 test_bit(STATUS_RF_KILL_HW, &priv->status));
843 else
844 wake_up(&priv->wait_command_queue);
845 }
846
847 /**
848 * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
849 *
850 * Setup the RX handlers for each of the reply types sent from the uCode
851 * to the host.
852 *
853 * This function chains into the hardware specific files for them to setup
854 * any hardware specific handlers as well.
855 */
856 static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
857 {
858 priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
859 priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
860 priv->rx_handlers[REPLY_ERROR] = iwl_legacy_rx_reply_error;
861 priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_legacy_rx_csa;
862 priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
863 iwl_legacy_rx_spectrum_measure_notif;
864 priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_legacy_rx_pm_sleep_notif;
865 priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
866 iwl_legacy_rx_pm_debug_statistics_notif;
867 priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
868
869 /*
870 * The same handler is used for both the REPLY to a discrete
871 * statistics request from the host as well as for the periodic
872 * statistics notifications (after received beacons) from the uCode.
873 */
874 priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_reply_statistics;
875 priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
876
877 iwl_legacy_setup_rx_scan_handlers(priv);
878 priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
879
880 /* Set up hardware specific Rx handlers */
881 iwl3945_hw_rx_handler_setup(priv);
882 }
883
884 /************************** RX-FUNCTIONS ****************************/
885 /*
886 * Rx theory of operation
887 *
888 * The host allocates 32 DMA target addresses and passes the host address
889 * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
890 * 0 to 31
891 *
892 * Rx Queue Indexes
893 * The host/firmware share two index registers for managing the Rx buffers.
894 *
895 * The READ index maps to the first position that the firmware may be writing
896 * to -- the driver can read up to (but not including) this position and get
897 * good data.
898 * The READ index is managed by the firmware once the card is enabled.
899 *
900 * The WRITE index maps to the last position the driver has read from -- the
901 * position preceding WRITE is the last slot the firmware can place a packet.
902 *
903 * The queue is empty (no good data) if WRITE = READ - 1, and is full if
904 * WRITE = READ.
905 *
906 * During initialization, the host sets up the READ queue position to the first
907 * INDEX position, and WRITE to the last (READ - 1 wrapped)
908 *
909 * When the firmware places a packet in a buffer, it will advance the READ index
910 * and fire the RX interrupt. The driver can then query the READ index and
911 * process as many packets as possible, moving the WRITE index forward as it
912 * resets the Rx queue buffers with new memory.
913 *
914 * The management in the driver is as follows:
915 * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
916 * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
917 * to replenish the iwl->rxq->rx_free.
918 * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
919 * iwl->rxq is replenished and the READ INDEX is updated (updating the
920 * 'processed' and 'read' driver indexes as well)
921 * + A received packet is processed and handed to the kernel network stack,
922 * detached from the iwl->rxq. The driver 'processed' index is updated.
923 * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
924 * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
925 * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
926 * were enough free buffers and RX_STALLED is set it is cleared.
927 *
928 *
929 * Driver sequence:
930 *
931 * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
932 * iwl3945_rx_queue_restock
933 * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
934 * queue, updates firmware pointers, and updates
935 * the WRITE index. If insufficient rx_free buffers
936 * are available, schedules iwl3945_rx_replenish
937 *
938 * -- enable interrupts --
939 * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
940 * READ INDEX, detaching the SKB from the pool.
941 * Moves the packet buffer from queue to rx_used.
942 * Calls iwl3945_rx_queue_restock to refill any empty
943 * slots.
944 * ...
945 *
946 */
947
948 /**
949 * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
950 */
951 static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
952 dma_addr_t dma_addr)
953 {
954 return cpu_to_le32((u32)dma_addr);
955 }
956
957 /**
958 * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
959 *
960 * If there are slots in the RX queue that need to be restocked,
961 * and we have free pre-allocated buffers, fill the ranks as much
962 * as we can, pulling from rx_free.
963 *
964 * This moves the 'write' index forward to catch up with 'processed', and
965 * also updates the memory address in the firmware to reference the new
966 * target buffer.
967 */
968 static void iwl3945_rx_queue_restock(struct iwl_priv *priv)
969 {
970 struct iwl_rx_queue *rxq = &priv->rxq;
971 struct list_head *element;
972 struct iwl_rx_mem_buffer *rxb;
973 unsigned long flags;
974 int write;
975
976 spin_lock_irqsave(&rxq->lock, flags);
977 write = rxq->write & ~0x7;
978 while ((iwl_legacy_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
979 /* Get next free Rx buffer, remove from free list */
980 element = rxq->rx_free.next;
981 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
982 list_del(element);
983
984 /* Point to Rx buffer via next RBD in circular buffer */
985 rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->page_dma);
986 rxq->queue[rxq->write] = rxb;
987 rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
988 rxq->free_count--;
989 }
990 spin_unlock_irqrestore(&rxq->lock, flags);
991 /* If the pre-allocated buffer pool is dropping low, schedule to
992 * refill it */
993 if (rxq->free_count <= RX_LOW_WATERMARK)
994 queue_work(priv->workqueue, &priv->rx_replenish);
995
996
997 /* If we've added more space for the firmware to place data, tell it.
998 * Increment device's write pointer in multiples of 8. */
999 if ((rxq->write_actual != (rxq->write & ~0x7))
1000 || (abs(rxq->write - rxq->read) > 7)) {
1001 spin_lock_irqsave(&rxq->lock, flags);
1002 rxq->need_update = 1;
1003 spin_unlock_irqrestore(&rxq->lock, flags);
1004 iwl_legacy_rx_queue_update_write_ptr(priv, rxq);
1005 }
1006 }
1007
1008 /**
1009 * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
1010 *
1011 * When moving to rx_free an SKB is allocated for the slot.
1012 *
1013 * Also restock the Rx queue via iwl3945_rx_queue_restock.
1014 * This is called as a scheduled work item (except for during initialization)
1015 */
1016 static void iwl3945_rx_allocate(struct iwl_priv *priv, gfp_t priority)
1017 {
1018 struct iwl_rx_queue *rxq = &priv->rxq;
1019 struct list_head *element;
1020 struct iwl_rx_mem_buffer *rxb;
1021 struct page *page;
1022 unsigned long flags;
1023 gfp_t gfp_mask = priority;
1024
1025 while (1) {
1026 spin_lock_irqsave(&rxq->lock, flags);
1027
1028 if (list_empty(&rxq->rx_used)) {
1029 spin_unlock_irqrestore(&rxq->lock, flags);
1030 return;
1031 }
1032 spin_unlock_irqrestore(&rxq->lock, flags);
1033
1034 if (rxq->free_count > RX_LOW_WATERMARK)
1035 gfp_mask |= __GFP_NOWARN;
1036
1037 if (priv->hw_params.rx_page_order > 0)
1038 gfp_mask |= __GFP_COMP;
1039
1040 /* Alloc a new receive buffer */
1041 page = alloc_pages(gfp_mask, priv->hw_params.rx_page_order);
1042 if (!page) {
1043 if (net_ratelimit())
1044 IWL_DEBUG_INFO(priv, "Failed to allocate SKB buffer.\n");
1045 if ((rxq->free_count <= RX_LOW_WATERMARK) &&
1046 net_ratelimit())
1047 IWL_CRIT(priv, "Failed to allocate SKB buffer with %s. Only %u free buffers remaining.\n",
1048 priority == GFP_ATOMIC ? "GFP_ATOMIC" : "GFP_KERNEL",
1049 rxq->free_count);
1050 /* We don't reschedule replenish work here -- we will
1051 * call the restock method and if it still needs
1052 * more buffers it will schedule replenish */
1053 break;
1054 }
1055
1056 spin_lock_irqsave(&rxq->lock, flags);
1057 if (list_empty(&rxq->rx_used)) {
1058 spin_unlock_irqrestore(&rxq->lock, flags);
1059 __free_pages(page, priv->hw_params.rx_page_order);
1060 return;
1061 }
1062 element = rxq->rx_used.next;
1063 rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
1064 list_del(element);
1065 spin_unlock_irqrestore(&rxq->lock, flags);
1066
1067 rxb->page = page;
1068 /* Get physical address of RB/SKB */
1069 rxb->page_dma = pci_map_page(priv->pci_dev, page, 0,
1070 PAGE_SIZE << priv->hw_params.rx_page_order,
1071 PCI_DMA_FROMDEVICE);
1072
1073 spin_lock_irqsave(&rxq->lock, flags);
1074
1075 list_add_tail(&rxb->list, &rxq->rx_free);
1076 rxq->free_count++;
1077 priv->alloc_rxb_page++;
1078
1079 spin_unlock_irqrestore(&rxq->lock, flags);
1080 }
1081 }
1082
1083 void iwl3945_rx_queue_reset(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1084 {
1085 unsigned long flags;
1086 int i;
1087 spin_lock_irqsave(&rxq->lock, flags);
1088 INIT_LIST_HEAD(&rxq->rx_free);
1089 INIT_LIST_HEAD(&rxq->rx_used);
1090 /* Fill the rx_used queue with _all_ of the Rx buffers */
1091 for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
1092 /* In the reset function, these buffers may have been allocated
1093 * to an SKB, so we need to unmap and free potential storage */
1094 if (rxq->pool[i].page != NULL) {
1095 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1096 PAGE_SIZE << priv->hw_params.rx_page_order,
1097 PCI_DMA_FROMDEVICE);
1098 __iwl_legacy_free_pages(priv, rxq->pool[i].page);
1099 rxq->pool[i].page = NULL;
1100 }
1101 list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
1102 }
1103
1104 /* Set us so that we have processed and used all buffers, but have
1105 * not restocked the Rx queue with fresh buffers */
1106 rxq->read = rxq->write = 0;
1107 rxq->write_actual = 0;
1108 rxq->free_count = 0;
1109 spin_unlock_irqrestore(&rxq->lock, flags);
1110 }
1111
1112 void iwl3945_rx_replenish(void *data)
1113 {
1114 struct iwl_priv *priv = data;
1115 unsigned long flags;
1116
1117 iwl3945_rx_allocate(priv, GFP_KERNEL);
1118
1119 spin_lock_irqsave(&priv->lock, flags);
1120 iwl3945_rx_queue_restock(priv);
1121 spin_unlock_irqrestore(&priv->lock, flags);
1122 }
1123
1124 static void iwl3945_rx_replenish_now(struct iwl_priv *priv)
1125 {
1126 iwl3945_rx_allocate(priv, GFP_ATOMIC);
1127
1128 iwl3945_rx_queue_restock(priv);
1129 }
1130
1131
1132 /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
1133 * If an SKB has been detached, the POOL needs to have its SKB set to NULL
1134 * This free routine walks the list of POOL entries and if SKB is set to
1135 * non NULL it is unmapped and freed
1136 */
1137 static void iwl3945_rx_queue_free(struct iwl_priv *priv, struct iwl_rx_queue *rxq)
1138 {
1139 int i;
1140 for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
1141 if (rxq->pool[i].page != NULL) {
1142 pci_unmap_page(priv->pci_dev, rxq->pool[i].page_dma,
1143 PAGE_SIZE << priv->hw_params.rx_page_order,
1144 PCI_DMA_FROMDEVICE);
1145 __iwl_legacy_free_pages(priv, rxq->pool[i].page);
1146 rxq->pool[i].page = NULL;
1147 }
1148 }
1149
1150 dma_free_coherent(&priv->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
1151 rxq->bd_dma);
1152 dma_free_coherent(&priv->pci_dev->dev, sizeof(struct iwl_rb_status),
1153 rxq->rb_stts, rxq->rb_stts_dma);
1154 rxq->bd = NULL;
1155 rxq->rb_stts = NULL;
1156 }
1157
1158
1159 /* Convert linear signal-to-noise ratio into dB */
1160 static u8 ratio2dB[100] = {
1161 /* 0 1 2 3 4 5 6 7 8 9 */
1162 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
1163 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
1164 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
1165 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
1166 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
1167 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
1168 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
1169 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
1170 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
1171 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
1172 };
1173
1174 /* Calculates a relative dB value from a ratio of linear
1175 * (i.e. not dB) signal levels.
1176 * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
1177 int iwl3945_calc_db_from_ratio(int sig_ratio)
1178 {
1179 /* 1000:1 or higher just report as 60 dB */
1180 if (sig_ratio >= 1000)
1181 return 60;
1182
1183 /* 100:1 or higher, divide by 10 and use table,
1184 * add 20 dB to make up for divide by 10 */
1185 if (sig_ratio >= 100)
1186 return 20 + (int)ratio2dB[sig_ratio/10];
1187
1188 /* We shouldn't see this */
1189 if (sig_ratio < 1)
1190 return 0;
1191
1192 /* Use table for ratios 1:1 - 99:1 */
1193 return (int)ratio2dB[sig_ratio];
1194 }
1195
1196 /**
1197 * iwl3945_rx_handle - Main entry function for receiving responses from uCode
1198 *
1199 * Uses the priv->rx_handlers callback function array to invoke
1200 * the appropriate handlers, including command responses,
1201 * frame-received notifications, and other notifications.
1202 */
1203 static void iwl3945_rx_handle(struct iwl_priv *priv)
1204 {
1205 struct iwl_rx_mem_buffer *rxb;
1206 struct iwl_rx_packet *pkt;
1207 struct iwl_rx_queue *rxq = &priv->rxq;
1208 u32 r, i;
1209 int reclaim;
1210 unsigned long flags;
1211 u8 fill_rx = 0;
1212 u32 count = 8;
1213 int total_empty = 0;
1214
1215 /* uCode's read index (stored in shared DRAM) indicates the last Rx
1216 * buffer that the driver may process (last buffer filled by ucode). */
1217 r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
1218 i = rxq->read;
1219
1220 /* calculate total frames need to be restock after handling RX */
1221 total_empty = r - rxq->write_actual;
1222 if (total_empty < 0)
1223 total_empty += RX_QUEUE_SIZE;
1224
1225 if (total_empty > (RX_QUEUE_SIZE / 2))
1226 fill_rx = 1;
1227 /* Rx interrupt, but nothing sent from uCode */
1228 if (i == r)
1229 IWL_DEBUG_RX(priv, "r = %d, i = %d\n", r, i);
1230
1231 while (i != r) {
1232 int len;
1233
1234 rxb = rxq->queue[i];
1235
1236 /* If an RXB doesn't have a Rx queue slot associated with it,
1237 * then a bug has been introduced in the queue refilling
1238 * routines -- catch it here */
1239 BUG_ON(rxb == NULL);
1240
1241 rxq->queue[i] = NULL;
1242
1243 pci_unmap_page(priv->pci_dev, rxb->page_dma,
1244 PAGE_SIZE << priv->hw_params.rx_page_order,
1245 PCI_DMA_FROMDEVICE);
1246 pkt = rxb_addr(rxb);
1247
1248 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
1249 len += sizeof(u32); /* account for status word */
1250 trace_iwlwifi_legacy_dev_rx(priv, pkt, len);
1251
1252 /* Reclaim a command buffer only if this packet is a response
1253 * to a (driver-originated) command.
1254 * If the packet (e.g. Rx frame) originated from uCode,
1255 * there is no command buffer to reclaim.
1256 * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
1257 * but apparently a few don't get set; catch them here. */
1258 reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
1259 (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
1260 (pkt->hdr.cmd != REPLY_TX);
1261
1262 /* Based on type of command response or notification,
1263 * handle those that need handling via function in
1264 * rx_handlers table. See iwl3945_setup_rx_handlers() */
1265 if (priv->rx_handlers[pkt->hdr.cmd]) {
1266 IWL_DEBUG_RX(priv, "r = %d, i = %d, %s, 0x%02x\n", r, i,
1267 iwl_legacy_get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
1268 priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
1269 priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
1270 } else {
1271 /* No handling needed */
1272 IWL_DEBUG_RX(priv,
1273 "r %d i %d No handler needed for %s, 0x%02x\n",
1274 r, i, iwl_legacy_get_cmd_string(pkt->hdr.cmd),
1275 pkt->hdr.cmd);
1276 }
1277
1278 /*
1279 * XXX: After here, we should always check rxb->page
1280 * against NULL before touching it or its virtual
1281 * memory (pkt). Because some rx_handler might have
1282 * already taken or freed the pages.
1283 */
1284
1285 if (reclaim) {
1286 /* Invoke any callbacks, transfer the buffer to caller,
1287 * and fire off the (possibly) blocking iwl_legacy_send_cmd()
1288 * as we reclaim the driver command queue */
1289 if (rxb->page)
1290 iwl_legacy_tx_cmd_complete(priv, rxb);
1291 else
1292 IWL_WARN(priv, "Claim null rxb?\n");
1293 }
1294
1295 /* Reuse the page if possible. For notification packets and
1296 * SKBs that fail to Rx correctly, add them back into the
1297 * rx_free list for reuse later. */
1298 spin_lock_irqsave(&rxq->lock, flags);
1299 if (rxb->page != NULL) {
1300 rxb->page_dma = pci_map_page(priv->pci_dev, rxb->page,
1301 0, PAGE_SIZE << priv->hw_params.rx_page_order,
1302 PCI_DMA_FROMDEVICE);
1303 list_add_tail(&rxb->list, &rxq->rx_free);
1304 rxq->free_count++;
1305 } else
1306 list_add_tail(&rxb->list, &rxq->rx_used);
1307
1308 spin_unlock_irqrestore(&rxq->lock, flags);
1309
1310 i = (i + 1) & RX_QUEUE_MASK;
1311 /* If there are a lot of unused frames,
1312 * restock the Rx queue so ucode won't assert. */
1313 if (fill_rx) {
1314 count++;
1315 if (count >= 8) {
1316 rxq->read = i;
1317 iwl3945_rx_replenish_now(priv);
1318 count = 0;
1319 }
1320 }
1321 }
1322
1323 /* Backtrack one entry */
1324 rxq->read = i;
1325 if (fill_rx)
1326 iwl3945_rx_replenish_now(priv);
1327 else
1328 iwl3945_rx_queue_restock(priv);
1329 }
1330
1331 /* call this function to flush any scheduled tasklet */
1332 static inline void iwl3945_synchronize_irq(struct iwl_priv *priv)
1333 {
1334 /* wait to make sure we flush pending tasklet*/
1335 synchronize_irq(priv->pci_dev->irq);
1336 tasklet_kill(&priv->irq_tasklet);
1337 }
1338
1339 static const char *iwl3945_desc_lookup(int i)
1340 {
1341 switch (i) {
1342 case 1:
1343 return "FAIL";
1344 case 2:
1345 return "BAD_PARAM";
1346 case 3:
1347 return "BAD_CHECKSUM";
1348 case 4:
1349 return "NMI_INTERRUPT";
1350 case 5:
1351 return "SYSASSERT";
1352 case 6:
1353 return "FATAL_ERROR";
1354 }
1355
1356 return "UNKNOWN";
1357 }
1358
1359 #define ERROR_START_OFFSET (1 * sizeof(u32))
1360 #define ERROR_ELEM_SIZE (7 * sizeof(u32))
1361
1362 void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
1363 {
1364 u32 i;
1365 u32 desc, time, count, base, data1;
1366 u32 blink1, blink2, ilink1, ilink2;
1367
1368 base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
1369
1370 if (!iwl3945_hw_valid_rtc_data_addr(base)) {
1371 IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
1372 return;
1373 }
1374
1375
1376 count = iwl_legacy_read_targ_mem(priv, base);
1377
1378 if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
1379 IWL_ERR(priv, "Start IWL Error Log Dump:\n");
1380 IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
1381 priv->status, count);
1382 }
1383
1384 IWL_ERR(priv, "Desc Time asrtPC blink2 "
1385 "ilink1 nmiPC Line\n");
1386 for (i = ERROR_START_OFFSET;
1387 i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
1388 i += ERROR_ELEM_SIZE) {
1389 desc = iwl_legacy_read_targ_mem(priv, base + i);
1390 time =
1391 iwl_legacy_read_targ_mem(priv, base + i + 1 * sizeof(u32));
1392 blink1 =
1393 iwl_legacy_read_targ_mem(priv, base + i + 2 * sizeof(u32));
1394 blink2 =
1395 iwl_legacy_read_targ_mem(priv, base + i + 3 * sizeof(u32));
1396 ilink1 =
1397 iwl_legacy_read_targ_mem(priv, base + i + 4 * sizeof(u32));
1398 ilink2 =
1399 iwl_legacy_read_targ_mem(priv, base + i + 5 * sizeof(u32));
1400 data1 =
1401 iwl_legacy_read_targ_mem(priv, base + i + 6 * sizeof(u32));
1402
1403 IWL_ERR(priv,
1404 "%-13s (0x%X) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
1405 iwl3945_desc_lookup(desc), desc, time, blink1, blink2,
1406 ilink1, ilink2, data1);
1407 trace_iwlwifi_legacy_dev_ucode_error(priv, desc, time, data1, 0,
1408 0, blink1, blink2, ilink1, ilink2);
1409 }
1410 }
1411
1412 static void iwl3945_irq_tasklet(struct iwl_priv *priv)
1413 {
1414 u32 inta, handled = 0;
1415 u32 inta_fh;
1416 unsigned long flags;
1417 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1418 u32 inta_mask;
1419 #endif
1420
1421 spin_lock_irqsave(&priv->lock, flags);
1422
1423 /* Ack/clear/reset pending uCode interrupts.
1424 * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
1425 * and will clear only when CSR_FH_INT_STATUS gets cleared. */
1426 inta = iwl_read32(priv, CSR_INT);
1427 iwl_write32(priv, CSR_INT, inta);
1428
1429 /* Ack/clear/reset pending flow-handler (DMA) interrupts.
1430 * Any new interrupts that happen after this, either while we're
1431 * in this tasklet, or later, will show up in next ISR/tasklet. */
1432 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1433 iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
1434
1435 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1436 if (iwl_legacy_get_debug_level(priv) & IWL_DL_ISR) {
1437 /* just for debug */
1438 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1439 IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
1440 inta, inta_mask, inta_fh);
1441 }
1442 #endif
1443
1444 spin_unlock_irqrestore(&priv->lock, flags);
1445
1446 /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
1447 * atomic, make sure that inta covers all the interrupts that
1448 * we've discovered, even if FH interrupt came in just after
1449 * reading CSR_INT. */
1450 if (inta_fh & CSR39_FH_INT_RX_MASK)
1451 inta |= CSR_INT_BIT_FH_RX;
1452 if (inta_fh & CSR39_FH_INT_TX_MASK)
1453 inta |= CSR_INT_BIT_FH_TX;
1454
1455 /* Now service all interrupt bits discovered above. */
1456 if (inta & CSR_INT_BIT_HW_ERR) {
1457 IWL_ERR(priv, "Hardware error detected. Restarting.\n");
1458
1459 /* Tell the device to stop sending interrupts */
1460 iwl_legacy_disable_interrupts(priv);
1461
1462 priv->isr_stats.hw++;
1463 iwl_legacy_irq_handle_error(priv);
1464
1465 handled |= CSR_INT_BIT_HW_ERR;
1466
1467 return;
1468 }
1469
1470 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1471 if (iwl_legacy_get_debug_level(priv) & (IWL_DL_ISR)) {
1472 /* NIC fires this, but we don't use it, redundant with WAKEUP */
1473 if (inta & CSR_INT_BIT_SCD) {
1474 IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
1475 "the frame/frames.\n");
1476 priv->isr_stats.sch++;
1477 }
1478
1479 /* Alive notification via Rx interrupt will do the real work */
1480 if (inta & CSR_INT_BIT_ALIVE) {
1481 IWL_DEBUG_ISR(priv, "Alive interrupt\n");
1482 priv->isr_stats.alive++;
1483 }
1484 }
1485 #endif
1486 /* Safely ignore these bits for debug checks below */
1487 inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
1488
1489 /* Error detected by uCode */
1490 if (inta & CSR_INT_BIT_SW_ERR) {
1491 IWL_ERR(priv, "Microcode SW error detected. "
1492 "Restarting 0x%X.\n", inta);
1493 priv->isr_stats.sw++;
1494 iwl_legacy_irq_handle_error(priv);
1495 handled |= CSR_INT_BIT_SW_ERR;
1496 }
1497
1498 /* uCode wakes up after power-down sleep */
1499 if (inta & CSR_INT_BIT_WAKEUP) {
1500 IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
1501 iwl_legacy_rx_queue_update_write_ptr(priv, &priv->rxq);
1502 iwl_legacy_txq_update_write_ptr(priv, &priv->txq[0]);
1503 iwl_legacy_txq_update_write_ptr(priv, &priv->txq[1]);
1504 iwl_legacy_txq_update_write_ptr(priv, &priv->txq[2]);
1505 iwl_legacy_txq_update_write_ptr(priv, &priv->txq[3]);
1506 iwl_legacy_txq_update_write_ptr(priv, &priv->txq[4]);
1507 iwl_legacy_txq_update_write_ptr(priv, &priv->txq[5]);
1508
1509 priv->isr_stats.wakeup++;
1510 handled |= CSR_INT_BIT_WAKEUP;
1511 }
1512
1513 /* All uCode command responses, including Tx command responses,
1514 * Rx "responses" (frame-received notification), and other
1515 * notifications from uCode come through here*/
1516 if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
1517 iwl3945_rx_handle(priv);
1518 priv->isr_stats.rx++;
1519 handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
1520 }
1521
1522 if (inta & CSR_INT_BIT_FH_TX) {
1523 IWL_DEBUG_ISR(priv, "Tx interrupt\n");
1524 priv->isr_stats.tx++;
1525
1526 iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
1527 iwl_legacy_write_direct32(priv, FH39_TCSR_CREDIT
1528 (FH39_SRVC_CHNL), 0x0);
1529 handled |= CSR_INT_BIT_FH_TX;
1530 }
1531
1532 if (inta & ~handled) {
1533 IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
1534 priv->isr_stats.unhandled++;
1535 }
1536
1537 if (inta & ~priv->inta_mask) {
1538 IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
1539 inta & ~priv->inta_mask);
1540 IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
1541 }
1542
1543 /* Re-enable all interrupts */
1544 /* only Re-enable if disabled by irq */
1545 if (test_bit(STATUS_INT_ENABLED, &priv->status))
1546 iwl_legacy_enable_interrupts(priv);
1547
1548 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
1549 if (iwl_legacy_get_debug_level(priv) & (IWL_DL_ISR)) {
1550 inta = iwl_read32(priv, CSR_INT);
1551 inta_mask = iwl_read32(priv, CSR_INT_MASK);
1552 inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
1553 IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
1554 "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
1555 }
1556 #endif
1557 }
1558
1559 static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
1560 enum ieee80211_band band,
1561 u8 is_active, u8 n_probes,
1562 struct iwl3945_scan_channel *scan_ch,
1563 struct ieee80211_vif *vif)
1564 {
1565 struct ieee80211_channel *chan;
1566 const struct ieee80211_supported_band *sband;
1567 const struct iwl_channel_info *ch_info;
1568 u16 passive_dwell = 0;
1569 u16 active_dwell = 0;
1570 int added, i;
1571
1572 sband = iwl_get_hw_mode(priv, band);
1573 if (!sband)
1574 return 0;
1575
1576 active_dwell = iwl_legacy_get_active_dwell_time(priv, band, n_probes);
1577 passive_dwell = iwl_legacy_get_passive_dwell_time(priv, band, vif);
1578
1579 if (passive_dwell <= active_dwell)
1580 passive_dwell = active_dwell + 1;
1581
1582 for (i = 0, added = 0; i < priv->scan_request->n_channels; i++) {
1583 chan = priv->scan_request->channels[i];
1584
1585 if (chan->band != band)
1586 continue;
1587
1588 scan_ch->channel = chan->hw_value;
1589
1590 ch_info = iwl_legacy_get_channel_info(priv, band,
1591 scan_ch->channel);
1592 if (!iwl_legacy_is_channel_valid(ch_info)) {
1593 IWL_DEBUG_SCAN(priv,
1594 "Channel %d is INVALID for this band.\n",
1595 scan_ch->channel);
1596 continue;
1597 }
1598
1599 scan_ch->active_dwell = cpu_to_le16(active_dwell);
1600 scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
1601 /* If passive , set up for auto-switch
1602 * and use long active_dwell time.
1603 */
1604 if (!is_active || iwl_legacy_is_channel_passive(ch_info) ||
1605 (chan->flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
1606 scan_ch->type = 0; /* passive */
1607 if (IWL_UCODE_API(priv->ucode_ver) == 1)
1608 scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
1609 } else {
1610 scan_ch->type = 1; /* active */
1611 }
1612
1613 /* Set direct probe bits. These may be used both for active
1614 * scan channels (probes gets sent right away),
1615 * or for passive channels (probes get se sent only after
1616 * hearing clear Rx packet).*/
1617 if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
1618 if (n_probes)
1619 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1620 } else {
1621 /* uCode v1 does not allow setting direct probe bits on
1622 * passive channel. */
1623 if ((scan_ch->type & 1) && n_probes)
1624 scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
1625 }
1626
1627 /* Set txpower levels to defaults */
1628 scan_ch->tpc.dsp_atten = 110;
1629 /* scan_pwr_info->tpc.dsp_atten; */
1630
1631 /*scan_pwr_info->tpc.tx_gain; */
1632 if (band == IEEE80211_BAND_5GHZ)
1633 scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
1634 else {
1635 scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
1636 /* NOTE: if we were doing 6Mb OFDM for scans we'd use
1637 * power level:
1638 * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
1639 */
1640 }
1641
1642 IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
1643 scan_ch->channel,
1644 (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
1645 (scan_ch->type & 1) ?
1646 active_dwell : passive_dwell);
1647
1648 scan_ch++;
1649 added++;
1650 }
1651
1652 IWL_DEBUG_SCAN(priv, "total channels to scan %d\n", added);
1653 return added;
1654 }
1655
1656 static void iwl3945_init_hw_rates(struct iwl_priv *priv,
1657 struct ieee80211_rate *rates)
1658 {
1659 int i;
1660
1661 for (i = 0; i < IWL_RATE_COUNT_LEGACY; i++) {
1662 rates[i].bitrate = iwl3945_rates[i].ieee * 5;
1663 rates[i].hw_value = i; /* Rate scaling will work on indexes */
1664 rates[i].hw_value_short = i;
1665 rates[i].flags = 0;
1666 if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
1667 /*
1668 * If CCK != 1M then set short preamble rate flag.
1669 */
1670 rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
1671 0 : IEEE80211_RATE_SHORT_PREAMBLE;
1672 }
1673 }
1674 }
1675
1676 /******************************************************************************
1677 *
1678 * uCode download functions
1679 *
1680 ******************************************************************************/
1681
1682 static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
1683 {
1684 iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_code);
1685 iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_data);
1686 iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
1687 iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_init);
1688 iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
1689 iwl_legacy_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
1690 }
1691
1692 /**
1693 * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
1694 * looking at all data.
1695 */
1696 static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
1697 {
1698 u32 val;
1699 u32 save_len = len;
1700 int rc = 0;
1701 u32 errcnt;
1702
1703 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1704
1705 iwl_legacy_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1706 IWL39_RTC_INST_LOWER_BOUND);
1707
1708 errcnt = 0;
1709 for (; len > 0; len -= sizeof(u32), image++) {
1710 /* read data comes through single port, auto-incr addr */
1711 /* NOTE: Use the debugless read so we don't flood kernel log
1712 * if IWL_DL_IO is set */
1713 val = _iwl_legacy_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1714 if (val != le32_to_cpu(*image)) {
1715 IWL_ERR(priv, "uCode INST section is invalid at "
1716 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1717 save_len - len, val, le32_to_cpu(*image));
1718 rc = -EIO;
1719 errcnt++;
1720 if (errcnt >= 20)
1721 break;
1722 }
1723 }
1724
1725
1726 if (!errcnt)
1727 IWL_DEBUG_INFO(priv,
1728 "ucode image in INSTRUCTION memory is good\n");
1729
1730 return rc;
1731 }
1732
1733
1734 /**
1735 * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
1736 * using sample data 100 bytes apart. If these sample points are good,
1737 * it's a pretty good bet that everything between them is good, too.
1738 */
1739 static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
1740 {
1741 u32 val;
1742 int rc = 0;
1743 u32 errcnt = 0;
1744 u32 i;
1745
1746 IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
1747
1748 for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
1749 /* read data comes through single port, auto-incr addr */
1750 /* NOTE: Use the debugless read so we don't flood kernel log
1751 * if IWL_DL_IO is set */
1752 iwl_legacy_write_direct32(priv, HBUS_TARG_MEM_RADDR,
1753 i + IWL39_RTC_INST_LOWER_BOUND);
1754 val = _iwl_legacy_read_direct32(priv, HBUS_TARG_MEM_RDAT);
1755 if (val != le32_to_cpu(*image)) {
1756 #if 0 /* Enable this if you want to see details */
1757 IWL_ERR(priv, "uCode INST section is invalid at "
1758 "offset 0x%x, is 0x%x, s/b 0x%x\n",
1759 i, val, *image);
1760 #endif
1761 rc = -EIO;
1762 errcnt++;
1763 if (errcnt >= 3)
1764 break;
1765 }
1766 }
1767
1768 return rc;
1769 }
1770
1771
1772 /**
1773 * iwl3945_verify_ucode - determine which instruction image is in SRAM,
1774 * and verify its contents
1775 */
1776 static int iwl3945_verify_ucode(struct iwl_priv *priv)
1777 {
1778 __le32 *image;
1779 u32 len;
1780 int rc = 0;
1781
1782 /* Try bootstrap */
1783 image = (__le32 *)priv->ucode_boot.v_addr;
1784 len = priv->ucode_boot.len;
1785 rc = iwl3945_verify_inst_sparse(priv, image, len);
1786 if (rc == 0) {
1787 IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
1788 return 0;
1789 }
1790
1791 /* Try initialize */
1792 image = (__le32 *)priv->ucode_init.v_addr;
1793 len = priv->ucode_init.len;
1794 rc = iwl3945_verify_inst_sparse(priv, image, len);
1795 if (rc == 0) {
1796 IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
1797 return 0;
1798 }
1799
1800 /* Try runtime/protocol */
1801 image = (__le32 *)priv->ucode_code.v_addr;
1802 len = priv->ucode_code.len;
1803 rc = iwl3945_verify_inst_sparse(priv, image, len);
1804 if (rc == 0) {
1805 IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
1806 return 0;
1807 }
1808
1809 IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
1810
1811 /* Since nothing seems to match, show first several data entries in
1812 * instruction SRAM, so maybe visual inspection will give a clue.
1813 * Selection of bootstrap image (vs. other images) is arbitrary. */
1814 image = (__le32 *)priv->ucode_boot.v_addr;
1815 len = priv->ucode_boot.len;
1816 rc = iwl3945_verify_inst_full(priv, image, len);
1817
1818 return rc;
1819 }
1820
1821 static void iwl3945_nic_start(struct iwl_priv *priv)
1822 {
1823 /* Remove all resets to allow NIC to operate */
1824 iwl_write32(priv, CSR_RESET, 0);
1825 }
1826
1827 #define IWL3945_UCODE_GET(item) \
1828 static u32 iwl3945_ucode_get_##item(const struct iwl_ucode_header *ucode)\
1829 { \
1830 return le32_to_cpu(ucode->v1.item); \
1831 }
1832
1833 static u32 iwl3945_ucode_get_header_size(u32 api_ver)
1834 {
1835 return 24;
1836 }
1837
1838 static u8 *iwl3945_ucode_get_data(const struct iwl_ucode_header *ucode)
1839 {
1840 return (u8 *) ucode->v1.data;
1841 }
1842
1843 IWL3945_UCODE_GET(inst_size);
1844 IWL3945_UCODE_GET(data_size);
1845 IWL3945_UCODE_GET(init_size);
1846 IWL3945_UCODE_GET(init_data_size);
1847 IWL3945_UCODE_GET(boot_size);
1848
1849 /**
1850 * iwl3945_read_ucode - Read uCode images from disk file.
1851 *
1852 * Copy into buffers for card to fetch via bus-mastering
1853 */
1854 static int iwl3945_read_ucode(struct iwl_priv *priv)
1855 {
1856 const struct iwl_ucode_header *ucode;
1857 int ret = -EINVAL, index;
1858 const struct firmware *ucode_raw;
1859 /* firmware file name contains uCode/driver compatibility version */
1860 const char *name_pre = priv->cfg->fw_name_pre;
1861 const unsigned int api_max = priv->cfg->ucode_api_max;
1862 const unsigned int api_min = priv->cfg->ucode_api_min;
1863 char buf[25];
1864 u8 *src;
1865 size_t len;
1866 u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
1867
1868 /* Ask kernel firmware_class module to get the boot firmware off disk.
1869 * request_firmware() is synchronous, file is in memory on return. */
1870 for (index = api_max; index >= api_min; index--) {
1871 sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
1872 ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
1873 if (ret < 0) {
1874 IWL_ERR(priv, "%s firmware file req failed: %d\n",
1875 buf, ret);
1876 if (ret == -ENOENT)
1877 continue;
1878 else
1879 goto error;
1880 } else {
1881 if (index < api_max)
1882 IWL_ERR(priv, "Loaded firmware %s, "
1883 "which is deprecated. "
1884 " Please use API v%u instead.\n",
1885 buf, api_max);
1886 IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
1887 "(%zd bytes) from disk\n",
1888 buf, ucode_raw->size);
1889 break;
1890 }
1891 }
1892
1893 if (ret < 0)
1894 goto error;
1895
1896 /* Make sure that we got at least our header! */
1897 if (ucode_raw->size < iwl3945_ucode_get_header_size(1)) {
1898 IWL_ERR(priv, "File size way too small!\n");
1899 ret = -EINVAL;
1900 goto err_release;
1901 }
1902
1903 /* Data from ucode file: header followed by uCode images */
1904 ucode = (struct iwl_ucode_header *)ucode_raw->data;
1905
1906 priv->ucode_ver = le32_to_cpu(ucode->ver);
1907 api_ver = IWL_UCODE_API(priv->ucode_ver);
1908 inst_size = iwl3945_ucode_get_inst_size(ucode);
1909 data_size = iwl3945_ucode_get_data_size(ucode);
1910 init_size = iwl3945_ucode_get_init_size(ucode);
1911 init_data_size = iwl3945_ucode_get_init_data_size(ucode);
1912 boot_size = iwl3945_ucode_get_boot_size(ucode);
1913 src = iwl3945_ucode_get_data(ucode);
1914
1915 /* api_ver should match the api version forming part of the
1916 * firmware filename ... but we don't check for that and only rely
1917 * on the API version read from firmware header from here on forward */
1918
1919 if (api_ver < api_min || api_ver > api_max) {
1920 IWL_ERR(priv, "Driver unable to support your firmware API. "
1921 "Driver supports v%u, firmware is v%u.\n",
1922 api_max, api_ver);
1923 priv->ucode_ver = 0;
1924 ret = -EINVAL;
1925 goto err_release;
1926 }
1927 if (api_ver != api_max)
1928 IWL_ERR(priv, "Firmware has old API version. Expected %u, "
1929 "got %u. New firmware can be obtained "
1930 "from http://www.intellinuxwireless.org.\n",
1931 api_max, api_ver);
1932
1933 IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
1934 IWL_UCODE_MAJOR(priv->ucode_ver),
1935 IWL_UCODE_MINOR(priv->ucode_ver),
1936 IWL_UCODE_API(priv->ucode_ver),
1937 IWL_UCODE_SERIAL(priv->ucode_ver));
1938
1939 snprintf(priv->hw->wiphy->fw_version,
1940 sizeof(priv->hw->wiphy->fw_version),
1941 "%u.%u.%u.%u",
1942 IWL_UCODE_MAJOR(priv->ucode_ver),
1943 IWL_UCODE_MINOR(priv->ucode_ver),
1944 IWL_UCODE_API(priv->ucode_ver),
1945 IWL_UCODE_SERIAL(priv->ucode_ver));
1946
1947 IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
1948 priv->ucode_ver);
1949 IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
1950 inst_size);
1951 IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
1952 data_size);
1953 IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
1954 init_size);
1955 IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
1956 init_data_size);
1957 IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
1958 boot_size);
1959
1960
1961 /* Verify size of file vs. image size info in file's header */
1962 if (ucode_raw->size != iwl3945_ucode_get_header_size(api_ver) +
1963 inst_size + data_size + init_size +
1964 init_data_size + boot_size) {
1965
1966 IWL_DEBUG_INFO(priv,
1967 "uCode file size %zd does not match expected size\n",
1968 ucode_raw->size);
1969 ret = -EINVAL;
1970 goto err_release;
1971 }
1972
1973 /* Verify that uCode images will fit in card's SRAM */
1974 if (inst_size > IWL39_MAX_INST_SIZE) {
1975 IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
1976 inst_size);
1977 ret = -EINVAL;
1978 goto err_release;
1979 }
1980
1981 if (data_size > IWL39_MAX_DATA_SIZE) {
1982 IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
1983 data_size);
1984 ret = -EINVAL;
1985 goto err_release;
1986 }
1987 if (init_size > IWL39_MAX_INST_SIZE) {
1988 IWL_DEBUG_INFO(priv,
1989 "uCode init instr len %d too large to fit in\n",
1990 init_size);
1991 ret = -EINVAL;
1992 goto err_release;
1993 }
1994 if (init_data_size > IWL39_MAX_DATA_SIZE) {
1995 IWL_DEBUG_INFO(priv,
1996 "uCode init data len %d too large to fit in\n",
1997 init_data_size);
1998 ret = -EINVAL;
1999 goto err_release;
2000 }
2001 if (boot_size > IWL39_MAX_BSM_SIZE) {
2002 IWL_DEBUG_INFO(priv,
2003 "uCode boot instr len %d too large to fit in\n",
2004 boot_size);
2005 ret = -EINVAL;
2006 goto err_release;
2007 }
2008
2009 /* Allocate ucode buffers for card's bus-master loading ... */
2010
2011 /* Runtime instructions and 2 copies of data:
2012 * 1) unmodified from disk
2013 * 2) backup cache for save/restore during power-downs */
2014 priv->ucode_code.len = inst_size;
2015 iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
2016
2017 priv->ucode_data.len = data_size;
2018 iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
2019
2020 priv->ucode_data_backup.len = data_size;
2021 iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
2022
2023 if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
2024 !priv->ucode_data_backup.v_addr)
2025 goto err_pci_alloc;
2026
2027 /* Initialization instructions and data */
2028 if (init_size && init_data_size) {
2029 priv->ucode_init.len = init_size;
2030 iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
2031
2032 priv->ucode_init_data.len = init_data_size;
2033 iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
2034
2035 if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
2036 goto err_pci_alloc;
2037 }
2038
2039 /* Bootstrap (instructions only, no data) */
2040 if (boot_size) {
2041 priv->ucode_boot.len = boot_size;
2042 iwl_legacy_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
2043
2044 if (!priv->ucode_boot.v_addr)
2045 goto err_pci_alloc;
2046 }
2047
2048 /* Copy images into buffers for card's bus-master reads ... */
2049
2050 /* Runtime instructions (first block of data in file) */
2051 len = inst_size;
2052 IWL_DEBUG_INFO(priv,
2053 "Copying (but not loading) uCode instr len %zd\n", len);
2054 memcpy(priv->ucode_code.v_addr, src, len);
2055 src += len;
2056
2057 IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
2058 priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
2059
2060 /* Runtime data (2nd block)
2061 * NOTE: Copy into backup buffer will be done in iwl3945_up() */
2062 len = data_size;
2063 IWL_DEBUG_INFO(priv,
2064 "Copying (but not loading) uCode data len %zd\n", len);
2065 memcpy(priv->ucode_data.v_addr, src, len);
2066 memcpy(priv->ucode_data_backup.v_addr, src, len);
2067 src += len;
2068
2069 /* Initialization instructions (3rd block) */
2070 if (init_size) {
2071 len = init_size;
2072 IWL_DEBUG_INFO(priv,
2073 "Copying (but not loading) init instr len %zd\n", len);
2074 memcpy(priv->ucode_init.v_addr, src, len);
2075 src += len;
2076 }
2077
2078 /* Initialization data (4th block) */
2079 if (init_data_size) {
2080 len = init_data_size;
2081 IWL_DEBUG_INFO(priv,
2082 "Copying (but not loading) init data len %zd\n", len);
2083 memcpy(priv->ucode_init_data.v_addr, src, len);
2084 src += len;
2085 }
2086
2087 /* Bootstrap instructions (5th block) */
2088 len = boot_size;
2089 IWL_DEBUG_INFO(priv,
2090 "Copying (but not loading) boot instr len %zd\n", len);
2091 memcpy(priv->ucode_boot.v_addr, src, len);
2092
2093 /* We have our copies now, allow OS release its copies */
2094 release_firmware(ucode_raw);
2095 return 0;
2096
2097 err_pci_alloc:
2098 IWL_ERR(priv, "failed to allocate pci memory\n");
2099 ret = -ENOMEM;
2100 iwl3945_dealloc_ucode_pci(priv);
2101
2102 err_release:
2103 release_firmware(ucode_raw);
2104
2105 error:
2106 return ret;
2107 }
2108
2109
2110 /**
2111 * iwl3945_set_ucode_ptrs - Set uCode address location
2112 *
2113 * Tell initialization uCode where to find runtime uCode.
2114 *
2115 * BSM registers initially contain pointers to initialization uCode.
2116 * We need to replace them to load runtime uCode inst and data,
2117 * and to save runtime data when powering down.
2118 */
2119 static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
2120 {
2121 dma_addr_t pinst;
2122 dma_addr_t pdata;
2123
2124 /* bits 31:0 for 3945 */
2125 pinst = priv->ucode_code.p_addr;
2126 pdata = priv->ucode_data_backup.p_addr;
2127
2128 /* Tell bootstrap uCode where to find image to load */
2129 iwl_legacy_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
2130 iwl_legacy_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
2131 iwl_legacy_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
2132 priv->ucode_data.len);
2133
2134 /* Inst byte count must be last to set up, bit 31 signals uCode
2135 * that all new ptr/size info is in place */
2136 iwl_legacy_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
2137 priv->ucode_code.len | BSM_DRAM_INST_LOAD);
2138
2139 IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
2140
2141 return 0;
2142 }
2143
2144 /**
2145 * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
2146 *
2147 * Called after REPLY_ALIVE notification received from "initialize" uCode.
2148 *
2149 * Tell "initialize" uCode to go ahead and load the runtime uCode.
2150 */
2151 static void iwl3945_init_alive_start(struct iwl_priv *priv)
2152 {
2153 /* Check alive response for "valid" sign from uCode */
2154 if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
2155 /* We had an error bringing up the hardware, so take it
2156 * all the way back down so we can try again */
2157 IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
2158 goto restart;
2159 }
2160
2161 /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
2162 * This is a paranoid check, because we would not have gotten the
2163 * "initialize" alive if code weren't properly loaded. */
2164 if (iwl3945_verify_ucode(priv)) {
2165 /* Runtime instruction load was bad;
2166 * take it all the way back down so we can try again */
2167 IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
2168 goto restart;
2169 }
2170
2171 /* Send pointers to protocol/runtime uCode image ... init code will
2172 * load and launch runtime uCode, which will send us another "Alive"
2173 * notification. */
2174 IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
2175 if (iwl3945_set_ucode_ptrs(priv)) {
2176 /* Runtime instruction load won't happen;
2177 * take it all the way back down so we can try again */
2178 IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
2179 goto restart;
2180 }
2181 return;
2182
2183 restart:
2184 queue_work(priv->workqueue, &priv->restart);
2185 }
2186
2187 /**
2188 * iwl3945_alive_start - called after REPLY_ALIVE notification received
2189 * from protocol/runtime uCode (initialization uCode's
2190 * Alive gets handled by iwl3945_init_alive_start()).
2191 */
2192 static void iwl3945_alive_start(struct iwl_priv *priv)
2193 {
2194 int thermal_spin = 0;
2195 u32 rfkill;
2196 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2197
2198 IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
2199
2200 if (priv->card_alive.is_valid != UCODE_VALID_OK) {
2201 /* We had an error bringing up the hardware, so take it
2202 * all the way back down so we can try again */
2203 IWL_DEBUG_INFO(priv, "Alive failed.\n");
2204 goto restart;
2205 }
2206
2207 /* Initialize uCode has loaded Runtime uCode ... verify inst image.
2208 * This is a paranoid check, because we would not have gotten the
2209 * "runtime" alive if code weren't properly loaded. */
2210 if (iwl3945_verify_ucode(priv)) {
2211 /* Runtime instruction load was bad;
2212 * take it all the way back down so we can try again */
2213 IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
2214 goto restart;
2215 }
2216
2217 rfkill = iwl_legacy_read_prph(priv, APMG_RFKILL_REG);
2218 IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
2219
2220 if (rfkill & 0x1) {
2221 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2222 /* if RFKILL is not on, then wait for thermal
2223 * sensor in adapter to kick in */
2224 while (iwl3945_hw_get_temperature(priv) == 0) {
2225 thermal_spin++;
2226 udelay(10);
2227 }
2228
2229 if (thermal_spin)
2230 IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
2231 thermal_spin * 10);
2232 } else
2233 set_bit(STATUS_RF_KILL_HW, &priv->status);
2234
2235 /* After the ALIVE response, we can send commands to 3945 uCode */
2236 set_bit(STATUS_ALIVE, &priv->status);
2237
2238 /* Enable watchdog to monitor the driver tx queues */
2239 iwl_legacy_setup_watchdog(priv);
2240
2241 if (iwl_legacy_is_rfkill(priv))
2242 return;
2243
2244 ieee80211_wake_queues(priv->hw);
2245
2246 priv->active_rate = IWL_RATES_MASK_3945;
2247
2248 iwl_legacy_power_update_mode(priv, true);
2249
2250 if (iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS)) {
2251 struct iwl3945_rxon_cmd *active_rxon =
2252 (struct iwl3945_rxon_cmd *)(&ctx->active);
2253
2254 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2255 active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2256 } else {
2257 /* Initialize our rx_config data */
2258 iwl_legacy_connection_init_rx_config(priv, ctx);
2259 }
2260
2261 /* Configure Bluetooth device coexistence support */
2262 iwl_legacy_send_bt_config(priv);
2263
2264 set_bit(STATUS_READY, &priv->status);
2265
2266 /* Configure the adapter for unassociated operation */
2267 iwl3945_commit_rxon(priv, ctx);
2268
2269 iwl3945_reg_txpower_periodic(priv);
2270
2271 IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
2272 wake_up(&priv->wait_command_queue);
2273
2274 return;
2275
2276 restart:
2277 queue_work(priv->workqueue, &priv->restart);
2278 }
2279
2280 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
2281
2282 static void __iwl3945_down(struct iwl_priv *priv)
2283 {
2284 unsigned long flags;
2285 int exit_pending;
2286
2287 IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
2288
2289 iwl_legacy_scan_cancel_timeout(priv, 200);
2290
2291 exit_pending = test_and_set_bit(STATUS_EXIT_PENDING, &priv->status);
2292
2293 /* Stop TX queues watchdog. We need to have STATUS_EXIT_PENDING bit set
2294 * to prevent rearm timer */
2295 del_timer_sync(&priv->watchdog);
2296
2297 /* Station information will now be cleared in device */
2298 iwl_legacy_clear_ucode_stations(priv, NULL);
2299 iwl_legacy_dealloc_bcast_stations(priv);
2300 iwl_legacy_clear_driver_stations(priv);
2301
2302 /* Unblock any waiting calls */
2303 wake_up_all(&priv->wait_command_queue);
2304
2305 /* Wipe out the EXIT_PENDING status bit if we are not actually
2306 * exiting the module */
2307 if (!exit_pending)
2308 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2309
2310 /* stop and reset the on-board processor */
2311 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
2312
2313 /* tell the device to stop sending interrupts */
2314 spin_lock_irqsave(&priv->lock, flags);
2315 iwl_legacy_disable_interrupts(priv);
2316 spin_unlock_irqrestore(&priv->lock, flags);
2317 iwl3945_synchronize_irq(priv);
2318
2319 if (priv->mac80211_registered)
2320 ieee80211_stop_queues(priv->hw);
2321
2322 /* If we have not previously called iwl3945_init() then
2323 * clear all bits but the RF Kill bits and return */
2324 if (!iwl_legacy_is_init(priv)) {
2325 priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2326 STATUS_RF_KILL_HW |
2327 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2328 STATUS_GEO_CONFIGURED |
2329 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2330 STATUS_EXIT_PENDING;
2331 goto exit;
2332 }
2333
2334 /* ...otherwise clear out all the status bits but the RF Kill
2335 * bit and continue taking the NIC down. */
2336 priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
2337 STATUS_RF_KILL_HW |
2338 test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
2339 STATUS_GEO_CONFIGURED |
2340 test_bit(STATUS_FW_ERROR, &priv->status) <<
2341 STATUS_FW_ERROR |
2342 test_bit(STATUS_EXIT_PENDING, &priv->status) <<
2343 STATUS_EXIT_PENDING;
2344
2345 iwl3945_hw_txq_ctx_stop(priv);
2346 iwl3945_hw_rxq_stop(priv);
2347
2348 /* Power-down device's busmaster DMA clocks */
2349 iwl_legacy_write_prph(priv, APMG_CLK_DIS_REG, APMG_CLK_VAL_DMA_CLK_RQT);
2350 udelay(5);
2351
2352 /* Stop the device, and put it in low power state */
2353 iwl_legacy_apm_stop(priv);
2354
2355 exit:
2356 memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
2357
2358 if (priv->beacon_skb)
2359 dev_kfree_skb(priv->beacon_skb);
2360 priv->beacon_skb = NULL;
2361
2362 /* clear out any free frames */
2363 iwl3945_clear_free_frames(priv);
2364 }
2365
2366 static void iwl3945_down(struct iwl_priv *priv)
2367 {
2368 mutex_lock(&priv->mutex);
2369 __iwl3945_down(priv);
2370 mutex_unlock(&priv->mutex);
2371
2372 iwl3945_cancel_deferred_work(priv);
2373 }
2374
2375 #define MAX_HW_RESTARTS 5
2376
2377 static int iwl3945_alloc_bcast_station(struct iwl_priv *priv)
2378 {
2379 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2380 unsigned long flags;
2381 u8 sta_id;
2382
2383 spin_lock_irqsave(&priv->sta_lock, flags);
2384 sta_id = iwl_legacy_prep_station(priv, ctx,
2385 iwlegacy_bcast_addr, false, NULL);
2386 if (sta_id == IWL_INVALID_STATION) {
2387 IWL_ERR(priv, "Unable to prepare broadcast station\n");
2388 spin_unlock_irqrestore(&priv->sta_lock, flags);
2389
2390 return -EINVAL;
2391 }
2392
2393 priv->stations[sta_id].used |= IWL_STA_DRIVER_ACTIVE;
2394 priv->stations[sta_id].used |= IWL_STA_BCAST;
2395 spin_unlock_irqrestore(&priv->sta_lock, flags);
2396
2397 return 0;
2398 }
2399
2400 static int __iwl3945_up(struct iwl_priv *priv)
2401 {
2402 int rc, i;
2403
2404 rc = iwl3945_alloc_bcast_station(priv);
2405 if (rc)
2406 return rc;
2407
2408 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2409 IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
2410 return -EIO;
2411 }
2412
2413 if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
2414 IWL_ERR(priv, "ucode not available for device bring up\n");
2415 return -EIO;
2416 }
2417
2418 /* If platform's RF_KILL switch is NOT set to KILL */
2419 if (iwl_read32(priv, CSR_GP_CNTRL) &
2420 CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
2421 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2422 else {
2423 set_bit(STATUS_RF_KILL_HW, &priv->status);
2424 IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
2425 return -ENODEV;
2426 }
2427
2428 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2429
2430 rc = iwl3945_hw_nic_init(priv);
2431 if (rc) {
2432 IWL_ERR(priv, "Unable to int nic\n");
2433 return rc;
2434 }
2435
2436 /* make sure rfkill handshake bits are cleared */
2437 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2438 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
2439 CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
2440
2441 /* clear (again), then enable host interrupts */
2442 iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
2443 iwl_legacy_enable_interrupts(priv);
2444
2445 /* really make sure rfkill handshake bits are cleared */
2446 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2447 iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
2448
2449 /* Copy original ucode data image from disk into backup cache.
2450 * This will be used to initialize the on-board processor's
2451 * data SRAM for a clean start when the runtime program first loads. */
2452 memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
2453 priv->ucode_data.len);
2454
2455 /* We return success when we resume from suspend and rf_kill is on. */
2456 if (test_bit(STATUS_RF_KILL_HW, &priv->status))
2457 return 0;
2458
2459 for (i = 0; i < MAX_HW_RESTARTS; i++) {
2460
2461 /* load bootstrap state machine,
2462 * load bootstrap program into processor's memory,
2463 * prepare to load the "initialize" uCode */
2464 rc = priv->cfg->ops->lib->load_ucode(priv);
2465
2466 if (rc) {
2467 IWL_ERR(priv,
2468 "Unable to set up bootstrap uCode: %d\n", rc);
2469 continue;
2470 }
2471
2472 /* start card; "initialize" will load runtime ucode */
2473 iwl3945_nic_start(priv);
2474
2475 IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
2476
2477 return 0;
2478 }
2479
2480 set_bit(STATUS_EXIT_PENDING, &priv->status);
2481 __iwl3945_down(priv);
2482 clear_bit(STATUS_EXIT_PENDING, &priv->status);
2483
2484 /* tried to restart and config the device for as long as our
2485 * patience could withstand */
2486 IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
2487 return -EIO;
2488 }
2489
2490
2491 /*****************************************************************************
2492 *
2493 * Workqueue callbacks
2494 *
2495 *****************************************************************************/
2496
2497 static void iwl3945_bg_init_alive_start(struct work_struct *data)
2498 {
2499 struct iwl_priv *priv =
2500 container_of(data, struct iwl_priv, init_alive_start.work);
2501
2502 mutex_lock(&priv->mutex);
2503 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2504 goto out;
2505
2506 iwl3945_init_alive_start(priv);
2507 out:
2508 mutex_unlock(&priv->mutex);
2509 }
2510
2511 static void iwl3945_bg_alive_start(struct work_struct *data)
2512 {
2513 struct iwl_priv *priv =
2514 container_of(data, struct iwl_priv, alive_start.work);
2515
2516 mutex_lock(&priv->mutex);
2517 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2518 goto out;
2519
2520 iwl3945_alive_start(priv);
2521 out:
2522 mutex_unlock(&priv->mutex);
2523 }
2524
2525 /*
2526 * 3945 cannot interrupt driver when hardware rf kill switch toggles;
2527 * driver must poll CSR_GP_CNTRL_REG register for change. This register
2528 * *is* readable even when device has been SW_RESET into low power mode
2529 * (e.g. during RF KILL).
2530 */
2531 static void iwl3945_rfkill_poll(struct work_struct *data)
2532 {
2533 struct iwl_priv *priv =
2534 container_of(data, struct iwl_priv, _3945.rfkill_poll.work);
2535 bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &priv->status);
2536 bool new_rfkill = !(iwl_read32(priv, CSR_GP_CNTRL)
2537 & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
2538
2539 if (new_rfkill != old_rfkill) {
2540 if (new_rfkill)
2541 set_bit(STATUS_RF_KILL_HW, &priv->status);
2542 else
2543 clear_bit(STATUS_RF_KILL_HW, &priv->status);
2544
2545 wiphy_rfkill_set_hw_state(priv->hw->wiphy, new_rfkill);
2546
2547 IWL_DEBUG_RF_KILL(priv, "RF_KILL bit toggled to %s.\n",
2548 new_rfkill ? "disable radio" : "enable radio");
2549 }
2550
2551 /* Keep this running, even if radio now enabled. This will be
2552 * cancelled in mac_start() if system decides to start again */
2553 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
2554 round_jiffies_relative(2 * HZ));
2555
2556 }
2557
2558 int iwl3945_request_scan(struct iwl_priv *priv, struct ieee80211_vif *vif)
2559 {
2560 struct iwl_host_cmd cmd = {
2561 .id = REPLY_SCAN_CMD,
2562 .len = sizeof(struct iwl3945_scan_cmd),
2563 .flags = CMD_SIZE_HUGE,
2564 };
2565 struct iwl3945_scan_cmd *scan;
2566 u8 n_probes = 0;
2567 enum ieee80211_band band;
2568 bool is_active = false;
2569 int ret;
2570 u16 len;
2571
2572 lockdep_assert_held(&priv->mutex);
2573
2574 if (!priv->scan_cmd) {
2575 priv->scan_cmd = kmalloc(sizeof(struct iwl3945_scan_cmd) +
2576 IWL_MAX_SCAN_SIZE, GFP_KERNEL);
2577 if (!priv->scan_cmd) {
2578 IWL_DEBUG_SCAN(priv, "Fail to allocate scan memory\n");
2579 return -ENOMEM;
2580 }
2581 }
2582 scan = priv->scan_cmd;
2583 memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
2584
2585 scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
2586 scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
2587
2588 if (iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS)) {
2589 u16 interval;
2590 u32 extra;
2591 u32 suspend_time = 100;
2592 u32 scan_suspend_time = 100;
2593
2594 IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
2595
2596 interval = vif->bss_conf.beacon_int;
2597
2598 scan->suspend_time = 0;
2599 scan->max_out_time = cpu_to_le32(200 * 1024);
2600 if (!interval)
2601 interval = suspend_time;
2602 /*
2603 * suspend time format:
2604 * 0-19: beacon interval in usec (time before exec.)
2605 * 20-23: 0
2606 * 24-31: number of beacons (suspend between channels)
2607 */
2608
2609 extra = (suspend_time / interval) << 24;
2610 scan_suspend_time = 0xFF0FFFFF &
2611 (extra | ((suspend_time % interval) * 1024));
2612
2613 scan->suspend_time = cpu_to_le32(scan_suspend_time);
2614 IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
2615 scan_suspend_time, interval);
2616 }
2617
2618 if (priv->scan_request->n_ssids) {
2619 int i, p = 0;
2620 IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
2621 for (i = 0; i < priv->scan_request->n_ssids; i++) {
2622 /* always does wildcard anyway */
2623 if (!priv->scan_request->ssids[i].ssid_len)
2624 continue;
2625 scan->direct_scan[p].id = WLAN_EID_SSID;
2626 scan->direct_scan[p].len =
2627 priv->scan_request->ssids[i].ssid_len;
2628 memcpy(scan->direct_scan[p].ssid,
2629 priv->scan_request->ssids[i].ssid,
2630 priv->scan_request->ssids[i].ssid_len);
2631 n_probes++;
2632 p++;
2633 }
2634 is_active = true;
2635 } else
2636 IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
2637
2638 /* We don't build a direct scan probe request; the uCode will do
2639 * that based on the direct_mask added to each channel entry */
2640 scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
2641 scan->tx_cmd.sta_id = priv->contexts[IWL_RXON_CTX_BSS].bcast_sta_id;
2642 scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
2643
2644 /* flags + rate selection */
2645
2646 switch (priv->scan_band) {
2647 case IEEE80211_BAND_2GHZ:
2648 scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
2649 scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
2650 band = IEEE80211_BAND_2GHZ;
2651 break;
2652 case IEEE80211_BAND_5GHZ:
2653 scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
2654 band = IEEE80211_BAND_5GHZ;
2655 break;
2656 default:
2657 IWL_WARN(priv, "Invalid scan band\n");
2658 return -EIO;
2659 }
2660
2661 /*
2662 * If active scaning is requested but a certain channel
2663 * is marked passive, we can do active scanning if we
2664 * detect transmissions.
2665 */
2666 scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH_DEFAULT :
2667 IWL_GOOD_CRC_TH_DISABLED;
2668
2669 len = iwl_legacy_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
2670 vif->addr, priv->scan_request->ie,
2671 priv->scan_request->ie_len,
2672 IWL_MAX_SCAN_SIZE - sizeof(*scan));
2673 scan->tx_cmd.len = cpu_to_le16(len);
2674
2675 /* select Rx antennas */
2676 scan->flags |= iwl3945_get_antenna_flags(priv);
2677
2678 scan->channel_count = iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
2679 (void *)&scan->data[len], vif);
2680 if (scan->channel_count == 0) {
2681 IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
2682 return -EIO;
2683 }
2684
2685 cmd.len += le16_to_cpu(scan->tx_cmd.len) +
2686 scan->channel_count * sizeof(struct iwl3945_scan_channel);
2687 cmd.data = scan;
2688 scan->len = cpu_to_le16(cmd.len);
2689
2690 set_bit(STATUS_SCAN_HW, &priv->status);
2691 ret = iwl_legacy_send_cmd_sync(priv, &cmd);
2692 if (ret)
2693 clear_bit(STATUS_SCAN_HW, &priv->status);
2694 return ret;
2695 }
2696
2697 void iwl3945_post_scan(struct iwl_priv *priv)
2698 {
2699 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2700
2701 /*
2702 * Since setting the RXON may have been deferred while
2703 * performing the scan, fire one off if needed
2704 */
2705 if (memcmp(&ctx->staging, &ctx->active, sizeof(ctx->staging)))
2706 iwl3945_commit_rxon(priv, ctx);
2707 }
2708
2709 static void iwl3945_bg_restart(struct work_struct *data)
2710 {
2711 struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
2712
2713 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2714 return;
2715
2716 if (test_and_clear_bit(STATUS_FW_ERROR, &priv->status)) {
2717 struct iwl_rxon_context *ctx;
2718 mutex_lock(&priv->mutex);
2719 for_each_context(priv, ctx)
2720 ctx->vif = NULL;
2721 priv->is_open = 0;
2722 mutex_unlock(&priv->mutex);
2723 iwl3945_down(priv);
2724 ieee80211_restart_hw(priv->hw);
2725 } else {
2726 iwl3945_down(priv);
2727
2728 mutex_lock(&priv->mutex);
2729 if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
2730 mutex_unlock(&priv->mutex);
2731 return;
2732 }
2733
2734 __iwl3945_up(priv);
2735 mutex_unlock(&priv->mutex);
2736 }
2737 }
2738
2739 static void iwl3945_bg_rx_replenish(struct work_struct *data)
2740 {
2741 struct iwl_priv *priv =
2742 container_of(data, struct iwl_priv, rx_replenish);
2743
2744 mutex_lock(&priv->mutex);
2745 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2746 goto out;
2747
2748 iwl3945_rx_replenish(priv);
2749 out:
2750 mutex_unlock(&priv->mutex);
2751 }
2752
2753 void iwl3945_post_associate(struct iwl_priv *priv)
2754 {
2755 int rc = 0;
2756 struct ieee80211_conf *conf = NULL;
2757 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2758
2759 if (!ctx->vif || !priv->is_open)
2760 return;
2761
2762 IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
2763 ctx->vif->bss_conf.aid, ctx->active.bssid_addr);
2764
2765 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2766 return;
2767
2768 iwl_legacy_scan_cancel_timeout(priv, 200);
2769
2770 conf = iwl_legacy_ieee80211_get_hw_conf(priv->hw);
2771
2772 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2773 iwl3945_commit_rxon(priv, ctx);
2774
2775 rc = iwl_legacy_send_rxon_timing(priv, ctx);
2776 if (rc)
2777 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2778 "Attempting to continue.\n");
2779
2780 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2781
2782 ctx->staging.assoc_id = cpu_to_le16(ctx->vif->bss_conf.aid);
2783
2784 IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
2785 ctx->vif->bss_conf.aid, ctx->vif->bss_conf.beacon_int);
2786
2787 if (ctx->vif->bss_conf.use_short_preamble)
2788 ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
2789 else
2790 ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
2791
2792 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2793 if (ctx->vif->bss_conf.use_short_slot)
2794 ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
2795 else
2796 ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
2797 }
2798
2799 iwl3945_commit_rxon(priv, ctx);
2800
2801 switch (ctx->vif->type) {
2802 case NL80211_IFTYPE_STATION:
2803 iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
2804 break;
2805 case NL80211_IFTYPE_ADHOC:
2806 iwl3945_send_beacon_cmd(priv);
2807 break;
2808 default:
2809 IWL_ERR(priv, "%s Should not be called in %d mode\n",
2810 __func__, ctx->vif->type);
2811 break;
2812 }
2813 }
2814
2815 /*****************************************************************************
2816 *
2817 * mac80211 entry point functions
2818 *
2819 *****************************************************************************/
2820
2821 #define UCODE_READY_TIMEOUT (2 * HZ)
2822
2823 static int iwl3945_mac_start(struct ieee80211_hw *hw)
2824 {
2825 struct iwl_priv *priv = hw->priv;
2826 int ret;
2827
2828 IWL_DEBUG_MAC80211(priv, "enter\n");
2829
2830 /* we should be verifying the device is ready to be opened */
2831 mutex_lock(&priv->mutex);
2832
2833 /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
2834 * ucode filename and max sizes are card-specific. */
2835
2836 if (!priv->ucode_code.len) {
2837 ret = iwl3945_read_ucode(priv);
2838 if (ret) {
2839 IWL_ERR(priv, "Could not read microcode: %d\n", ret);
2840 mutex_unlock(&priv->mutex);
2841 goto out_release_irq;
2842 }
2843 }
2844
2845 ret = __iwl3945_up(priv);
2846
2847 mutex_unlock(&priv->mutex);
2848
2849 if (ret)
2850 goto out_release_irq;
2851
2852 IWL_DEBUG_INFO(priv, "Start UP work.\n");
2853
2854 /* Wait for START_ALIVE from ucode. Otherwise callbacks from
2855 * mac80211 will not be run successfully. */
2856 ret = wait_event_timeout(priv->wait_command_queue,
2857 test_bit(STATUS_READY, &priv->status),
2858 UCODE_READY_TIMEOUT);
2859 if (!ret) {
2860 if (!test_bit(STATUS_READY, &priv->status)) {
2861 IWL_ERR(priv,
2862 "Wait for START_ALIVE timeout after %dms.\n",
2863 jiffies_to_msecs(UCODE_READY_TIMEOUT));
2864 ret = -ETIMEDOUT;
2865 goto out_release_irq;
2866 }
2867 }
2868
2869 /* ucode is running and will send rfkill notifications,
2870 * no need to poll the killswitch state anymore */
2871 cancel_delayed_work(&priv->_3945.rfkill_poll);
2872
2873 priv->is_open = 1;
2874 IWL_DEBUG_MAC80211(priv, "leave\n");
2875 return 0;
2876
2877 out_release_irq:
2878 priv->is_open = 0;
2879 IWL_DEBUG_MAC80211(priv, "leave - failed\n");
2880 return ret;
2881 }
2882
2883 static void iwl3945_mac_stop(struct ieee80211_hw *hw)
2884 {
2885 struct iwl_priv *priv = hw->priv;
2886
2887 IWL_DEBUG_MAC80211(priv, "enter\n");
2888
2889 if (!priv->is_open) {
2890 IWL_DEBUG_MAC80211(priv, "leave - skip\n");
2891 return;
2892 }
2893
2894 priv->is_open = 0;
2895
2896 iwl3945_down(priv);
2897
2898 flush_workqueue(priv->workqueue);
2899
2900 /* start polling the killswitch state again */
2901 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
2902 round_jiffies_relative(2 * HZ));
2903
2904 IWL_DEBUG_MAC80211(priv, "leave\n");
2905 }
2906
2907 static void iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
2908 {
2909 struct iwl_priv *priv = hw->priv;
2910
2911 IWL_DEBUG_MAC80211(priv, "enter\n");
2912
2913 IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
2914 ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
2915
2916 if (iwl3945_tx_skb(priv, skb))
2917 dev_kfree_skb_any(skb);
2918
2919 IWL_DEBUG_MAC80211(priv, "leave\n");
2920 }
2921
2922 void iwl3945_config_ap(struct iwl_priv *priv)
2923 {
2924 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
2925 struct ieee80211_vif *vif = ctx->vif;
2926 int rc = 0;
2927
2928 if (test_bit(STATUS_EXIT_PENDING, &priv->status))
2929 return;
2930
2931 /* The following should be done only at AP bring up */
2932 if (!(iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS))) {
2933
2934 /* RXON - unassoc (to set timing command) */
2935 ctx->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
2936 iwl3945_commit_rxon(priv, ctx);
2937
2938 /* RXON Timing */
2939 rc = iwl_legacy_send_rxon_timing(priv, ctx);
2940 if (rc)
2941 IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
2942 "Attempting to continue.\n");
2943
2944 ctx->staging.assoc_id = 0;
2945
2946 if (vif->bss_conf.use_short_preamble)
2947 ctx->staging.flags |=
2948 RXON_FLG_SHORT_PREAMBLE_MSK;
2949 else
2950 ctx->staging.flags &=
2951 ~RXON_FLG_SHORT_PREAMBLE_MSK;
2952
2953 if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK) {
2954 if (vif->bss_conf.use_short_slot)
2955 ctx->staging.flags |=
2956 RXON_FLG_SHORT_SLOT_MSK;
2957 else
2958 ctx->staging.flags &=
2959 ~RXON_FLG_SHORT_SLOT_MSK;
2960 }
2961 /* restore RXON assoc */
2962 ctx->staging.filter_flags |= RXON_FILTER_ASSOC_MSK;
2963 iwl3945_commit_rxon(priv, ctx);
2964 }
2965 iwl3945_send_beacon_cmd(priv);
2966 }
2967
2968 static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
2969 struct ieee80211_vif *vif,
2970 struct ieee80211_sta *sta,
2971 struct ieee80211_key_conf *key)
2972 {
2973 struct iwl_priv *priv = hw->priv;
2974 int ret = 0;
2975 u8 sta_id = IWL_INVALID_STATION;
2976 u8 static_key;
2977
2978 IWL_DEBUG_MAC80211(priv, "enter\n");
2979
2980 if (iwl3945_mod_params.sw_crypto) {
2981 IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
2982 return -EOPNOTSUPP;
2983 }
2984
2985 /*
2986 * To support IBSS RSN, don't program group keys in IBSS, the
2987 * hardware will then not attempt to decrypt the frames.
2988 */
2989 if (vif->type == NL80211_IFTYPE_ADHOC &&
2990 !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE))
2991 return -EOPNOTSUPP;
2992
2993 static_key = !iwl_legacy_is_associated(priv, IWL_RXON_CTX_BSS);
2994
2995 if (!static_key) {
2996 sta_id = iwl_legacy_sta_id_or_broadcast(
2997 priv, &priv->contexts[IWL_RXON_CTX_BSS], sta);
2998 if (sta_id == IWL_INVALID_STATION)
2999 return -EINVAL;
3000 }
3001
3002 mutex_lock(&priv->mutex);
3003 iwl_legacy_scan_cancel_timeout(priv, 100);
3004
3005 switch (cmd) {
3006 case SET_KEY:
3007 if (static_key)
3008 ret = iwl3945_set_static_key(priv, key);
3009 else
3010 ret = iwl3945_set_dynamic_key(priv, key, sta_id);
3011 IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
3012 break;
3013 case DISABLE_KEY:
3014 if (static_key)
3015 ret = iwl3945_remove_static_key(priv);
3016 else
3017 ret = iwl3945_clear_sta_key_info(priv, sta_id);
3018 IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
3019 break;
3020 default:
3021 ret = -EINVAL;
3022 }
3023
3024 mutex_unlock(&priv->mutex);
3025 IWL_DEBUG_MAC80211(priv, "leave\n");
3026
3027 return ret;
3028 }
3029
3030 static int iwl3945_mac_sta_add(struct ieee80211_hw *hw,
3031 struct ieee80211_vif *vif,
3032 struct ieee80211_sta *sta)
3033 {
3034 struct iwl_priv *priv = hw->priv;
3035 struct iwl3945_sta_priv *sta_priv = (void *)sta->drv_priv;
3036 int ret;
3037 bool is_ap = vif->type == NL80211_IFTYPE_STATION;
3038 u8 sta_id;
3039
3040 IWL_DEBUG_INFO(priv, "received request to add station %pM\n",
3041 sta->addr);
3042 mutex_lock(&priv->mutex);
3043 IWL_DEBUG_INFO(priv, "proceeding to add station %pM\n",
3044 sta->addr);
3045 sta_priv->common.sta_id = IWL_INVALID_STATION;
3046
3047
3048 ret = iwl_legacy_add_station_common(priv,
3049 &priv->contexts[IWL_RXON_CTX_BSS],
3050 sta->addr, is_ap, sta, &sta_id);
3051 if (ret) {
3052 IWL_ERR(priv, "Unable to add station %pM (%d)\n",
3053 sta->addr, ret);
3054 /* Should we return success if return code is EEXIST ? */
3055 mutex_unlock(&priv->mutex);
3056 return ret;
3057 }
3058
3059 sta_priv->common.sta_id = sta_id;
3060
3061 /* Initialize rate scaling */
3062 IWL_DEBUG_INFO(priv, "Initializing rate scaling for station %pM\n",
3063 sta->addr);
3064 iwl3945_rs_rate_init(priv, sta, sta_id);
3065 mutex_unlock(&priv->mutex);
3066
3067 return 0;
3068 }
3069
3070 static void iwl3945_configure_filter(struct ieee80211_hw *hw,
3071 unsigned int changed_flags,
3072 unsigned int *total_flags,
3073 u64 multicast)
3074 {
3075 struct iwl_priv *priv = hw->priv;
3076 __le32 filter_or = 0, filter_nand = 0;
3077 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3078
3079 #define CHK(test, flag) do { \
3080 if (*total_flags & (test)) \
3081 filter_or |= (flag); \
3082 else \
3083 filter_nand |= (flag); \
3084 } while (0)
3085
3086 IWL_DEBUG_MAC80211(priv, "Enter: changed: 0x%x, total: 0x%x\n",
3087 changed_flags, *total_flags);
3088
3089 CHK(FIF_OTHER_BSS | FIF_PROMISC_IN_BSS, RXON_FILTER_PROMISC_MSK);
3090 CHK(FIF_CONTROL, RXON_FILTER_CTL2HOST_MSK);
3091 CHK(FIF_BCN_PRBRESP_PROMISC, RXON_FILTER_BCON_AWARE_MSK);
3092
3093 #undef CHK
3094
3095 mutex_lock(&priv->mutex);
3096
3097 ctx->staging.filter_flags &= ~filter_nand;
3098 ctx->staging.filter_flags |= filter_or;
3099
3100 /*
3101 * Not committing directly because hardware can perform a scan,
3102 * but even if hw is ready, committing here breaks for some reason,
3103 * we'll eventually commit the filter flags change anyway.
3104 */
3105
3106 mutex_unlock(&priv->mutex);
3107
3108 /*
3109 * Receiving all multicast frames is always enabled by the
3110 * default flags setup in iwl_legacy_connection_init_rx_config()
3111 * since we currently do not support programming multicast
3112 * filters into the device.
3113 */
3114 *total_flags &= FIF_OTHER_BSS | FIF_ALLMULTI | FIF_PROMISC_IN_BSS |
3115 FIF_BCN_PRBRESP_PROMISC | FIF_CONTROL;
3116 }
3117
3118
3119 /*****************************************************************************
3120 *
3121 * sysfs attributes
3122 *
3123 *****************************************************************************/
3124
3125 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
3126
3127 /*
3128 * The following adds a new attribute to the sysfs representation
3129 * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
3130 * used for controlling the debug level.
3131 *
3132 * See the level definitions in iwl for details.
3133 *
3134 * The debug_level being managed using sysfs below is a per device debug
3135 * level that is used instead of the global debug level if it (the per
3136 * device debug level) is set.
3137 */
3138 static ssize_t iwl3945_show_debug_level(struct device *d,
3139 struct device_attribute *attr, char *buf)
3140 {
3141 struct iwl_priv *priv = dev_get_drvdata(d);
3142 return sprintf(buf, "0x%08X\n", iwl_legacy_get_debug_level(priv));
3143 }
3144 static ssize_t iwl3945_store_debug_level(struct device *d,
3145 struct device_attribute *attr,
3146 const char *buf, size_t count)
3147 {
3148 struct iwl_priv *priv = dev_get_drvdata(d);
3149 unsigned long val;
3150 int ret;
3151
3152 ret = strict_strtoul(buf, 0, &val);
3153 if (ret)
3154 IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
3155 else {
3156 priv->debug_level = val;
3157 if (iwl_legacy_alloc_traffic_mem(priv))
3158 IWL_ERR(priv,
3159 "Not enough memory to generate traffic log\n");
3160 }
3161 return strnlen(buf, count);
3162 }
3163
3164 static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
3165 iwl3945_show_debug_level, iwl3945_store_debug_level);
3166
3167 #endif /* CONFIG_IWLWIFI_LEGACY_DEBUG */
3168
3169 static ssize_t iwl3945_show_temperature(struct device *d,
3170 struct device_attribute *attr, char *buf)
3171 {
3172 struct iwl_priv *priv = dev_get_drvdata(d);
3173
3174 if (!iwl_legacy_is_alive(priv))
3175 return -EAGAIN;
3176
3177 return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
3178 }
3179
3180 static DEVICE_ATTR(temperature, S_IRUGO, iwl3945_show_temperature, NULL);
3181
3182 static ssize_t iwl3945_show_tx_power(struct device *d,
3183 struct device_attribute *attr, char *buf)
3184 {
3185 struct iwl_priv *priv = dev_get_drvdata(d);
3186 return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
3187 }
3188
3189 static ssize_t iwl3945_store_tx_power(struct device *d,
3190 struct device_attribute *attr,
3191 const char *buf, size_t count)
3192 {
3193 struct iwl_priv *priv = dev_get_drvdata(d);
3194 char *p = (char *)buf;
3195 u32 val;
3196
3197 val = simple_strtoul(p, &p, 10);
3198 if (p == buf)
3199 IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
3200 else
3201 iwl3945_hw_reg_set_txpower(priv, val);
3202
3203 return count;
3204 }
3205
3206 static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, iwl3945_show_tx_power, iwl3945_store_tx_power);
3207
3208 static ssize_t iwl3945_show_flags(struct device *d,
3209 struct device_attribute *attr, char *buf)
3210 {
3211 struct iwl_priv *priv = dev_get_drvdata(d);
3212 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3213
3214 return sprintf(buf, "0x%04X\n", ctx->active.flags);
3215 }
3216
3217 static ssize_t iwl3945_store_flags(struct device *d,
3218 struct device_attribute *attr,
3219 const char *buf, size_t count)
3220 {
3221 struct iwl_priv *priv = dev_get_drvdata(d);
3222 u32 flags = simple_strtoul(buf, NULL, 0);
3223 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3224
3225 mutex_lock(&priv->mutex);
3226 if (le32_to_cpu(ctx->staging.flags) != flags) {
3227 /* Cancel any currently running scans... */
3228 if (iwl_legacy_scan_cancel_timeout(priv, 100))
3229 IWL_WARN(priv, "Could not cancel scan.\n");
3230 else {
3231 IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
3232 flags);
3233 ctx->staging.flags = cpu_to_le32(flags);
3234 iwl3945_commit_rxon(priv, ctx);
3235 }
3236 }
3237 mutex_unlock(&priv->mutex);
3238
3239 return count;
3240 }
3241
3242 static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, iwl3945_show_flags, iwl3945_store_flags);
3243
3244 static ssize_t iwl3945_show_filter_flags(struct device *d,
3245 struct device_attribute *attr, char *buf)
3246 {
3247 struct iwl_priv *priv = dev_get_drvdata(d);
3248 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3249
3250 return sprintf(buf, "0x%04X\n",
3251 le32_to_cpu(ctx->active.filter_flags));
3252 }
3253
3254 static ssize_t iwl3945_store_filter_flags(struct device *d,
3255 struct device_attribute *attr,
3256 const char *buf, size_t count)
3257 {
3258 struct iwl_priv *priv = dev_get_drvdata(d);
3259 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3260 u32 filter_flags = simple_strtoul(buf, NULL, 0);
3261
3262 mutex_lock(&priv->mutex);
3263 if (le32_to_cpu(ctx->staging.filter_flags) != filter_flags) {
3264 /* Cancel any currently running scans... */
3265 if (iwl_legacy_scan_cancel_timeout(priv, 100))
3266 IWL_WARN(priv, "Could not cancel scan.\n");
3267 else {
3268 IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
3269 "0x%04X\n", filter_flags);
3270 ctx->staging.filter_flags =
3271 cpu_to_le32(filter_flags);
3272 iwl3945_commit_rxon(priv, ctx);
3273 }
3274 }
3275 mutex_unlock(&priv->mutex);
3276
3277 return count;
3278 }
3279
3280 static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, iwl3945_show_filter_flags,
3281 iwl3945_store_filter_flags);
3282
3283 static ssize_t iwl3945_show_measurement(struct device *d,
3284 struct device_attribute *attr, char *buf)
3285 {
3286 struct iwl_priv *priv = dev_get_drvdata(d);
3287 struct iwl_spectrum_notification measure_report;
3288 u32 size = sizeof(measure_report), len = 0, ofs = 0;
3289 u8 *data = (u8 *)&measure_report;
3290 unsigned long flags;
3291
3292 spin_lock_irqsave(&priv->lock, flags);
3293 if (!(priv->measurement_status & MEASUREMENT_READY)) {
3294 spin_unlock_irqrestore(&priv->lock, flags);
3295 return 0;
3296 }
3297 memcpy(&measure_report, &priv->measure_report, size);
3298 priv->measurement_status = 0;
3299 spin_unlock_irqrestore(&priv->lock, flags);
3300
3301 while (size && (PAGE_SIZE - len)) {
3302 hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
3303 PAGE_SIZE - len, 1);
3304 len = strlen(buf);
3305 if (PAGE_SIZE - len)
3306 buf[len++] = '\n';
3307
3308 ofs += 16;
3309 size -= min(size, 16U);
3310 }
3311
3312 return len;
3313 }
3314
3315 static ssize_t iwl3945_store_measurement(struct device *d,
3316 struct device_attribute *attr,
3317 const char *buf, size_t count)
3318 {
3319 struct iwl_priv *priv = dev_get_drvdata(d);
3320 struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
3321 struct ieee80211_measurement_params params = {
3322 .channel = le16_to_cpu(ctx->active.channel),
3323 .start_time = cpu_to_le64(priv->_3945.last_tsf),
3324 .duration = cpu_to_le16(1),
3325 };
3326 u8 type = IWL_MEASURE_BASIC;
3327 u8 buffer[32];
3328 u8 channel;
3329
3330 if (count) {
3331 char *p = buffer;
3332 strncpy(buffer, buf, min(sizeof(buffer), count));
3333 channel = simple_strtoul(p, NULL, 0);
3334 if (channel)
3335 params.channel = channel;
3336
3337 p = buffer;
3338 while (*p && *p != ' ')
3339 p++;
3340 if (*p)
3341 type = simple_strtoul(p + 1, NULL, 0);
3342 }
3343
3344 IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
3345 "channel %d (for '%s')\n", type, params.channel, buf);
3346 iwl3945_get_measurement(priv, &params, type);
3347
3348 return count;
3349 }
3350
3351 static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
3352 iwl3945_show_measurement, iwl3945_store_measurement);
3353
3354 static ssize_t iwl3945_store_retry_rate(struct device *d,
3355 struct device_attribute *attr,
3356 const char *buf, size_t count)
3357 {
3358 struct iwl_priv *priv = dev_get_drvdata(d);
3359
3360 priv->retry_rate = simple_strtoul(buf, NULL, 0);
3361 if (priv->retry_rate <= 0)
3362 priv->retry_rate = 1;
3363
3364 return count;
3365 }
3366
3367 static ssize_t iwl3945_show_retry_rate(struct device *d,
3368 struct device_attribute *attr, char *buf)
3369 {
3370 struct iwl_priv *priv = dev_get_drvdata(d);
3371 return sprintf(buf, "%d", priv->retry_rate);
3372 }
3373
3374 static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, iwl3945_show_retry_rate,
3375 iwl3945_store_retry_rate);
3376
3377
3378 static ssize_t iwl3945_show_channels(struct device *d,
3379 struct device_attribute *attr, char *buf)
3380 {
3381 /* all this shit doesn't belong into sysfs anyway */
3382 return 0;
3383 }
3384
3385 static DEVICE_ATTR(channels, S_IRUSR, iwl3945_show_channels, NULL);
3386
3387 static ssize_t iwl3945_show_antenna(struct device *d,
3388 struct device_attribute *attr, char *buf)
3389 {
3390 struct iwl_priv *priv = dev_get_drvdata(d);
3391
3392 if (!iwl_legacy_is_alive(priv))
3393 return -EAGAIN;
3394
3395 return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
3396 }
3397
3398 static ssize_t iwl3945_store_antenna(struct device *d,
3399 struct device_attribute *attr,
3400 const char *buf, size_t count)
3401 {
3402 struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
3403 int ant;
3404
3405 if (count == 0)
3406 return 0;
3407
3408 if (sscanf(buf, "%1i", &ant) != 1) {
3409 IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
3410 return count;
3411 }
3412
3413 if ((ant >= 0) && (ant <= 2)) {
3414 IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
3415 iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
3416 } else
3417 IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
3418
3419
3420 return count;
3421 }
3422
3423 static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, iwl3945_show_antenna, iwl3945_store_antenna);
3424
3425 static ssize_t iwl3945_show_status(struct device *d,
3426 struct device_attribute *attr, char *buf)
3427 {
3428 struct iwl_priv *priv = dev_get_drvdata(d);
3429 if (!iwl_legacy_is_alive(priv))
3430 return -EAGAIN;
3431 return sprintf(buf, "0x%08x\n", (int)priv->status);
3432 }
3433
3434 static DEVICE_ATTR(status, S_IRUGO, iwl3945_show_status, NULL);
3435
3436 static ssize_t iwl3945_dump_error_log(struct device *d,
3437 struct device_attribute *attr,
3438 const char *buf, size_t count)
3439 {
3440 struct iwl_priv *priv = dev_get_drvdata(d);
3441 char *p = (char *)buf;
3442
3443 if (p[0] == '1')
3444 iwl3945_dump_nic_error_log(priv);
3445
3446 return strnlen(buf, count);
3447 }
3448
3449 static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, iwl3945_dump_error_log);
3450
3451 /*****************************************************************************
3452 *
3453 * driver setup and tear down
3454 *
3455 *****************************************************************************/
3456
3457 static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
3458 {
3459 priv->workqueue = create_singlethread_workqueue(DRV_NAME);
3460
3461 init_waitqueue_head(&priv->wait_command_queue);
3462
3463 INIT_WORK(&priv->restart, iwl3945_bg_restart);
3464 INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
3465 INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
3466 INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
3467 INIT_DELAYED_WORK(&priv->_3945.rfkill_poll, iwl3945_rfkill_poll);
3468
3469 iwl_legacy_setup_scan_deferred_work(priv);
3470
3471 iwl3945_hw_setup_deferred_work(priv);
3472
3473 init_timer(&priv->watchdog);
3474 priv->watchdog.data = (unsigned long)priv;
3475 priv->watchdog.function = iwl_legacy_bg_watchdog;
3476
3477 tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
3478 iwl3945_irq_tasklet, (unsigned long)priv);
3479 }
3480
3481 static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
3482 {
3483 iwl3945_hw_cancel_deferred_work(priv);
3484
3485 cancel_delayed_work_sync(&priv->init_alive_start);
3486 cancel_delayed_work(&priv->alive_start);
3487
3488 iwl_legacy_cancel_scan_deferred_work(priv);
3489 }
3490
3491 static struct attribute *iwl3945_sysfs_entries[] = {
3492 &dev_attr_antenna.attr,
3493 &dev_attr_channels.attr,
3494 &dev_attr_dump_errors.attr,
3495 &dev_attr_flags.attr,
3496 &dev_attr_filter_flags.attr,
3497 &dev_attr_measurement.attr,
3498 &dev_attr_retry_rate.attr,
3499 &dev_attr_status.attr,
3500 &dev_attr_temperature.attr,
3501 &dev_attr_tx_power.attr,
3502 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
3503 &dev_attr_debug_level.attr,
3504 #endif
3505 NULL
3506 };
3507
3508 static struct attribute_group iwl3945_attribute_group = {
3509 .name = NULL, /* put in device directory */
3510 .attrs = iwl3945_sysfs_entries,
3511 };
3512
3513 struct ieee80211_ops iwl3945_hw_ops = {
3514 .tx = iwl3945_mac_tx,
3515 .start = iwl3945_mac_start,
3516 .stop = iwl3945_mac_stop,
3517 .add_interface = iwl_legacy_mac_add_interface,
3518 .remove_interface = iwl_legacy_mac_remove_interface,
3519 .change_interface = iwl_legacy_mac_change_interface,
3520 .config = iwl_legacy_mac_config,
3521 .configure_filter = iwl3945_configure_filter,
3522 .set_key = iwl3945_mac_set_key,
3523 .conf_tx = iwl_legacy_mac_conf_tx,
3524 .reset_tsf = iwl_legacy_mac_reset_tsf,
3525 .bss_info_changed = iwl_legacy_mac_bss_info_changed,
3526 .hw_scan = iwl_legacy_mac_hw_scan,
3527 .sta_add = iwl3945_mac_sta_add,
3528 .sta_remove = iwl_legacy_mac_sta_remove,
3529 .tx_last_beacon = iwl_legacy_mac_tx_last_beacon,
3530 };
3531
3532 static int iwl3945_init_drv(struct iwl_priv *priv)
3533 {
3534 int ret;
3535 struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
3536
3537 priv->retry_rate = 1;
3538 priv->beacon_skb = NULL;
3539
3540 spin_lock_init(&priv->sta_lock);
3541 spin_lock_init(&priv->hcmd_lock);
3542
3543 INIT_LIST_HEAD(&priv->free_frames);
3544
3545 mutex_init(&priv->mutex);
3546
3547 priv->ieee_channels = NULL;
3548 priv->ieee_rates = NULL;
3549 priv->band = IEEE80211_BAND_2GHZ;
3550
3551 priv->iw_mode = NL80211_IFTYPE_STATION;
3552 priv->missed_beacon_threshold = IWL_MISSED_BEACON_THRESHOLD_DEF;
3553
3554 /* initialize force reset */
3555 priv->force_reset.reset_duration = IWL_DELAY_NEXT_FORCE_FW_RELOAD;
3556
3557 if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
3558 IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
3559 eeprom->version);
3560 ret = -EINVAL;
3561 goto err;
3562 }
3563 ret = iwl_legacy_init_channel_map(priv);
3564 if (ret) {
3565 IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
3566 goto err;
3567 }
3568
3569 /* Set up txpower settings in driver for all channels */
3570 if (iwl3945_txpower_set_from_eeprom(priv)) {
3571 ret = -EIO;
3572 goto err_free_channel_map;
3573 }
3574
3575 ret = iwl_legacy_init_geos(priv);
3576 if (ret) {
3577 IWL_ERR(priv, "initializing geos failed: %d\n", ret);
3578 goto err_free_channel_map;
3579 }
3580 iwl3945_init_hw_rates(priv, priv->ieee_rates);
3581
3582 return 0;
3583
3584 err_free_channel_map:
3585 iwl_legacy_free_channel_map(priv);
3586 err:
3587 return ret;
3588 }
3589
3590 #define IWL3945_MAX_PROBE_REQUEST 200
3591
3592 static int iwl3945_setup_mac(struct iwl_priv *priv)
3593 {
3594 int ret;
3595 struct ieee80211_hw *hw = priv->hw;
3596
3597 hw->rate_control_algorithm = "iwl-3945-rs";
3598 hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
3599 hw->vif_data_size = sizeof(struct iwl_vif_priv);
3600
3601 /* Tell mac80211 our characteristics */
3602 hw->flags = IEEE80211_HW_SIGNAL_DBM |
3603 IEEE80211_HW_SPECTRUM_MGMT;
3604
3605 hw->wiphy->interface_modes =
3606 priv->contexts[IWL_RXON_CTX_BSS].interface_modes;
3607
3608 hw->wiphy->flags |= WIPHY_FLAG_CUSTOM_REGULATORY |
3609 WIPHY_FLAG_DISABLE_BEACON_HINTS |
3610 WIPHY_FLAG_IBSS_RSN;
3611
3612 hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
3613 /* we create the 802.11 header and a zero-length SSID element */
3614 hw->wiphy->max_scan_ie_len = IWL3945_MAX_PROBE_REQUEST - 24 - 2;
3615
3616 /* Default value; 4 EDCA QOS priorities */
3617 hw->queues = 4;
3618
3619 if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
3620 priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
3621 &priv->bands[IEEE80211_BAND_2GHZ];
3622
3623 if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
3624 priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
3625 &priv->bands[IEEE80211_BAND_5GHZ];
3626
3627 iwl_legacy_leds_init(priv);
3628
3629 ret = ieee80211_register_hw(priv->hw);
3630 if (ret) {
3631 IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
3632 return ret;
3633 }
3634 priv->mac80211_registered = 1;
3635
3636 return 0;
3637 }
3638
3639 static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3640 {
3641 int err = 0, i;
3642 struct iwl_priv *priv;
3643 struct ieee80211_hw *hw;
3644 struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
3645 struct iwl3945_eeprom *eeprom;
3646 unsigned long flags;
3647
3648 /***********************
3649 * 1. Allocating HW data
3650 * ********************/
3651
3652 /* mac80211 allocates memory for this device instance, including
3653 * space for this driver's private structure */
3654 hw = iwl_legacy_alloc_all(cfg);
3655 if (hw == NULL) {
3656 pr_err("Can not allocate network device\n");
3657 err = -ENOMEM;
3658 goto out;
3659 }
3660 priv = hw->priv;
3661 SET_IEEE80211_DEV(hw, &pdev->dev);
3662
3663 priv->cmd_queue = IWL39_CMD_QUEUE_NUM;
3664
3665 /* 3945 has only one valid context */
3666 priv->valid_contexts = BIT(IWL_RXON_CTX_BSS);
3667
3668 for (i = 0; i < NUM_IWL_RXON_CTX; i++)
3669 priv->contexts[i].ctxid = i;
3670
3671 priv->contexts[IWL_RXON_CTX_BSS].rxon_cmd = REPLY_RXON;
3672 priv->contexts[IWL_RXON_CTX_BSS].rxon_timing_cmd = REPLY_RXON_TIMING;
3673 priv->contexts[IWL_RXON_CTX_BSS].rxon_assoc_cmd = REPLY_RXON_ASSOC;
3674 priv->contexts[IWL_RXON_CTX_BSS].qos_cmd = REPLY_QOS_PARAM;
3675 priv->contexts[IWL_RXON_CTX_BSS].ap_sta_id = IWL_AP_ID;
3676 priv->contexts[IWL_RXON_CTX_BSS].wep_key_cmd = REPLY_WEPKEY;
3677 priv->contexts[IWL_RXON_CTX_BSS].interface_modes =
3678 BIT(NL80211_IFTYPE_STATION) |
3679 BIT(NL80211_IFTYPE_ADHOC);
3680 priv->contexts[IWL_RXON_CTX_BSS].ibss_devtype = RXON_DEV_TYPE_IBSS;
3681 priv->contexts[IWL_RXON_CTX_BSS].station_devtype = RXON_DEV_TYPE_ESS;
3682 priv->contexts[IWL_RXON_CTX_BSS].unused_devtype = RXON_DEV_TYPE_ESS;
3683
3684 /*
3685 * Disabling hardware scan means that mac80211 will perform scans
3686 * "the hard way", rather than using device's scan.
3687 */
3688 if (iwl3945_mod_params.disable_hw_scan) {
3689 IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
3690 iwl3945_hw_ops.hw_scan = NULL;
3691 }
3692
3693 IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
3694 priv->cfg = cfg;
3695 priv->pci_dev = pdev;
3696 priv->inta_mask = CSR_INI_SET_MASK;
3697
3698 if (iwl_legacy_alloc_traffic_mem(priv))
3699 IWL_ERR(priv, "Not enough memory to generate traffic log\n");
3700
3701 /***************************
3702 * 2. Initializing PCI bus
3703 * *************************/
3704 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S | PCIE_LINK_STATE_L1 |
3705 PCIE_LINK_STATE_CLKPM);
3706
3707 if (pci_enable_device(pdev)) {
3708 err = -ENODEV;
3709 goto out_ieee80211_free_hw;
3710 }
3711
3712 pci_set_master(pdev);
3713
3714 err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
3715 if (!err)
3716 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
3717 if (err) {
3718 IWL_WARN(priv, "No suitable DMA available.\n");
3719 goto out_pci_disable_device;
3720 }
3721
3722 pci_set_drvdata(pdev, priv);
3723 err = pci_request_regions(pdev, DRV_NAME);
3724 if (err)
3725 goto out_pci_disable_device;
3726
3727 /***********************
3728 * 3. Read REV Register
3729 * ********************/
3730 priv->hw_base = pci_iomap(pdev, 0, 0);
3731 if (!priv->hw_base) {
3732 err = -ENODEV;
3733 goto out_pci_release_regions;
3734 }
3735
3736 IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
3737 (unsigned long long) pci_resource_len(pdev, 0));
3738 IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
3739
3740 /* We disable the RETRY_TIMEOUT register (0x41) to keep
3741 * PCI Tx retries from interfering with C3 CPU state */
3742 pci_write_config_byte(pdev, 0x41, 0x00);
3743
3744 /* these spin locks will be used in apm_ops.init and EEPROM access
3745 * we should init now
3746 */
3747 spin_lock_init(&priv->reg_lock);
3748 spin_lock_init(&priv->lock);
3749
3750 /*
3751 * stop and reset the on-board processor just in case it is in a
3752 * strange state ... like being left stranded by a primary kernel
3753 * and this is now the kdump kernel trying to start up
3754 */
3755 iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
3756
3757 /***********************
3758 * 4. Read EEPROM
3759 * ********************/
3760
3761 /* Read the EEPROM */
3762 err = iwl_legacy_eeprom_init(priv);
3763 if (err) {
3764 IWL_ERR(priv, "Unable to init EEPROM\n");
3765 goto out_iounmap;
3766 }
3767 /* MAC Address location in EEPROM same for 3945/4965 */
3768 eeprom = (struct iwl3945_eeprom *)priv->eeprom;
3769 IWL_DEBUG_INFO(priv, "MAC address: %pM\n", eeprom->mac_address);
3770 SET_IEEE80211_PERM_ADDR(priv->hw, eeprom->mac_address);
3771
3772 /***********************
3773 * 5. Setup HW Constants
3774 * ********************/
3775 /* Device-specific setup */
3776 if (iwl3945_hw_set_hw_params(priv)) {
3777 IWL_ERR(priv, "failed to set hw settings\n");
3778 goto out_eeprom_free;
3779 }
3780
3781 /***********************
3782 * 6. Setup priv
3783 * ********************/
3784
3785 err = iwl3945_init_drv(priv);
3786 if (err) {
3787 IWL_ERR(priv, "initializing driver failed\n");
3788 goto out_unset_hw_params;
3789 }
3790
3791 IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
3792 priv->cfg->name);
3793
3794 /***********************
3795 * 7. Setup Services
3796 * ********************/
3797
3798 spin_lock_irqsave(&priv->lock, flags);
3799 iwl_legacy_disable_interrupts(priv);
3800 spin_unlock_irqrestore(&priv->lock, flags);
3801
3802 pci_enable_msi(priv->pci_dev);
3803
3804 err = request_irq(priv->pci_dev->irq, iwl_legacy_isr,
3805 IRQF_SHARED, DRV_NAME, priv);
3806 if (err) {
3807 IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
3808 goto out_disable_msi;
3809 }
3810
3811 err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
3812 if (err) {
3813 IWL_ERR(priv, "failed to create sysfs device attributes\n");
3814 goto out_release_irq;
3815 }
3816
3817 iwl_legacy_set_rxon_channel(priv,
3818 &priv->bands[IEEE80211_BAND_2GHZ].channels[5],
3819 &priv->contexts[IWL_RXON_CTX_BSS]);
3820 iwl3945_setup_deferred_work(priv);
3821 iwl3945_setup_rx_handlers(priv);
3822 iwl_legacy_power_initialize(priv);
3823
3824 /*********************************
3825 * 8. Setup and Register mac80211
3826 * *******************************/
3827
3828 iwl_legacy_enable_interrupts(priv);
3829
3830 err = iwl3945_setup_mac(priv);
3831 if (err)
3832 goto out_remove_sysfs;
3833
3834 err = iwl_legacy_dbgfs_register(priv, DRV_NAME);
3835 if (err)
3836 IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
3837
3838 /* Start monitoring the killswitch */
3839 queue_delayed_work(priv->workqueue, &priv->_3945.rfkill_poll,
3840 2 * HZ);
3841
3842 return 0;
3843
3844 out_remove_sysfs:
3845 destroy_workqueue(priv->workqueue);
3846 priv->workqueue = NULL;
3847 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
3848 out_release_irq:
3849 free_irq(priv->pci_dev->irq, priv);
3850 out_disable_msi:
3851 pci_disable_msi(priv->pci_dev);
3852 iwl_legacy_free_geos(priv);
3853 iwl_legacy_free_channel_map(priv);
3854 out_unset_hw_params:
3855 iwl3945_unset_hw_params(priv);
3856 out_eeprom_free:
3857 iwl_legacy_eeprom_free(priv);
3858 out_iounmap:
3859 pci_iounmap(pdev, priv->hw_base);
3860 out_pci_release_regions:
3861 pci_release_regions(pdev);
3862 out_pci_disable_device:
3863 pci_set_drvdata(pdev, NULL);
3864 pci_disable_device(pdev);
3865 out_ieee80211_free_hw:
3866 iwl_legacy_free_traffic_mem(priv);
3867 ieee80211_free_hw(priv->hw);
3868 out:
3869 return err;
3870 }
3871
3872 static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
3873 {
3874 struct iwl_priv *priv = pci_get_drvdata(pdev);
3875 unsigned long flags;
3876
3877 if (!priv)
3878 return;
3879
3880 IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
3881
3882 iwl_legacy_dbgfs_unregister(priv);
3883
3884 set_bit(STATUS_EXIT_PENDING, &priv->status);
3885
3886 iwl_legacy_leds_exit(priv);
3887
3888 if (priv->mac80211_registered) {
3889 ieee80211_unregister_hw(priv->hw);
3890 priv->mac80211_registered = 0;
3891 } else {
3892 iwl3945_down(priv);
3893 }
3894
3895 /*
3896 * Make sure device is reset to low power before unloading driver.
3897 * This may be redundant with iwl_down(), but there are paths to
3898 * run iwl_down() without calling apm_ops.stop(), and there are
3899 * paths to avoid running iwl_down() at all before leaving driver.
3900 * This (inexpensive) call *makes sure* device is reset.
3901 */
3902 iwl_legacy_apm_stop(priv);
3903
3904 /* make sure we flush any pending irq or
3905 * tasklet for the driver
3906 */
3907 spin_lock_irqsave(&priv->lock, flags);
3908 iwl_legacy_disable_interrupts(priv);
3909 spin_unlock_irqrestore(&priv->lock, flags);
3910
3911 iwl3945_synchronize_irq(priv);
3912
3913 sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
3914
3915 cancel_delayed_work_sync(&priv->_3945.rfkill_poll);
3916
3917 iwl3945_dealloc_ucode_pci(priv);
3918
3919 if (priv->rxq.bd)
3920 iwl3945_rx_queue_free(priv, &priv->rxq);
3921 iwl3945_hw_txq_ctx_free(priv);
3922
3923 iwl3945_unset_hw_params(priv);
3924
3925 /*netif_stop_queue(dev); */
3926 flush_workqueue(priv->workqueue);
3927
3928 /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
3929 * priv->workqueue... so we can't take down the workqueue
3930 * until now... */
3931 destroy_workqueue(priv->workqueue);
3932 priv->workqueue = NULL;
3933 iwl_legacy_free_traffic_mem(priv);
3934
3935 free_irq(pdev->irq, priv);
3936 pci_disable_msi(pdev);
3937
3938 pci_iounmap(pdev, priv->hw_base);
3939 pci_release_regions(pdev);
3940 pci_disable_device(pdev);
3941 pci_set_drvdata(pdev, NULL);
3942
3943 iwl_legacy_free_channel_map(priv);
3944 iwl_legacy_free_geos(priv);
3945 kfree(priv->scan_cmd);
3946 if (priv->beacon_skb)
3947 dev_kfree_skb(priv->beacon_skb);
3948
3949 ieee80211_free_hw(priv->hw);
3950 }
3951
3952
3953 /*****************************************************************************
3954 *
3955 * driver and module entry point
3956 *
3957 *****************************************************************************/
3958
3959 static struct pci_driver iwl3945_driver = {
3960 .name = DRV_NAME,
3961 .id_table = iwl3945_hw_card_ids,
3962 .probe = iwl3945_pci_probe,
3963 .remove = __devexit_p(iwl3945_pci_remove),
3964 .driver.pm = IWL_LEGACY_PM_OPS,
3965 };
3966
3967 static int __init iwl3945_init(void)
3968 {
3969
3970 int ret;
3971 pr_info(DRV_DESCRIPTION ", " DRV_VERSION "\n");
3972 pr_info(DRV_COPYRIGHT "\n");
3973
3974 ret = iwl3945_rate_control_register();
3975 if (ret) {
3976 pr_err("Unable to register rate control algorithm: %d\n", ret);
3977 return ret;
3978 }
3979
3980 ret = pci_register_driver(&iwl3945_driver);
3981 if (ret) {
3982 pr_err("Unable to initialize PCI module\n");
3983 goto error_register;
3984 }
3985
3986 return ret;
3987
3988 error_register:
3989 iwl3945_rate_control_unregister();
3990 return ret;
3991 }
3992
3993 static void __exit iwl3945_exit(void)
3994 {
3995 pci_unregister_driver(&iwl3945_driver);
3996 iwl3945_rate_control_unregister();
3997 }
3998
3999 MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
4000
4001 module_param_named(antenna, iwl3945_mod_params.antenna, int, S_IRUGO);
4002 MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
4003 module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, S_IRUGO);
4004 MODULE_PARM_DESC(swcrypto,
4005 "using software crypto (default 1 [software])");
4006 module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan,
4007 int, S_IRUGO);
4008 MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 1)");
4009 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
4010 module_param_named(debug, iwlegacy_debug_level, uint, S_IRUGO | S_IWUSR);
4011 MODULE_PARM_DESC(debug, "debug output mask");
4012 #endif
4013 module_param_named(fw_restart, iwl3945_mod_params.restart_fw, int, S_IRUGO);
4014 MODULE_PARM_DESC(fw_restart, "restart firmware in case of error");
4015
4016 module_exit(iwl3945_exit);
4017 module_init(iwl3945_init);
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