Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[linux-btrfs-devel.git] / arch / arm / mach-omap2 / opp4xxx_data.c
blob2293ba27101b96fae1f387d5b366c5d77181f99b
1 /*
2 * OMAP4 OPP table definitions.
4 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
5 * Nishanth Menon
6 * Kevin Hilman
7 * Thara Gopinath
8 * Copyright (C) 2010-2011 Nokia Corporation.
9 * Eduardo Valentin
10 * Paul Walmsley
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
16 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
17 * kind, whether express or implied; without even the implied warranty
18 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 #include <linux/module.h>
23 #include <plat/cpu.h>
25 #include "control.h"
26 #include "omap_opp_data.h"
27 #include "pm.h"
30 * Structures containing OMAP4430 voltage supported and various
31 * voltage dependent data for each VDD.
34 #define OMAP4430_VDD_MPU_OPP50_UV 1025000
35 #define OMAP4430_VDD_MPU_OPP100_UV 1200000
36 #define OMAP4430_VDD_MPU_OPPTURBO_UV 1313000
37 #define OMAP4430_VDD_MPU_OPPNITRO_UV 1375000
39 struct omap_volt_data omap44xx_vdd_mpu_volt_data[] = {
40 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP50_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP50, 0xf4, 0x0c),
41 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPP100_UV, OMAP44XX_CONTROL_FUSE_MPU_OPP100, 0xf9, 0x16),
42 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPTURBO, 0xfa, 0x23),
43 VOLT_DATA_DEFINE(OMAP4430_VDD_MPU_OPPNITRO_UV, OMAP44XX_CONTROL_FUSE_MPU_OPPNITRO, 0xfa, 0x27),
44 VOLT_DATA_DEFINE(0, 0, 0, 0),
47 #define OMAP4430_VDD_IVA_OPP50_UV 1013000
48 #define OMAP4430_VDD_IVA_OPP100_UV 1188000
49 #define OMAP4430_VDD_IVA_OPPTURBO_UV 1300000
51 struct omap_volt_data omap44xx_vdd_iva_volt_data[] = {
52 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP50_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP50, 0xf4, 0x0c),
53 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPP100_UV, OMAP44XX_CONTROL_FUSE_IVA_OPP100, 0xf9, 0x16),
54 VOLT_DATA_DEFINE(OMAP4430_VDD_IVA_OPPTURBO_UV, OMAP44XX_CONTROL_FUSE_IVA_OPPTURBO, 0xfa, 0x23),
55 VOLT_DATA_DEFINE(0, 0, 0, 0),
58 #define OMAP4430_VDD_CORE_OPP50_UV 1025000
59 #define OMAP4430_VDD_CORE_OPP100_UV 1200000
61 struct omap_volt_data omap44xx_vdd_core_volt_data[] = {
62 VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP50_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP50, 0xf4, 0x0c),
63 VOLT_DATA_DEFINE(OMAP4430_VDD_CORE_OPP100_UV, OMAP44XX_CONTROL_FUSE_CORE_OPP100, 0xf9, 0x16),
64 VOLT_DATA_DEFINE(0, 0, 0, 0),
68 static struct omap_opp_def __initdata omap44xx_opp_def_list[] = {
69 /* MPU OPP1 - OPP50 */
70 OPP_INITIALIZER("mpu", true, 300000000, OMAP4430_VDD_MPU_OPP50_UV),
71 /* MPU OPP2 - OPP100 */
72 OPP_INITIALIZER("mpu", true, 600000000, OMAP4430_VDD_MPU_OPP100_UV),
73 /* MPU OPP3 - OPP-Turbo */
74 OPP_INITIALIZER("mpu", true, 800000000, OMAP4430_VDD_MPU_OPPTURBO_UV),
75 /* MPU OPP4 - OPP-SB */
76 OPP_INITIALIZER("mpu", true, 1008000000, OMAP4430_VDD_MPU_OPPNITRO_UV),
77 /* L3 OPP1 - OPP50 */
78 OPP_INITIALIZER("l3_main_1", true, 100000000, OMAP4430_VDD_CORE_OPP50_UV),
79 /* L3 OPP2 - OPP100, OPP-Turbo, OPP-SB */
80 OPP_INITIALIZER("l3_main_1", true, 200000000, OMAP4430_VDD_CORE_OPP100_UV),
81 /* IVA OPP1 - OPP50 */
82 OPP_INITIALIZER("iva", true, 133000000, OMAP4430_VDD_IVA_OPP50_UV),
83 /* IVA OPP2 - OPP100 */
84 OPP_INITIALIZER("iva", true, 266100000, OMAP4430_VDD_IVA_OPP100_UV),
85 /* IVA OPP3 - OPP-Turbo */
86 OPP_INITIALIZER("iva", false, 332000000, OMAP4430_VDD_IVA_OPPTURBO_UV),
87 /* TODO: add DSP, aess, fdif, gpu */
90 /**
91 * omap4_opp_init() - initialize omap4 opp table
93 int __init omap4_opp_init(void)
95 int r = -ENODEV;
97 if (!cpu_is_omap44xx())
98 return r;
100 r = omap_init_opp_table(omap44xx_opp_def_list,
101 ARRAY_SIZE(omap44xx_opp_def_list));
103 return r;
105 device_initcall(omap4_opp_init);