arch/arm/mach-tegra/board-trimslice.c

   1 /*
   2  * arch/arm/mach-tegra/board-trimslice.c
   3  *
   4  * Copyright (C) 2011 CompuLab, Ltd.
   5  * Author: Mike Rapoport <mike@compulab.co.il>
   6  *
   7  * Based on board-harmony.c
   8  * Copyright (C) 2010 Google, Inc.
   9  *
  10  * This software is licensed under the terms of the GNU General Public
  11  * License version 2, as published by the Free Software Foundation, and
  12  * may be copied, distributed, and modified under those terms.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  */
  20
  21 #include <linux/kernel.h>
  22 #include <linux/init.h>
  23 #include <linux/platform_device.h>
  24 #include <linux/serial_8250.h>
  25 #include <linux/io.h>
  26 #include <linux/i2c.h>
  27 #include <linux/gpio.h>
  28
  29 #include <asm/mach-types.h>
  30 #include <asm/mach/arch.h>
  31 #include <asm/setup.h>
  32
  33 #include <mach/iomap.h>
  34 #include <mach/sdhci.h>
  35 #include <mach/gpio.h>
  36
  37 #include "board.h"
  38 #include "clock.h"
  39 #include "devices.h"
  40 #include "gpio-names.h"
  41
  42 #include "board-trimslice.h"
  43
  44 static struct plat_serial8250_port debug_uart_platform_data[] = {
  45         {
  46                 .membase        = IO_ADDRESS(TEGRA_UARTA_BASE),
  47                 .mapbase        = TEGRA_UARTA_BASE,
  48                 .irq            = INT_UARTA,
  49                 .flags          = UPF_BOOT_AUTOCONF,
  50                 .iotype         = UPIO_MEM,
  51                 .regshift       = 2,
  52                 .uartclk        = 216000000,
  53         }, {
  54                 .flags          = 0
  55         }
  56 };
  57
  58 static struct platform_device debug_uart = {
  59         .name   = "serial8250",
  60         .id     = PLAT8250_DEV_PLATFORM,
  61         .dev    = {
  62                 .platform_data  = debug_uart_platform_data,
  63         },
  64 };
  65 static struct tegra_sdhci_platform_data sdhci_pdata1 = {
  66         .cd_gpio        = -1,
  67         .wp_gpio        = -1,
  68         .power_gpio     = -1,
  69 };
  70
  71 static struct tegra_sdhci_platform_data sdhci_pdata4 = {
  72         .cd_gpio        = TRIMSLICE_GPIO_SD4_CD,
  73         .wp_gpio        = TRIMSLICE_GPIO_SD4_WP,
  74         .power_gpio     = -1,
  75 };
  76
  77 static struct platform_device trimslice_audio_device = {
  78         .name   = "tegra-snd-trimslice",
  79         .id     = 0,
  80 };
  81
  82 static struct platform_device *trimslice_devices[] __initdata = {
  83         &debug_uart,
  84         &tegra_sdhci_device1,
  85         &tegra_sdhci_device4,
  86         &tegra_i2s_device1,
  87         &tegra_das_device,
  88         &tegra_pcm_device,
  89         &trimslice_audio_device,
  90 };
  91
  92 static struct i2c_board_info trimslice_i2c3_board_info[] = {
  93         {
  94                 I2C_BOARD_INFO("tlv320aic23", 0x1a),
  95         },
  96         {
  97                 I2C_BOARD_INFO("em3027", 0x56),
  98         },
  99 };
 100
 101 static void trimslice_i2c_init(void)
 102 {
 103         platform_device_register(&tegra_i2c_device1);
 104         platform_device_register(&tegra_i2c_device2);
 105         platform_device_register(&tegra_i2c_device3);
 106
 107         i2c_register_board_info(2, trimslice_i2c3_board_info,
 108                                 ARRAY_SIZE(trimslice_i2c3_board_info));
 109 }
 110
 111 static void trimslice_usb_init(void)
 112 {
 113         int err;
 114
 115         platform_device_register(&tegra_ehci3_device);
 116
 117         platform_device_register(&tegra_ehci2_device);
 118
 119         err = gpio_request_one(TRIMSLICE_GPIO_USB1_MODE, GPIOF_OUT_INIT_HIGH,
 120                                "usb1mode");
 121         if (err) {
 122                 pr_err("TrimSlice: failed to obtain USB1 mode gpio: %d\n", err);
 123                 return;
 124         }
 125
 126         platform_device_register(&tegra_ehci1_device);
 127 }
 128
 129 static void __init tegra_trimslice_fixup(struct tag *tags, char **cmdline,
 130         struct meminfo *mi)
 131 {
 132         mi->nr_banks = 2;
 133         mi->bank[0].start = PHYS_OFFSET;
 134         mi->bank[0].size = 448 * SZ_1M;
 135         mi->bank[1].start = SZ_512M;
 136         mi->bank[1].size = SZ_512M;
 137 }
 138
 139 static __initdata struct tegra_clk_init_table trimslice_clk_init_table[] = {
 140         /* name         parent          rate            enabled */
 141         { "uarta",      "pll_p",        216000000,      true },
 142         { "pll_a",      "pll_p_out1",   56448000,       true },
 143         { "pll_a_out0", "pll_a",        11289600,       true },
 144         { "cdev1",      NULL,           0,              true },
 145         { "i2s1",       "pll_a_out0",   11289600,       false},
 146         { NULL,         NULL,           0,              0},
 147 };
 148
 149 static int __init tegra_trimslice_pci_init(void)
 150 {
 151         if (!machine_is_trimslice())
 152                 return 0;
 153
 154         return tegra_pcie_init(true, true);
 155 }
 156 subsys_initcall(tegra_trimslice_pci_init);
 157
 158 static void __init tegra_trimslice_init(void)
 159 {
 160         tegra_clk_init_from_table(trimslice_clk_init_table);
 161
 162         trimslice_pinmux_init();
 163
 164         tegra_sdhci_device1.dev.platform_data = &sdhci_pdata1;
 165         tegra_sdhci_device4.dev.platform_data = &sdhci_pdata4;
 166
 167         platform_add_devices(trimslice_devices, ARRAY_SIZE(trimslice_devices));
 168
 169         trimslice_i2c_init();
 170         trimslice_usb_init();
 171 }
 172
 173 MACHINE_START(TRIMSLICE, "trimslice")
 174         .boot_params    = 0x00000100,
 175         .fixup          = tegra_trimslice_fixup,
 176         .map_io         = tegra_map_common_io,
 177         .init_early     = tegra_init_early,
 178         .init_irq       = tegra_init_irq,
 179         .timer          = &tegra_timer,
 180         .init_machine   = tegra_trimslice_init,
 181 MACHINE_END