2 * arch/arm/plat-pxa/include/plat/mfp.h
4 * Common Multi-Function Pin Definitions
6 * Copyright (C) 2007 Marvell International Ltd.
8 * 2007-8-21: eric miao <eric.miao@marvell.com>
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
16 #ifndef __ASM_PLAT_MFP_H
17 #define __ASM_PLAT_MFP_H
19 #define mfp_to_gpio(m) ((m) % 256)
21 /* list of all the configurable MFP pins */
219 MFP_PIN_GPIO255
= 255,
246 MFP_PIN_DF_nADV1_ALE
,
251 MFP_PIN_DF_nADV2_ALE
,
280 MFP_PIN_DF_nCS0_SM_nCS2
,
281 MFP_PIN_DF_nCS1_SM_nCS3
,
286 MFP_PIN_DF_CLE_SM_OEn
,
287 MFP_PIN_DF_ALE_SM_WEn
,
311 /* additional pins on PXA930 */
319 /* additional pins on MMP2 */
330 * a possible MFP configuration is represented by a 32-bit integer
332 * bit 0.. 9 - MFP Pin Number (1024 Pins Maximum)
333 * bit 10..12 - Alternate Function Selection
334 * bit 13..15 - Drive Strength
335 * bit 16..18 - Low Power Mode State
336 * bit 19..20 - Low Power Mode Edge Detection
337 * bit 21..22 - Run Mode Pull State
339 * to facilitate the definition, the following macros are provided
341 * MFP_CFG_DEFAULT - default MFP configuration value, with
342 * alternate function = 0,
343 * drive strength = fast 3mA (MFP_DS03X)
344 * low power mode = default
345 * edge detection = none
347 * MFP_CFG - default MFPR value with alternate function
348 * MFP_CFG_DRV - default MFPR value with alternate function and
350 * MFP_CFG_LPM - default MFPR value with alternate function and
352 * MFP_CFG_X - default MFPR value with alternate function,
353 * pin drive strength and low power mode
356 typedef unsigned long mfp_cfg_t
;
358 #define MFP_PIN(x) ((x) & 0x3ff)
360 #define MFP_AF0 (0x0 << 10)
361 #define MFP_AF1 (0x1 << 10)
362 #define MFP_AF2 (0x2 << 10)
363 #define MFP_AF3 (0x3 << 10)
364 #define MFP_AF4 (0x4 << 10)
365 #define MFP_AF5 (0x5 << 10)
366 #define MFP_AF6 (0x6 << 10)
367 #define MFP_AF7 (0x7 << 10)
368 #define MFP_AF_MASK (0x7 << 10)
369 #define MFP_AF(x) (((x) >> 10) & 0x7)
371 #define MFP_DS01X (0x0 << 13)
372 #define MFP_DS02X (0x1 << 13)
373 #define MFP_DS03X (0x2 << 13)
374 #define MFP_DS04X (0x3 << 13)
375 #define MFP_DS06X (0x4 << 13)
376 #define MFP_DS08X (0x5 << 13)
377 #define MFP_DS10X (0x6 << 13)
378 #define MFP_DS13X (0x7 << 13)
379 #define MFP_DS_MASK (0x7 << 13)
380 #define MFP_DS(x) (((x) >> 13) & 0x7)
382 #define MFP_LPM_DEFAULT (0x0 << 16)
383 #define MFP_LPM_DRIVE_LOW (0x1 << 16)
384 #define MFP_LPM_DRIVE_HIGH (0x2 << 16)
385 #define MFP_LPM_PULL_LOW (0x3 << 16)
386 #define MFP_LPM_PULL_HIGH (0x4 << 16)
387 #define MFP_LPM_FLOAT (0x5 << 16)
388 #define MFP_LPM_INPUT (0x6 << 16)
389 #define MFP_LPM_STATE_MASK (0x7 << 16)
390 #define MFP_LPM_STATE(x) (((x) >> 16) & 0x7)
392 #define MFP_LPM_EDGE_NONE (0x0 << 19)
393 #define MFP_LPM_EDGE_RISE (0x1 << 19)
394 #define MFP_LPM_EDGE_FALL (0x2 << 19)
395 #define MFP_LPM_EDGE_BOTH (0x3 << 19)
396 #define MFP_LPM_EDGE_MASK (0x3 << 19)
397 #define MFP_LPM_EDGE(x) (((x) >> 19) & 0x3)
399 #define MFP_PULL_NONE (0x0 << 21)
400 #define MFP_PULL_LOW (0x1 << 21)
401 #define MFP_PULL_HIGH (0x2 << 21)
402 #define MFP_PULL_BOTH (0x3 << 21)
403 #define MFP_PULL_FLOAT (0x4 << 21)
404 #define MFP_PULL_MASK (0x7 << 21)
405 #define MFP_PULL(x) (((x) >> 21) & 0x7)
407 #define MFP_CFG_DEFAULT (MFP_AF0 | MFP_DS03X | MFP_LPM_DEFAULT |\
408 MFP_LPM_EDGE_NONE | MFP_PULL_NONE)
410 #define MFP_CFG(pin, af) \
411 ((MFP_CFG_DEFAULT & ~MFP_AF_MASK) |\
412 (MFP_PIN(MFP_PIN_##pin) | MFP_##af))
414 #define MFP_CFG_DRV(pin, af, drv) \
415 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK)) |\
416 (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv))
418 #define MFP_CFG_LPM(pin, af, lpm) \
419 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_LPM_STATE_MASK)) |\
420 (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_LPM_##lpm))
422 #define MFP_CFG_X(pin, af, drv, lpm) \
423 ((MFP_CFG_DEFAULT & ~(MFP_AF_MASK | MFP_DS_MASK | MFP_LPM_STATE_MASK)) |\
424 (MFP_PIN(MFP_PIN_##pin) | MFP_##af | MFP_##drv | MFP_LPM_##lpm))
426 #if defined(CONFIG_PXA3xx) || defined(CONFIG_PXA95x) || defined(CONFIG_ARCH_MMP)
428 * each MFP pin will have a MFPR register, since the offset of the
429 * register varies between processors, the processor specific code
430 * should initialize the pin offsets by mfp_init()
432 * mfp_init_base() - accepts a virtual base for all MFPR registers and
433 * initialize the MFP table to a default state
435 * mfp_init_addr() - accepts a table of "mfp_addr_map" structure, which
436 * represents a range of MFP pins from "start" to "end", with the offset
437 * beginning at "offset", to define a single pin, let "end" = -1.
441 * MFP_ADDR_X() to define a range of pins
442 * MFP_ADDR() to define a single pin
443 * MFP_ADDR_END to signal the end of pin offset definitions
445 struct mfp_addr_map
{
448 unsigned long offset
;
451 #define MFP_ADDR_X(start, end, offset) \
452 { MFP_PIN_##start, MFP_PIN_##end, offset }
454 #define MFP_ADDR(pin, offset) \
455 { MFP_PIN_##pin, -1, offset }
457 #define MFP_ADDR_END { MFP_PIN_INVALID, 0 }
459 void __init
mfp_init_base(unsigned long mfpr_base
);
460 void __init
mfp_init_addr(struct mfp_addr_map
*map
);
463 * mfp_{read, write}() - for direct read/write access to the MFPR register
464 * mfp_config() - for configuring a group of MFPR registers
465 * mfp_config_lpm() - configuring all low power MFPR registers for suspend
466 * mfp_config_run() - configuring all run time MFPR registers after resume
468 unsigned long mfp_read(int mfp
);
469 void mfp_write(int mfp
, unsigned long mfpr_val
);
470 void mfp_config(unsigned long *mfp_cfgs
, int num
);
471 void mfp_config_run(void);
472 void mfp_config_lpm(void);
473 #endif /* CONFIG_PXA3xx || CONFIG_PXA95x || CONFIG_ARCH_MMP */
475 #endif /* __ASM_PLAT_MFP_H */