arch/blackfin/mach-bf537/boards/dnp5370.c

   1 /*
   2  * This is the configuration for SSV Dil/NetPC DNP/5370 board.
   3  *
   4  * DIL module:         http://www.dilnetpc.com/dnp0086.htm
   5  * SK28 (starter kit): http://www.dilnetpc.com/dnp0088.htm
   6  *
   7  * Copyright 2010 3ality Digital Systems
   8  * Copyright 2005 National ICT Australia (NICTA)
   9  * Copyright 2004-2006 Analog Devices Inc.
  10  *
  11  * Licensed under the GPL-2 or later.
  12  */
  13
  14 #include <linux/device.h>
  15 #include <linux/kernel.h>
  16 #include <linux/platform_device.h>
  17 #include <linux/io.h>
  18 #include <linux/mtd/mtd.h>
  19 #include <linux/mtd/nand.h>
  20 #include <linux/mtd/partitions.h>
  21 #include <linux/mtd/plat-ram.h>
  22 #include <linux/mtd/physmap.h>
  23 #include <linux/spi/spi.h>
  24 #include <linux/spi/flash.h>
  25 #include <linux/irq.h>
  26 #include <linux/interrupt.h>
  27 #include <linux/i2c.h>
  28 #include <linux/spi/mmc_spi.h>
  29 #include <linux/phy.h>
  30 #include <asm/dma.h>
  31 #include <asm/bfin5xx_spi.h>
  32 #include <asm/reboot.h>
  33 #include <asm/portmux.h>
  34 #include <asm/dpmc.h>
  35
  36 /*
  37  * Name the Board for the /proc/cpuinfo
  38  */
  39 const char bfin_board_name[] = "DNP/5370";
  40 #define FLASH_MAC               0x202f0000
  41 #define CONFIG_MTD_PHYSMAP_LEN  0x300000
  42
  43 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  44 static struct platform_device rtc_device = {
  45         .name = "rtc-bfin",
  46         .id   = -1,
  47 };
  48 #endif
  49
  50 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  51 #include <linux/bfin_mac.h>
  52 static const unsigned short bfin_mac_peripherals[] = P_RMII0;
  53
  54 static struct bfin_phydev_platform_data bfin_phydev_data[] = {
  55         {
  56                 .addr = 1,
  57                 .irq = PHY_POLL, /* IRQ_MAC_PHYINT */
  58         },
  59 };
  60
  61 static struct bfin_mii_bus_platform_data bfin_mii_bus_data = {
  62         .phydev_number   = 1,
  63         .phydev_data     = bfin_phydev_data,
  64         .phy_mode        = PHY_INTERFACE_MODE_RMII,
  65         .mac_peripherals = bfin_mac_peripherals,
  66 };
  67
  68 static struct platform_device bfin_mii_bus = {
  69         .name = "bfin_mii_bus",
  70         .dev = {
  71                 .platform_data = &bfin_mii_bus_data,
  72         }
  73 };
  74
  75 static struct platform_device bfin_mac_device = {
  76         .name = "bfin_mac",
  77         .dev = {
  78                 .platform_data = &bfin_mii_bus,
  79         }
  80 };
  81 #endif
  82
  83 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  84 static struct mtd_partition asmb_flash_partitions[] = {
  85         {
  86                 .name       = "bootloader(nor)",
  87                 .size       = 0x30000,
  88                 .offset     = 0,
  89         }, {
  90                 .name       = "linux kernel and rootfs(nor)",
  91                 .size       = 0x300000 - 0x30000 - 0x10000,
  92                 .offset     = MTDPART_OFS_APPEND,
  93         }, {
  94                 .name       = "MAC address(nor)",
  95                 .size       = 0x10000,
  96                 .offset     = MTDPART_OFS_APPEND,
  97                 .mask_flags = MTD_WRITEABLE,
  98         }
  99 };
 100
 101 static struct physmap_flash_data asmb_flash_data = {
 102         .width      = 1,
 103         .parts      = asmb_flash_partitions,
 104         .nr_parts   = ARRAY_SIZE(asmb_flash_partitions),
 105 };
 106
 107 static struct resource asmb_flash_resource = {
 108         .start = 0x20000000,
 109         .end   = 0x202fffff,
 110         .flags = IORESOURCE_MEM,
 111 };
 112
 113 /* 4 MB NOR flash attached to async memory banks 0-2,
 114  * therefore only 3 MB visible.
 115  */
 116 static struct platform_device asmb_flash_device = {
 117         .name     = "physmap-flash",
 118         .id       = 0,
 119         .dev = {
 120                 .platform_data = &asmb_flash_data,
 121         },
 122         .num_resources = 1,
 123         .resource      = &asmb_flash_resource,
 124 };
 125 #endif
 126
 127 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 128
 129 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 130
 131 static struct bfin5xx_spi_chip mmc_spi_chip_info = {
 132         .enable_dma    = 0,      /* use no dma transfer with this chip*/
 133 };
 134
 135 #endif
 136
 137 #if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE)
 138 /* This mapping is for at45db642 it has 1056 page size,
 139  * partition size and offset should be page aligned
 140  */
 141 static struct mtd_partition bfin_spi_dataflash_partitions[] = {
 142         {
 143                 .name   = "JFFS2 dataflash(nor)",
 144 #ifdef CONFIG_MTD_PAGESIZE_1024
 145                 .offset = 0x40000,
 146                 .size   = 0x7C0000,
 147 #else
 148                 .offset = 0x0,
 149                 .size   = 0x840000,
 150 #endif
 151         }
 152 };
 153
 154 static struct flash_platform_data bfin_spi_dataflash_data = {
 155         .name     = "mtd_dataflash",
 156         .parts    = bfin_spi_dataflash_partitions,
 157         .nr_parts = ARRAY_SIZE(bfin_spi_dataflash_partitions),
 158         .type     = "mtd_dataflash",
 159 };
 160
 161 static struct bfin5xx_spi_chip spi_dataflash_chip_info = {
 162         .enable_dma    = 0,      /* use no dma transfer with this chip*/
 163 };
 164 #endif
 165
 166 static struct spi_board_info bfin_spi_board_info[] __initdata = {
 167 /* SD/MMC card reader at SPI bus */
 168 #if defined(CONFIG_MMC_SPI) || defined(CONFIG_MMC_SPI_MODULE)
 169         {
 170                 .modalias        = "mmc_spi",
 171                 .max_speed_hz    = 20000000,
 172                 .bus_num         = 0,
 173                 .chip_select     = 1,
 174                 .controller_data = &mmc_spi_chip_info,
 175                 .mode            = SPI_MODE_3,
 176         },
 177 #endif
 178
 179 /* 8 Megabyte Atmel NOR flash chip at SPI bus */
 180 #if defined(CONFIG_MTD_DATAFLASH) || defined(CONFIG_MTD_DATAFLASH_MODULE)
 181         {
 182         .modalias        = "mtd_dataflash",
 183         .max_speed_hz    = 16700000,
 184         .bus_num         = 0,
 185         .chip_select     = 2,
 186         .platform_data   = &bfin_spi_dataflash_data,
 187         .controller_data = &spi_dataflash_chip_info,
 188         .mode            = SPI_MODE_3, /* SPI_CPHA and SPI_CPOL */
 189         },
 190 #endif
 191 };
 192
 193 /* SPI controller data */
 194 /* SPI (0) */
 195 static struct resource bfin_spi0_resource[] = {
 196         [0] = {
 197                 .start = SPI0_REGBASE,
 198                 .end   = SPI0_REGBASE + 0xFF,
 199                 .flags = IORESOURCE_MEM,
 200         },
 201         [1] = {
 202                 .start = CH_SPI,
 203                 .end   = CH_SPI,
 204                 .flags = IORESOURCE_DMA,
 205         },
 206         [2] = {
 207                 .start = IRQ_SPI,
 208                 .end   = IRQ_SPI,
 209                 .flags = IORESOURCE_IRQ,
 210         },
 211 };
 212
 213 static struct bfin5xx_spi_master spi_bfin_master_info = {
 214         .num_chipselect = 8,
 215         .enable_dma     = 1,  /* master has the ability to do dma transfer */
 216         .pin_req        = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
 217 };
 218
 219 static struct platform_device spi_bfin_master_device = {
 220         .name          = "bfin-spi",
 221         .id            = 0, /* Bus number */
 222         .num_resources = ARRAY_SIZE(bfin_spi0_resource),
 223         .resource      = bfin_spi0_resource,
 224         .dev           = {
 225                 .platform_data = &spi_bfin_master_info, /* Passed to driver */
 226         },
 227 };
 228 #endif
 229
 230 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 231 #ifdef CONFIG_SERIAL_BFIN_UART0
 232 static struct resource bfin_uart0_resources[] = {
 233         {
 234                 .start = UART0_THR,
 235                 .end = UART0_GCTL+2,
 236                 .flags = IORESOURCE_MEM,
 237         },
 238         {
 239                 .start = IRQ_UART0_RX,
 240                 .end = IRQ_UART0_RX+1,
 241                 .flags = IORESOURCE_IRQ,
 242         },
 243         {
 244                 .start = IRQ_UART0_ERROR,
 245                 .end = IRQ_UART0_ERROR,
 246                 .flags = IORESOURCE_IRQ,
 247         },
 248         {
 249                 .start = CH_UART0_TX,
 250                 .end = CH_UART0_TX,
 251                 .flags = IORESOURCE_DMA,
 252         },
 253         {
 254                 .start = CH_UART0_RX,
 255                 .end = CH_UART0_RX,
 256                 .flags = IORESOURCE_DMA,
 257         },
 258 };
 259
 260 static unsigned short bfin_uart0_peripherals[] = {
 261         P_UART0_TX, P_UART0_RX, 0
 262 };
 263
 264 static struct platform_device bfin_uart0_device = {
 265         .name = "bfin-uart",
 266         .id = 0,
 267         .num_resources = ARRAY_SIZE(bfin_uart0_resources),
 268         .resource = bfin_uart0_resources,
 269         .dev = {
 270                 .platform_data = &bfin_uart0_peripherals, /* Passed to driver */
 271         },
 272 };
 273 #endif
 274
 275 #ifdef CONFIG_SERIAL_BFIN_UART1
 276 static struct resource bfin_uart1_resources[] = {
 277         {
 278                 .start = UART1_THR,
 279                 .end   = UART1_GCTL+2,
 280                 .flags = IORESOURCE_MEM,
 281         },
 282         {
 283                 .start = IRQ_UART1_RX,
 284                 .end   = IRQ_UART1_RX+1,
 285                 .flags = IORESOURCE_IRQ,
 286         },
 287         {
 288                 .start = IRQ_UART1_ERROR,
 289                 .end   = IRQ_UART1_ERROR,
 290                 .flags = IORESOURCE_IRQ,
 291         },
 292         {
 293                 .start = CH_UART1_TX,
 294                 .end   = CH_UART1_TX,
 295                 .flags = IORESOURCE_DMA,
 296         },
 297         {
 298                 .start = CH_UART1_RX,
 299                 .end   = CH_UART1_RX,
 300                 .flags = IORESOURCE_DMA,
 301         },
 302 };
 303
 304 static unsigned short bfin_uart1_peripherals[] = {
 305         P_UART1_TX, P_UART1_RX, 0
 306 };
 307
 308 static struct platform_device bfin_uart1_device = {
 309         .name          = "bfin-uart",
 310         .id            = 1,
 311         .num_resources = ARRAY_SIZE(bfin_uart1_resources),
 312         .resource      = bfin_uart1_resources,
 313         .dev = {
 314                 .platform_data = &bfin_uart1_peripherals, /* Passed to driver */
 315         },
 316 };
 317 #endif
 318 #endif
 319
 320 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 321 static struct resource bfin_twi0_resource[] = {
 322         [0] = {
 323                 .start = TWI0_REGBASE,
 324                 .end   = TWI0_REGBASE + 0xff,
 325                 .flags = IORESOURCE_MEM,
 326         },
 327         [1] = {
 328                 .start = IRQ_TWI,
 329                 .end   = IRQ_TWI,
 330                 .flags = IORESOURCE_IRQ,
 331         },
 332 };
 333
 334 static struct platform_device i2c_bfin_twi_device = {
 335         .name          = "i2c-bfin-twi",
 336         .id            = 0,
 337         .num_resources = ARRAY_SIZE(bfin_twi0_resource),
 338         .resource      = bfin_twi0_resource,
 339 };
 340 #endif
 341
 342 static struct platform_device *dnp5370_devices[] __initdata = {
 343
 344 #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
 345 #ifdef CONFIG_SERIAL_BFIN_UART0
 346         &bfin_uart0_device,
 347 #endif
 348 #ifdef CONFIG_SERIAL_BFIN_UART1
 349         &bfin_uart1_device,
 350 #endif
 351 #endif
 352
 353 #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
 354         &asmb_flash_device,
 355 #endif
 356
 357 #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
 358         &bfin_mii_bus,
 359         &bfin_mac_device,
 360 #endif
 361
 362 #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
 363         &spi_bfin_master_device,
 364 #endif
 365
 366 #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
 367         &i2c_bfin_twi_device,
 368 #endif
 369
 370 #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
 371         &rtc_device,
 372 #endif
 373
 374 };
 375
 376 static int __init dnp5370_init(void)
 377 {
 378         printk(KERN_INFO "DNP/5370: registering device resources\n");
 379         platform_add_devices(dnp5370_devices, ARRAY_SIZE(dnp5370_devices));
 380         printk(KERN_INFO "DNP/5370: registering %zu SPI slave devices\n",
 381                ARRAY_SIZE(bfin_spi_board_info));
 382         spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
 383         printk(KERN_INFO "DNP/5370: MAC %pM\n", (void *)FLASH_MAC);
 384         return 0;
 385 }
 386 arch_initcall(dnp5370_init);
 387
 388 /*
 389  * Currently the MAC address is saved in Flash by U-Boot
 390  */
 391 void bfin_get_ether_addr(char *addr)
 392 {
 393         *(u32 *)(&(addr[0])) = bfin_read32(FLASH_MAC);
 394         *(u16 *)(&(addr[4])) = bfin_read16(FLASH_MAC + 4);
 395 }
 396 EXPORT_SYMBOL(bfin_get_ether_addr);