Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[linux-btrfs-devel.git] / arch / m32r / include / asm / m32700ut / m32700ut_lcd.h
blob4c2489079788eaabb26994b4d47fdf4c0919e789
1 #ifndef _M32700UT_M32700UT_LCD_H
2 #define _M32700UT_M32700UT_LCD_H
4 /*
5 * include/asm-m32r/m32700ut/m32700ut_lcd.h
7 * M32700UT-LCD board
9 * Copyright (c) 2002 Takeo Takahashi
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License. See the file "COPYING" in the main directory of
13 * this archive for more details.
16 #ifndef __ASSEMBLY__
18 * C functions use non-cache address.
20 #define M32700UT_LCD_BASE (0x10000000 /* + NONCACHE_OFFSET */)
21 #else
22 #define M32700UT_LCD_BASE (0x10000000 + NONCACHE_OFFSET)
23 #endif /* __ASSEMBLY__ */
26 * ICU
28 #define M32700UT_LCD_IRQ_BAT_INT (M32700UT_LCD_PLD_IRQ_BASE + 1)
29 #define M32700UT_LCD_IRQ_USB_INT1 (M32700UT_LCD_PLD_IRQ_BASE + 2)
30 #define M32700UT_LCD_IRQ_AUDT0 (M32700UT_LCD_PLD_IRQ_BASE + 3)
31 #define M32700UT_LCD_IRQ_AUDT2 (M32700UT_LCD_PLD_IRQ_BASE + 4)
32 #define M32700UT_LCD_IRQ_BATSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 16)
33 #define M32700UT_LCD_IRQ_BATSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 17)
34 #define M32700UT_LCD_IRQ_ASNDSIO_RCV (M32700UT_LCD_PLD_IRQ_BASE + 18)
35 #define M32700UT_LCD_IRQ_ASNDSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 19)
36 #define M32700UT_LCD_IRQ_ACNLSIO_SND (M32700UT_LCD_PLD_IRQ_BASE + 21)
38 #define M32700UT_LCD_ICUISTS __reg16(M32700UT_LCD_BASE + 0x300002)
39 #define M32700UT_LCD_ICUISTS_VECB_MASK (0xf000)
40 #define M32700UT_LCD_VECB(x) ((x) & M32700UT_LCD_ICUISTS_VECB_MASK)
41 #define M32700UT_LCD_ICUISTS_ISN_MASK (0x07c0)
42 #define M32700UT_LCD_ICUISTS_ISN(x) ((x) & M32700UT_LCD_ICUISTS_ISN_MASK)
43 #define M32700UT_LCD_ICUIREQ0 __reg16(M32700UT_LCD_BASE + 0x300004)
44 #define M32700UT_LCD_ICUIREQ1 __reg16(M32700UT_LCD_BASE + 0x300006)
45 #define M32700UT_LCD_ICUCR1 __reg16(M32700UT_LCD_BASE + 0x300020)
46 #define M32700UT_LCD_ICUCR2 __reg16(M32700UT_LCD_BASE + 0x300022)
47 #define M32700UT_LCD_ICUCR3 __reg16(M32700UT_LCD_BASE + 0x300024)
48 #define M32700UT_LCD_ICUCR4 __reg16(M32700UT_LCD_BASE + 0x300026)
49 #define M32700UT_LCD_ICUCR16 __reg16(M32700UT_LCD_BASE + 0x300030)
50 #define M32700UT_LCD_ICUCR17 __reg16(M32700UT_LCD_BASE + 0x300032)
51 #define M32700UT_LCD_ICUCR18 __reg16(M32700UT_LCD_BASE + 0x300034)
52 #define M32700UT_LCD_ICUCR19 __reg16(M32700UT_LCD_BASE + 0x300036)
53 #define M32700UT_LCD_ICUCR21 __reg16(M32700UT_LCD_BASE + 0x30003a)
55 #endif /* _M32700UT_M32700UT_LCD_H */