2 * This control block defines the PACA which defines the processor
3 * specific data for each logical processor on the system.
4 * There are some pointers defined that are utilized by PLIC.
6 * C 2001 PPC 64 Team, IBM Corp
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * as published by the Free Software Foundation; either version
11 * 2 of the License, or (at your option) any later version.
13 #ifndef _ASM_POWERPC_PACA_H
14 #define _ASM_POWERPC_PACA_H
19 #include <linux/init.h>
20 #include <asm/types.h>
21 #include <asm/lppaca.h>
24 #include <asm/exception-64e.h>
25 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
26 #include <asm/kvm_book3s_asm.h>
29 register struct paca_struct
*local_paca
asm("r13");
31 #if defined(CONFIG_DEBUG_PREEMPT) && defined(CONFIG_SMP)
32 extern unsigned int debug_smp_processor_id(void); /* from linux/smp.h */
34 * Add standard checks that preemption cannot occur when using get_paca():
35 * otherwise the paca_struct it points to may be the wrong one just after.
37 #define get_paca() ((void) debug_smp_processor_id(), local_paca)
39 #define get_paca() local_paca
42 #define get_lppaca() (get_paca()->lppaca_ptr)
43 #define get_slb_shadow() (get_paca()->slb_shadow_ptr)
48 * Defines the layout of the paca.
50 * This structure is not directly accessed by firmware or the service
54 #ifdef CONFIG_PPC_BOOK3S
56 * Because hw_cpu_id, unlike other paca fields, is accessed
57 * routinely from other CPUs (from the IRQ code), we stick to
58 * read-only (after boot) fields in the first cacheline to
59 * avoid cacheline bouncing.
62 struct lppaca
*lppaca_ptr
; /* Pointer to LpPaca for PLIC */
63 #endif /* CONFIG_PPC_BOOK3S */
65 * MAGIC: the spinlock functions in arch/powerpc/lib/locks.c
66 * load lock_token and paca_index with a single lwz
67 * instruction. They must travel together and be properly
70 u16 lock_token
; /* Constant 0x8000, used in locks */
71 u16 paca_index
; /* Logical processor number */
73 u64 kernel_toc
; /* Kernel TOC address */
74 u64 kernelbase
; /* Base address of kernel */
75 u64 kernel_msr
; /* MSR while running in kernel */
76 #ifdef CONFIG_PPC_STD_MMU_64
77 u64 stab_real
; /* Absolute address of segment table */
78 u64 stab_addr
; /* Virtual address of segment table */
79 #endif /* CONFIG_PPC_STD_MMU_64 */
80 void *emergency_sp
; /* pointer to emergency stack */
81 u64 data_offset
; /* per cpu data offset */
82 s16 hw_cpu_id
; /* Physical processor number */
83 u8 cpu_start
; /* At startup, processor spins until */
84 /* this becomes non-zero. */
85 u8 kexec_state
; /* set when kexec down has irqs off */
86 #ifdef CONFIG_PPC_STD_MMU_64
87 struct slb_shadow
*slb_shadow_ptr
;
88 struct dtl_entry
*dispatch_log
;
89 struct dtl_entry
*dispatch_log_end
;
92 * Now, starting in cacheline 2, the exception save areas
94 /* used for most interrupts/exceptions */
95 u64 exgen
[11] __attribute__((aligned(0x80)));
96 u64 exmc
[11]; /* used for machine checks */
97 u64 exslb
[11]; /* used for SLB/segment table misses
98 * on the linear mapping */
99 /* SLB related definitions */
102 u16 slb_cache
[SLB_CACHE_ENTRIES
];
103 #endif /* CONFIG_PPC_STD_MMU_64 */
105 #ifdef CONFIG_PPC_BOOK3E
106 u64 exgen
[8] __attribute__((aligned(0x80)));
107 /* Keep pgd in the same cacheline as the start of extlb */
108 pgd_t
*pgd
__attribute__((aligned(0x80))); /* Current PGD */
109 pgd_t
*kernel_pgd
; /* Kernel PGD */
110 /* We can have up to 3 levels of reentrancy in the TLB miss handler */
111 u64 extlb
[3][EX_TLB_SIZE
/ sizeof(u64
)];
112 u64 exmc
[8]; /* used for machine checks */
113 u64 excrit
[8]; /* used for crit interrupts */
114 u64 exdbg
[8]; /* used for debug interrupts */
116 /* Kernel stack pointers for use by special exceptions */
120 #endif /* CONFIG_PPC_BOOK3E */
122 mm_context_t context
;
125 * then miscellaneous read-write fields
127 struct task_struct
*__current
; /* Pointer to current */
128 u64 kstack
; /* Saved Kernel stack addr */
129 u64 stab_rr
; /* stab/slb round-robin counter */
130 u64 saved_r1
; /* r1 save for RTAS calls or PM */
131 u64 saved_msr
; /* MSR saved here by enter_rtas */
132 u16 trap_save
; /* Used when bad stack is encountered */
133 u8 soft_enabled
; /* irq soft-enable flag */
134 u8 hard_enabled
; /* set if irqs are enabled in MSR */
135 u8 io_sync
; /* writel() needs spin_unlock sync */
136 u8 irq_work_pending
; /* IRQ_WORK interrupt while soft-disable */
138 /* Stuff for accurate time accounting */
139 u64 user_time
; /* accumulated usermode TB ticks */
140 u64 system_time
; /* accumulated system TB ticks */
141 u64 user_time_scaled
; /* accumulated usermode SPURR ticks */
142 u64 starttime
; /* TB value snapshot */
143 u64 starttime_user
; /* TB value on exit to usermode */
144 u64 startspurr
; /* SPURR value snapshot */
145 u64 utime_sspurr
; /* ->user_time when ->startspurr set */
146 u64 stolen_time
; /* TB ticks taken by hypervisor */
147 u64 dtl_ridx
; /* read index in dispatch log */
148 struct dtl_entry
*dtl_curr
; /* pointer corresponding to dtl_ridx */
150 #ifdef CONFIG_KVM_BOOK3S_HANDLER
151 #ifdef CONFIG_KVM_BOOK3S_PR
152 /* We use this to store guest state in */
153 struct kvmppc_book3s_shadow_vcpu shadow_vcpu
;
155 struct kvmppc_host_state kvm_hstate
;
159 extern struct paca_struct
*paca
;
160 extern __initdata
struct paca_struct boot_paca
;
161 extern void initialise_paca(struct paca_struct
*new_paca
, int cpu
);
162 extern void setup_paca(struct paca_struct
*new_paca
);
163 extern void allocate_pacas(void);
164 extern void free_unused_pacas(void);
166 #else /* CONFIG_PPC64 */
168 static inline void allocate_pacas(void) { };
169 static inline void free_unused_pacas(void) { };
171 #endif /* CONFIG_PPC64 */
173 #endif /* __KERNEL__ */
174 #endif /* _ASM_POWERPC_PACA_H */