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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[linux-btrfs-devel.git] / arch / powerpc / kernel / cputable.c
blobfa44ff538861fa4b44c81b60ebff7b2a4ac0be64
1 /*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13 #include <linux/string.h>
14 #include <linux/sched.h>
15 #include <linux/threads.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18
19 #include <asm/oprofile_impl.h>
20 #include <asm/cputable.h>
21 #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22 #include <asm/mmu.h>
23
24 struct cpu_spec* cur_cpu_spec = NULL;
25 EXPORT_SYMBOL(cur_cpu_spec);
26
27 /* The platform string corresponding to the real PVR */
28 const char *powerpc_base_platform;
29
30 /* NOTE:
31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
32 * the responsibility of the appropriate CPU save/restore functions to
33 * eventually copy these settings over. Those save/restore aren't yet
34 * part of the cputable though. That has to be fixed for both ppc32
35 * and ppc64
36 */
37 #ifdef CONFIG_PPC32
38 extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
39 extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
40 extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
41 extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
42 extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
43 extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
44 extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
45 extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
46 extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
47 extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
48 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
49 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
50 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
51 extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
52 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
53 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
54 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
55 extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
56 extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
57 extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
58 extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
59 extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
60 #endif /* CONFIG_PPC32 */
61 #ifdef CONFIG_PPC64
62 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
63 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
64 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
65 extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec);
66 extern void __restore_cpu_pa6t(void);
67 extern void __restore_cpu_ppc970(void);
68 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
69 extern void __restore_cpu_power7(void);
70 extern void __restore_cpu_a2(void);
71 #endif /* CONFIG_PPC64 */
72 #if defined(CONFIG_E500)
73 extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
74 extern void __restore_cpu_e5500(void);
75 #endif /* CONFIG_E500 */
76
77 /* This table only contains "desktop" CPUs, it need to be filled with embedded
78 * ones as well...
79 */
80 #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
81 PPC_FEATURE_HAS_MMU)
82 #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
83 #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
84 #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
85 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
86 #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
87 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
88 #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
89 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
90 PPC_FEATURE_TRUE_LE | \
91 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
92 #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
93 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
94 PPC_FEATURE_TRUE_LE | \
95 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
96 #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
97 PPC_FEATURE_TRUE_LE | \
98 PPC_FEATURE_HAS_ALTIVEC_COMP)
99 #ifdef CONFIG_PPC_BOOK3E_64
100 #define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
101 #else
102 #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
103 PPC_FEATURE_BOOKE)
104 #endif
105
106 static struct cpu_spec __initdata cpu_specs[] = {
107 #ifdef CONFIG_PPC_BOOK3S_64
108 { /* Power3 */
109 .pvr_mask = 0xffff0000,
110 .pvr_value = 0x00400000,
111 .cpu_name = "POWER3 (630)",
112 .cpu_features = CPU_FTRS_POWER3,
113 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
114 .mmu_features = MMU_FTR_HPTE_TABLE,
115 .icache_bsize = 128,
116 .dcache_bsize = 128,
117 .num_pmcs = 8,
118 .pmc_type = PPC_PMC_IBM,
119 .oprofile_cpu_type = "ppc64/power3",
120 .oprofile_type = PPC_OPROFILE_RS64,
121 .platform = "power3",
122 },
123 { /* Power3+ */
124 .pvr_mask = 0xffff0000,
125 .pvr_value = 0x00410000,
126 .cpu_name = "POWER3 (630+)",
127 .cpu_features = CPU_FTRS_POWER3,
128 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
129 .mmu_features = MMU_FTR_HPTE_TABLE,
130 .icache_bsize = 128,
131 .dcache_bsize = 128,
132 .num_pmcs = 8,
133 .pmc_type = PPC_PMC_IBM,
134 .oprofile_cpu_type = "ppc64/power3",
135 .oprofile_type = PPC_OPROFILE_RS64,
136 .platform = "power3",
137 },
138 { /* Northstar */
139 .pvr_mask = 0xffff0000,
140 .pvr_value = 0x00330000,
141 .cpu_name = "RS64-II (northstar)",
142 .cpu_features = CPU_FTRS_RS64,
143 .cpu_user_features = COMMON_USER_PPC64,
144 .mmu_features = MMU_FTR_HPTE_TABLE,
145 .icache_bsize = 128,
146 .dcache_bsize = 128,
147 .num_pmcs = 8,
148 .pmc_type = PPC_PMC_IBM,
149 .oprofile_cpu_type = "ppc64/rs64",
150 .oprofile_type = PPC_OPROFILE_RS64,
151 .platform = "rs64",
152 },
153 { /* Pulsar */
154 .pvr_mask = 0xffff0000,
155 .pvr_value = 0x00340000,
156 .cpu_name = "RS64-III (pulsar)",
157 .cpu_features = CPU_FTRS_RS64,
158 .cpu_user_features = COMMON_USER_PPC64,
159 .mmu_features = MMU_FTR_HPTE_TABLE,
160 .icache_bsize = 128,
161 .dcache_bsize = 128,
162 .num_pmcs = 8,
163 .pmc_type = PPC_PMC_IBM,
164 .oprofile_cpu_type = "ppc64/rs64",
165 .oprofile_type = PPC_OPROFILE_RS64,
166 .platform = "rs64",
167 },
168 { /* I-star */
169 .pvr_mask = 0xffff0000,
170 .pvr_value = 0x00360000,
171 .cpu_name = "RS64-III (icestar)",
172 .cpu_features = CPU_FTRS_RS64,
173 .cpu_user_features = COMMON_USER_PPC64,
174 .mmu_features = MMU_FTR_HPTE_TABLE,
175 .icache_bsize = 128,
176 .dcache_bsize = 128,
177 .num_pmcs = 8,
178 .pmc_type = PPC_PMC_IBM,
179 .oprofile_cpu_type = "ppc64/rs64",
180 .oprofile_type = PPC_OPROFILE_RS64,
181 .platform = "rs64",
182 },
183 { /* S-star */
184 .pvr_mask = 0xffff0000,
185 .pvr_value = 0x00370000,
186 .cpu_name = "RS64-IV (sstar)",
187 .cpu_features = CPU_FTRS_RS64,
188 .cpu_user_features = COMMON_USER_PPC64,
189 .mmu_features = MMU_FTR_HPTE_TABLE,
190 .icache_bsize = 128,
191 .dcache_bsize = 128,
192 .num_pmcs = 8,
193 .pmc_type = PPC_PMC_IBM,
194 .oprofile_cpu_type = "ppc64/rs64",
195 .oprofile_type = PPC_OPROFILE_RS64,
196 .platform = "rs64",
197 },
198 { /* Power4 */
199 .pvr_mask = 0xffff0000,
200 .pvr_value = 0x00350000,
201 .cpu_name = "POWER4 (gp)",
202 .cpu_features = CPU_FTRS_POWER4,
203 .cpu_user_features = COMMON_USER_POWER4,
204 .mmu_features = MMU_FTRS_POWER4,
205 .icache_bsize = 128,
206 .dcache_bsize = 128,
207 .num_pmcs = 8,
208 .pmc_type = PPC_PMC_IBM,
209 .oprofile_cpu_type = "ppc64/power4",
210 .oprofile_type = PPC_OPROFILE_POWER4,
211 .platform = "power4",
212 },
213 { /* Power4+ */
214 .pvr_mask = 0xffff0000,
215 .pvr_value = 0x00380000,
216 .cpu_name = "POWER4+ (gq)",
217 .cpu_features = CPU_FTRS_POWER4,
218 .cpu_user_features = COMMON_USER_POWER4,
219 .mmu_features = MMU_FTRS_POWER4,
220 .icache_bsize = 128,
221 .dcache_bsize = 128,
222 .num_pmcs = 8,
223 .pmc_type = PPC_PMC_IBM,
224 .oprofile_cpu_type = "ppc64/power4",
225 .oprofile_type = PPC_OPROFILE_POWER4,
226 .platform = "power4",
227 },
228 { /* PPC970 */
229 .pvr_mask = 0xffff0000,
230 .pvr_value = 0x00390000,
231 .cpu_name = "PPC970",
232 .cpu_features = CPU_FTRS_PPC970,
233 .cpu_user_features = COMMON_USER_POWER4 |
234 PPC_FEATURE_HAS_ALTIVEC_COMP,
235 .mmu_features = MMU_FTRS_PPC970,
236 .icache_bsize = 128,
237 .dcache_bsize = 128,
238 .num_pmcs = 8,
239 .pmc_type = PPC_PMC_IBM,
240 .cpu_setup = __setup_cpu_ppc970,
241 .cpu_restore = __restore_cpu_ppc970,
242 .oprofile_cpu_type = "ppc64/970",
243 .oprofile_type = PPC_OPROFILE_POWER4,
244 .platform = "ppc970",
245 },
246 { /* PPC970FX */
247 .pvr_mask = 0xffff0000,
248 .pvr_value = 0x003c0000,
249 .cpu_name = "PPC970FX",
250 .cpu_features = CPU_FTRS_PPC970,
251 .cpu_user_features = COMMON_USER_POWER4 |
252 PPC_FEATURE_HAS_ALTIVEC_COMP,
253 .mmu_features = MMU_FTRS_PPC970,
254 .icache_bsize = 128,
255 .dcache_bsize = 128,
256 .num_pmcs = 8,
257 .pmc_type = PPC_PMC_IBM,
258 .cpu_setup = __setup_cpu_ppc970,
259 .cpu_restore = __restore_cpu_ppc970,
260 .oprofile_cpu_type = "ppc64/970",
261 .oprofile_type = PPC_OPROFILE_POWER4,
262 .platform = "ppc970",
263 },
264 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
265 .pvr_mask = 0xffffffff,
266 .pvr_value = 0x00440100,
267 .cpu_name = "PPC970MP",
268 .cpu_features = CPU_FTRS_PPC970,
269 .cpu_user_features = COMMON_USER_POWER4 |
270 PPC_FEATURE_HAS_ALTIVEC_COMP,
271 .mmu_features = MMU_FTR_HPTE_TABLE,
272 .icache_bsize = 128,
273 .dcache_bsize = 128,
274 .num_pmcs = 8,
275 .pmc_type = PPC_PMC_IBM,
276 .cpu_setup = __setup_cpu_ppc970,
277 .cpu_restore = __restore_cpu_ppc970,
278 .oprofile_cpu_type = "ppc64/970MP",
279 .oprofile_type = PPC_OPROFILE_POWER4,
280 .platform = "ppc970",
281 },
282 { /* PPC970MP */
283 .pvr_mask = 0xffff0000,
284 .pvr_value = 0x00440000,
285 .cpu_name = "PPC970MP",
286 .cpu_features = CPU_FTRS_PPC970,
287 .cpu_user_features = COMMON_USER_POWER4 |
288 PPC_FEATURE_HAS_ALTIVEC_COMP,
289 .mmu_features = MMU_FTRS_PPC970,
290 .icache_bsize = 128,
291 .dcache_bsize = 128,
292 .num_pmcs = 8,
293 .pmc_type = PPC_PMC_IBM,
294 .cpu_setup = __setup_cpu_ppc970MP,
295 .cpu_restore = __restore_cpu_ppc970,
296 .oprofile_cpu_type = "ppc64/970MP",
297 .oprofile_type = PPC_OPROFILE_POWER4,
298 .platform = "ppc970",
299 },
300 { /* PPC970GX */
301 .pvr_mask = 0xffff0000,
302 .pvr_value = 0x00450000,
303 .cpu_name = "PPC970GX",
304 .cpu_features = CPU_FTRS_PPC970,
305 .cpu_user_features = COMMON_USER_POWER4 |
306 PPC_FEATURE_HAS_ALTIVEC_COMP,
307 .mmu_features = MMU_FTRS_PPC970,
308 .icache_bsize = 128,
309 .dcache_bsize = 128,
310 .num_pmcs = 8,
311 .pmc_type = PPC_PMC_IBM,
312 .cpu_setup = __setup_cpu_ppc970,
313 .oprofile_cpu_type = "ppc64/970",
314 .oprofile_type = PPC_OPROFILE_POWER4,
315 .platform = "ppc970",
316 },
317 { /* Power5 GR */
318 .pvr_mask = 0xffff0000,
319 .pvr_value = 0x003a0000,
320 .cpu_name = "POWER5 (gr)",
321 .cpu_features = CPU_FTRS_POWER5,
322 .cpu_user_features = COMMON_USER_POWER5,
323 .mmu_features = MMU_FTRS_POWER5,
324 .icache_bsize = 128,
325 .dcache_bsize = 128,
326 .num_pmcs = 6,
327 .pmc_type = PPC_PMC_IBM,
328 .oprofile_cpu_type = "ppc64/power5",
329 .oprofile_type = PPC_OPROFILE_POWER4,
330 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
331 * and above but only works on POWER5 and above
332 */
333 .oprofile_mmcra_sihv = MMCRA_SIHV,
334 .oprofile_mmcra_sipr = MMCRA_SIPR,
335 .platform = "power5",
336 },
337 { /* Power5++ */
338 .pvr_mask = 0xffffff00,
339 .pvr_value = 0x003b0300,
340 .cpu_name = "POWER5+ (gs)",
341 .cpu_features = CPU_FTRS_POWER5,
342 .cpu_user_features = COMMON_USER_POWER5_PLUS,
343 .mmu_features = MMU_FTRS_POWER5,
344 .icache_bsize = 128,
345 .dcache_bsize = 128,
346 .num_pmcs = 6,
347 .oprofile_cpu_type = "ppc64/power5++",
348 .oprofile_type = PPC_OPROFILE_POWER4,
349 .oprofile_mmcra_sihv = MMCRA_SIHV,
350 .oprofile_mmcra_sipr = MMCRA_SIPR,
351 .platform = "power5+",
352 },
353 { /* Power5 GS */
354 .pvr_mask = 0xffff0000,
355 .pvr_value = 0x003b0000,
356 .cpu_name = "POWER5+ (gs)",
357 .cpu_features = CPU_FTRS_POWER5,
358 .cpu_user_features = COMMON_USER_POWER5_PLUS,
359 .mmu_features = MMU_FTRS_POWER5,
360 .icache_bsize = 128,
361 .dcache_bsize = 128,
362 .num_pmcs = 6,
363 .pmc_type = PPC_PMC_IBM,
364 .oprofile_cpu_type = "ppc64/power5+",
365 .oprofile_type = PPC_OPROFILE_POWER4,
366 .oprofile_mmcra_sihv = MMCRA_SIHV,
367 .oprofile_mmcra_sipr = MMCRA_SIPR,
368 .platform = "power5+",
369 },
370 { /* POWER6 in P5+ mode; 2.04-compliant processor */
371 .pvr_mask = 0xffffffff,
372 .pvr_value = 0x0f000001,
373 .cpu_name = "POWER5+",
374 .cpu_features = CPU_FTRS_POWER5,
375 .cpu_user_features = COMMON_USER_POWER5_PLUS,
376 .mmu_features = MMU_FTRS_POWER5,
377 .icache_bsize = 128,
378 .dcache_bsize = 128,
379 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
380 .oprofile_type = PPC_OPROFILE_POWER4,
381 .platform = "power5+",
382 },
383 { /* Power6 */
384 .pvr_mask = 0xffff0000,
385 .pvr_value = 0x003e0000,
386 .cpu_name = "POWER6 (raw)",
387 .cpu_features = CPU_FTRS_POWER6,
388 .cpu_user_features = COMMON_USER_POWER6 |
389 PPC_FEATURE_POWER6_EXT,
390 .mmu_features = MMU_FTRS_POWER6,
391 .icache_bsize = 128,
392 .dcache_bsize = 128,
393 .num_pmcs = 6,
394 .pmc_type = PPC_PMC_IBM,
395 .oprofile_cpu_type = "ppc64/power6",
396 .oprofile_type = PPC_OPROFILE_POWER4,
397 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
398 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
399 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
400 POWER6_MMCRA_OTHER,
401 .platform = "power6x",
402 },
403 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
404 .pvr_mask = 0xffffffff,
405 .pvr_value = 0x0f000002,
406 .cpu_name = "POWER6 (architected)",
407 .cpu_features = CPU_FTRS_POWER6,
408 .cpu_user_features = COMMON_USER_POWER6,
409 .mmu_features = MMU_FTRS_POWER6,
410 .icache_bsize = 128,
411 .dcache_bsize = 128,
412 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
413 .oprofile_type = PPC_OPROFILE_POWER4,
414 .platform = "power6",
415 },
416 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
417 .pvr_mask = 0xffffffff,
418 .pvr_value = 0x0f000003,
419 .cpu_name = "POWER7 (architected)",
420 .cpu_features = CPU_FTRS_POWER7,
421 .cpu_user_features = COMMON_USER_POWER7,
422 .mmu_features = MMU_FTRS_POWER7,
423 .icache_bsize = 128,
424 .dcache_bsize = 128,
425 .oprofile_type = PPC_OPROFILE_POWER4,
426 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
427 .cpu_setup = __setup_cpu_power7,
428 .cpu_restore = __restore_cpu_power7,
429 .platform = "power7",
430 },
431 { /* Power7 */
432 .pvr_mask = 0xffff0000,
433 .pvr_value = 0x003f0000,
434 .cpu_name = "POWER7 (raw)",
435 .cpu_features = CPU_FTRS_POWER7,
436 .cpu_user_features = COMMON_USER_POWER7,
437 .mmu_features = MMU_FTRS_POWER7,
438 .icache_bsize = 128,
439 .dcache_bsize = 128,
440 .num_pmcs = 6,
441 .pmc_type = PPC_PMC_IBM,
442 .oprofile_cpu_type = "ppc64/power7",
443 .oprofile_type = PPC_OPROFILE_POWER4,
444 .cpu_setup = __setup_cpu_power7,
445 .cpu_restore = __restore_cpu_power7,
446 .platform = "power7",
447 },
448 { /* Power7+ */
449 .pvr_mask = 0xffff0000,
450 .pvr_value = 0x004A0000,
451 .cpu_name = "POWER7+ (raw)",
452 .cpu_features = CPU_FTRS_POWER7,
453 .cpu_user_features = COMMON_USER_POWER7,
454 .mmu_features = MMU_FTRS_POWER7,
455 .icache_bsize = 128,
456 .dcache_bsize = 128,
457 .num_pmcs = 6,
458 .pmc_type = PPC_PMC_IBM,
459 .oprofile_cpu_type = "ppc64/power7",
460 .oprofile_type = PPC_OPROFILE_POWER4,
461 .cpu_setup = __setup_cpu_power7,
462 .cpu_restore = __restore_cpu_power7,
463 .platform = "power7+",
464 },
465 { /* Cell Broadband Engine */
466 .pvr_mask = 0xffff0000,
467 .pvr_value = 0x00700000,
468 .cpu_name = "Cell Broadband Engine",
469 .cpu_features = CPU_FTRS_CELL,
470 .cpu_user_features = COMMON_USER_PPC64 |
471 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
472 PPC_FEATURE_SMT,
473 .mmu_features = MMU_FTRS_CELL,
474 .icache_bsize = 128,
475 .dcache_bsize = 128,
476 .num_pmcs = 4,
477 .pmc_type = PPC_PMC_IBM,
478 .oprofile_cpu_type = "ppc64/cell-be",
479 .oprofile_type = PPC_OPROFILE_CELL,
480 .platform = "ppc-cell-be",
481 },
482 { /* PA Semi PA6T */
483 .pvr_mask = 0x7fff0000,
484 .pvr_value = 0x00900000,
485 .cpu_name = "PA6T",
486 .cpu_features = CPU_FTRS_PA6T,
487 .cpu_user_features = COMMON_USER_PA6T,
488 .mmu_features = MMU_FTRS_PA6T,
489 .icache_bsize = 64,
490 .dcache_bsize = 64,
491 .num_pmcs = 6,
492 .pmc_type = PPC_PMC_PA6T,
493 .cpu_setup = __setup_cpu_pa6t,
494 .cpu_restore = __restore_cpu_pa6t,
495 .oprofile_cpu_type = "ppc64/pa6t",
496 .oprofile_type = PPC_OPROFILE_PA6T,
497 .platform = "pa6t",
498 },
499 { /* default match */
500 .pvr_mask = 0x00000000,
501 .pvr_value = 0x00000000,
502 .cpu_name = "POWER4 (compatible)",
503 .cpu_features = CPU_FTRS_COMPATIBLE,
504 .cpu_user_features = COMMON_USER_PPC64,
505 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
506 .icache_bsize = 128,
507 .dcache_bsize = 128,
508 .num_pmcs = 6,
509 .pmc_type = PPC_PMC_IBM,
510 .platform = "power4",
511 }
512 #endif /* CONFIG_PPC_BOOK3S_64 */
513
514 #ifdef CONFIG_PPC32
515 #if CLASSIC_PPC
516 { /* 601 */
517 .pvr_mask = 0xffff0000,
518 .pvr_value = 0x00010000,
519 .cpu_name = "601",
520 .cpu_features = CPU_FTRS_PPC601,
521 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
522 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
523 .mmu_features = MMU_FTR_HPTE_TABLE,
524 .icache_bsize = 32,
525 .dcache_bsize = 32,
526 .machine_check = machine_check_generic,
527 .platform = "ppc601",
528 },
529 { /* 603 */
530 .pvr_mask = 0xffff0000,
531 .pvr_value = 0x00030000,
532 .cpu_name = "603",
533 .cpu_features = CPU_FTRS_603,
534 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
535 .mmu_features = 0,
536 .icache_bsize = 32,
537 .dcache_bsize = 32,
538 .cpu_setup = __setup_cpu_603,
539 .machine_check = machine_check_generic,
540 .platform = "ppc603",
541 },
542 { /* 603e */
543 .pvr_mask = 0xffff0000,
544 .pvr_value = 0x00060000,
545 .cpu_name = "603e",
546 .cpu_features = CPU_FTRS_603,
547 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
548 .mmu_features = 0,
549 .icache_bsize = 32,
550 .dcache_bsize = 32,
551 .cpu_setup = __setup_cpu_603,
552 .machine_check = machine_check_generic,
553 .platform = "ppc603",
554 },
555 { /* 603ev */
556 .pvr_mask = 0xffff0000,
557 .pvr_value = 0x00070000,
558 .cpu_name = "603ev",
559 .cpu_features = CPU_FTRS_603,
560 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
561 .mmu_features = 0,
562 .icache_bsize = 32,
563 .dcache_bsize = 32,
564 .cpu_setup = __setup_cpu_603,
565 .machine_check = machine_check_generic,
566 .platform = "ppc603",
567 },
568 { /* 604 */
569 .pvr_mask = 0xffff0000,
570 .pvr_value = 0x00040000,
571 .cpu_name = "604",
572 .cpu_features = CPU_FTRS_604,
573 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
574 .mmu_features = MMU_FTR_HPTE_TABLE,
575 .icache_bsize = 32,
576 .dcache_bsize = 32,
577 .num_pmcs = 2,
578 .cpu_setup = __setup_cpu_604,
579 .machine_check = machine_check_generic,
580 .platform = "ppc604",
581 },
582 { /* 604e */
583 .pvr_mask = 0xfffff000,
584 .pvr_value = 0x00090000,
585 .cpu_name = "604e",
586 .cpu_features = CPU_FTRS_604,
587 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
588 .mmu_features = MMU_FTR_HPTE_TABLE,
589 .icache_bsize = 32,
590 .dcache_bsize = 32,
591 .num_pmcs = 4,
592 .cpu_setup = __setup_cpu_604,
593 .machine_check = machine_check_generic,
594 .platform = "ppc604",
595 },
596 { /* 604r */
597 .pvr_mask = 0xffff0000,
598 .pvr_value = 0x00090000,
599 .cpu_name = "604r",
600 .cpu_features = CPU_FTRS_604,
601 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
602 .mmu_features = MMU_FTR_HPTE_TABLE,
603 .icache_bsize = 32,
604 .dcache_bsize = 32,
605 .num_pmcs = 4,
606 .cpu_setup = __setup_cpu_604,
607 .machine_check = machine_check_generic,
608 .platform = "ppc604",
609 },
610 { /* 604ev */
611 .pvr_mask = 0xffff0000,
612 .pvr_value = 0x000a0000,
613 .cpu_name = "604ev",
614 .cpu_features = CPU_FTRS_604,
615 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
616 .mmu_features = MMU_FTR_HPTE_TABLE,
617 .icache_bsize = 32,
618 .dcache_bsize = 32,
619 .num_pmcs = 4,
620 .cpu_setup = __setup_cpu_604,
621 .machine_check = machine_check_generic,
622 .platform = "ppc604",
623 },
624 { /* 740/750 (0x4202, don't support TAU ?) */
625 .pvr_mask = 0xffffffff,
626 .pvr_value = 0x00084202,
627 .cpu_name = "740/750",
628 .cpu_features = CPU_FTRS_740_NOTAU,
629 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
630 .mmu_features = MMU_FTR_HPTE_TABLE,
631 .icache_bsize = 32,
632 .dcache_bsize = 32,
633 .num_pmcs = 4,
634 .cpu_setup = __setup_cpu_750,
635 .machine_check = machine_check_generic,
636 .platform = "ppc750",
637 },
638 { /* 750CX (80100 and 8010x?) */
639 .pvr_mask = 0xfffffff0,
640 .pvr_value = 0x00080100,
641 .cpu_name = "750CX",
642 .cpu_features = CPU_FTRS_750,
643 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
644 .mmu_features = MMU_FTR_HPTE_TABLE,
645 .icache_bsize = 32,
646 .dcache_bsize = 32,
647 .num_pmcs = 4,
648 .cpu_setup = __setup_cpu_750cx,
649 .machine_check = machine_check_generic,
650 .platform = "ppc750",
651 },
652 { /* 750CX (82201 and 82202) */
653 .pvr_mask = 0xfffffff0,
654 .pvr_value = 0x00082200,
655 .cpu_name = "750CX",
656 .cpu_features = CPU_FTRS_750,
657 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
658 .mmu_features = MMU_FTR_HPTE_TABLE,
659 .icache_bsize = 32,
660 .dcache_bsize = 32,
661 .num_pmcs = 4,
662 .pmc_type = PPC_PMC_IBM,
663 .cpu_setup = __setup_cpu_750cx,
664 .machine_check = machine_check_generic,
665 .platform = "ppc750",
666 },
667 { /* 750CXe (82214) */
668 .pvr_mask = 0xfffffff0,
669 .pvr_value = 0x00082210,
670 .cpu_name = "750CXe",
671 .cpu_features = CPU_FTRS_750,
672 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
673 .mmu_features = MMU_FTR_HPTE_TABLE,
674 .icache_bsize = 32,
675 .dcache_bsize = 32,
676 .num_pmcs = 4,
677 .pmc_type = PPC_PMC_IBM,
678 .cpu_setup = __setup_cpu_750cx,
679 .machine_check = machine_check_generic,
680 .platform = "ppc750",
681 },
682 { /* 750CXe "Gekko" (83214) */
683 .pvr_mask = 0xffffffff,
684 .pvr_value = 0x00083214,
685 .cpu_name = "750CXe",
686 .cpu_features = CPU_FTRS_750,
687 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
688 .mmu_features = MMU_FTR_HPTE_TABLE,
689 .icache_bsize = 32,
690 .dcache_bsize = 32,
691 .num_pmcs = 4,
692 .pmc_type = PPC_PMC_IBM,
693 .cpu_setup = __setup_cpu_750cx,
694 .machine_check = machine_check_generic,
695 .platform = "ppc750",
696 },
697 { /* 750CL (and "Broadway") */
698 .pvr_mask = 0xfffff0e0,
699 .pvr_value = 0x00087000,
700 .cpu_name = "750CL",
701 .cpu_features = CPU_FTRS_750CL,
702 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
703 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
704 .icache_bsize = 32,
705 .dcache_bsize = 32,
706 .num_pmcs = 4,
707 .pmc_type = PPC_PMC_IBM,
708 .cpu_setup = __setup_cpu_750,
709 .machine_check = machine_check_generic,
710 .platform = "ppc750",
711 .oprofile_cpu_type = "ppc/750",
712 .oprofile_type = PPC_OPROFILE_G4,
713 },
714 { /* 745/755 */
715 .pvr_mask = 0xfffff000,
716 .pvr_value = 0x00083000,
717 .cpu_name = "745/755",
718 .cpu_features = CPU_FTRS_750,
719 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
720 .mmu_features = MMU_FTR_HPTE_TABLE,
721 .icache_bsize = 32,
722 .dcache_bsize = 32,
723 .num_pmcs = 4,
724 .pmc_type = PPC_PMC_IBM,
725 .cpu_setup = __setup_cpu_750,
726 .machine_check = machine_check_generic,
727 .platform = "ppc750",
728 },
729 { /* 750FX rev 1.x */
730 .pvr_mask = 0xffffff00,
731 .pvr_value = 0x70000100,
732 .cpu_name = "750FX",
733 .cpu_features = CPU_FTRS_750FX1,
734 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
735 .mmu_features = MMU_FTR_HPTE_TABLE,
736 .icache_bsize = 32,
737 .dcache_bsize = 32,
738 .num_pmcs = 4,
739 .pmc_type = PPC_PMC_IBM,
740 .cpu_setup = __setup_cpu_750,
741 .machine_check = machine_check_generic,
742 .platform = "ppc750",
743 .oprofile_cpu_type = "ppc/750",
744 .oprofile_type = PPC_OPROFILE_G4,
745 },
746 { /* 750FX rev 2.0 must disable HID0[DPM] */
747 .pvr_mask = 0xffffffff,
748 .pvr_value = 0x70000200,
749 .cpu_name = "750FX",
750 .cpu_features = CPU_FTRS_750FX2,
751 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
752 .mmu_features = MMU_FTR_HPTE_TABLE,
753 .icache_bsize = 32,
754 .dcache_bsize = 32,
755 .num_pmcs = 4,
756 .pmc_type = PPC_PMC_IBM,
757 .cpu_setup = __setup_cpu_750,
758 .machine_check = machine_check_generic,
759 .platform = "ppc750",
760 .oprofile_cpu_type = "ppc/750",
761 .oprofile_type = PPC_OPROFILE_G4,
762 },
763 { /* 750FX (All revs except 2.0) */
764 .pvr_mask = 0xffff0000,
765 .pvr_value = 0x70000000,
766 .cpu_name = "750FX",
767 .cpu_features = CPU_FTRS_750FX,
768 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
769 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
770 .icache_bsize = 32,
771 .dcache_bsize = 32,
772 .num_pmcs = 4,
773 .pmc_type = PPC_PMC_IBM,
774 .cpu_setup = __setup_cpu_750fx,
775 .machine_check = machine_check_generic,
776 .platform = "ppc750",
777 .oprofile_cpu_type = "ppc/750",
778 .oprofile_type = PPC_OPROFILE_G4,
779 },
780 { /* 750GX */
781 .pvr_mask = 0xffff0000,
782 .pvr_value = 0x70020000,
783 .cpu_name = "750GX",
784 .cpu_features = CPU_FTRS_750GX,
785 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
786 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
787 .icache_bsize = 32,
788 .dcache_bsize = 32,
789 .num_pmcs = 4,
790 .pmc_type = PPC_PMC_IBM,
791 .cpu_setup = __setup_cpu_750fx,
792 .machine_check = machine_check_generic,
793 .platform = "ppc750",
794 .oprofile_cpu_type = "ppc/750",
795 .oprofile_type = PPC_OPROFILE_G4,
796 },
797 { /* 740/750 (L2CR bit need fixup for 740) */
798 .pvr_mask = 0xffff0000,
799 .pvr_value = 0x00080000,
800 .cpu_name = "740/750",
801 .cpu_features = CPU_FTRS_740,
802 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
803 .mmu_features = MMU_FTR_HPTE_TABLE,
804 .icache_bsize = 32,
805 .dcache_bsize = 32,
806 .num_pmcs = 4,
807 .pmc_type = PPC_PMC_IBM,
808 .cpu_setup = __setup_cpu_750,
809 .machine_check = machine_check_generic,
810 .platform = "ppc750",
811 },
812 { /* 7400 rev 1.1 ? (no TAU) */
813 .pvr_mask = 0xffffffff,
814 .pvr_value = 0x000c1101,
815 .cpu_name = "7400 (1.1)",
816 .cpu_features = CPU_FTRS_7400_NOTAU,
817 .cpu_user_features = COMMON_USER |
818 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
819 .mmu_features = MMU_FTR_HPTE_TABLE,
820 .icache_bsize = 32,
821 .dcache_bsize = 32,
822 .num_pmcs = 4,
823 .pmc_type = PPC_PMC_G4,
824 .cpu_setup = __setup_cpu_7400,
825 .machine_check = machine_check_generic,
826 .platform = "ppc7400",
827 },
828 { /* 7400 */
829 .pvr_mask = 0xffff0000,
830 .pvr_value = 0x000c0000,
831 .cpu_name = "7400",
832 .cpu_features = CPU_FTRS_7400,
833 .cpu_user_features = COMMON_USER |
834 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
835 .mmu_features = MMU_FTR_HPTE_TABLE,
836 .icache_bsize = 32,
837 .dcache_bsize = 32,
838 .num_pmcs = 4,
839 .pmc_type = PPC_PMC_G4,
840 .cpu_setup = __setup_cpu_7400,
841 .machine_check = machine_check_generic,
842 .platform = "ppc7400",
843 },
844 { /* 7410 */
845 .pvr_mask = 0xffff0000,
846 .pvr_value = 0x800c0000,
847 .cpu_name = "7410",
848 .cpu_features = CPU_FTRS_7400,
849 .cpu_user_features = COMMON_USER |
850 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
851 .mmu_features = MMU_FTR_HPTE_TABLE,
852 .icache_bsize = 32,
853 .dcache_bsize = 32,
854 .num_pmcs = 4,
855 .pmc_type = PPC_PMC_G4,
856 .cpu_setup = __setup_cpu_7410,
857 .machine_check = machine_check_generic,
858 .platform = "ppc7400",
859 },
860 { /* 7450 2.0 - no doze/nap */
861 .pvr_mask = 0xffffffff,
862 .pvr_value = 0x80000200,
863 .cpu_name = "7450",
864 .cpu_features = CPU_FTRS_7450_20,
865 .cpu_user_features = COMMON_USER |
866 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
867 .mmu_features = MMU_FTR_HPTE_TABLE,
868 .icache_bsize = 32,
869 .dcache_bsize = 32,
870 .num_pmcs = 6,
871 .pmc_type = PPC_PMC_G4,
872 .cpu_setup = __setup_cpu_745x,
873 .oprofile_cpu_type = "ppc/7450",
874 .oprofile_type = PPC_OPROFILE_G4,
875 .machine_check = machine_check_generic,
876 .platform = "ppc7450",
877 },
878 { /* 7450 2.1 */
879 .pvr_mask = 0xffffffff,
880 .pvr_value = 0x80000201,
881 .cpu_name = "7450",
882 .cpu_features = CPU_FTRS_7450_21,
883 .cpu_user_features = COMMON_USER |
884 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
885 .mmu_features = MMU_FTR_HPTE_TABLE,
886 .icache_bsize = 32,
887 .dcache_bsize = 32,
888 .num_pmcs = 6,
889 .pmc_type = PPC_PMC_G4,
890 .cpu_setup = __setup_cpu_745x,
891 .oprofile_cpu_type = "ppc/7450",
892 .oprofile_type = PPC_OPROFILE_G4,
893 .machine_check = machine_check_generic,
894 .platform = "ppc7450",
895 },
896 { /* 7450 2.3 and newer */
897 .pvr_mask = 0xffff0000,
898 .pvr_value = 0x80000000,
899 .cpu_name = "7450",
900 .cpu_features = CPU_FTRS_7450_23,
901 .cpu_user_features = COMMON_USER |
902 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
903 .mmu_features = MMU_FTR_HPTE_TABLE,
904 .icache_bsize = 32,
905 .dcache_bsize = 32,
906 .num_pmcs = 6,
907 .pmc_type = PPC_PMC_G4,
908 .cpu_setup = __setup_cpu_745x,
909 .oprofile_cpu_type = "ppc/7450",
910 .oprofile_type = PPC_OPROFILE_G4,
911 .machine_check = machine_check_generic,
912 .platform = "ppc7450",
913 },
914 { /* 7455 rev 1.x */
915 .pvr_mask = 0xffffff00,
916 .pvr_value = 0x80010100,
917 .cpu_name = "7455",
918 .cpu_features = CPU_FTRS_7455_1,
919 .cpu_user_features = COMMON_USER |
920 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
921 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
922 .icache_bsize = 32,
923 .dcache_bsize = 32,
924 .num_pmcs = 6,
925 .pmc_type = PPC_PMC_G4,
926 .cpu_setup = __setup_cpu_745x,
927 .oprofile_cpu_type = "ppc/7450",
928 .oprofile_type = PPC_OPROFILE_G4,
929 .machine_check = machine_check_generic,
930 .platform = "ppc7450",
931 },
932 { /* 7455 rev 2.0 */
933 .pvr_mask = 0xffffffff,
934 .pvr_value = 0x80010200,
935 .cpu_name = "7455",
936 .cpu_features = CPU_FTRS_7455_20,
937 .cpu_user_features = COMMON_USER |
938 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
939 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
940 .icache_bsize = 32,
941 .dcache_bsize = 32,
942 .num_pmcs = 6,
943 .pmc_type = PPC_PMC_G4,
944 .cpu_setup = __setup_cpu_745x,
945 .oprofile_cpu_type = "ppc/7450",
946 .oprofile_type = PPC_OPROFILE_G4,
947 .machine_check = machine_check_generic,
948 .platform = "ppc7450",
949 },
950 { /* 7455 others */
951 .pvr_mask = 0xffff0000,
952 .pvr_value = 0x80010000,
953 .cpu_name = "7455",
954 .cpu_features = CPU_FTRS_7455,
955 .cpu_user_features = COMMON_USER |
956 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
957 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
958 .icache_bsize = 32,
959 .dcache_bsize = 32,
960 .num_pmcs = 6,
961 .pmc_type = PPC_PMC_G4,
962 .cpu_setup = __setup_cpu_745x,
963 .oprofile_cpu_type = "ppc/7450",
964 .oprofile_type = PPC_OPROFILE_G4,
965 .machine_check = machine_check_generic,
966 .platform = "ppc7450",
967 },
968 { /* 7447/7457 Rev 1.0 */
969 .pvr_mask = 0xffffffff,
970 .pvr_value = 0x80020100,
971 .cpu_name = "7447/7457",
972 .cpu_features = CPU_FTRS_7447_10,
973 .cpu_user_features = COMMON_USER |
974 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
975 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
976 .icache_bsize = 32,
977 .dcache_bsize = 32,
978 .num_pmcs = 6,
979 .pmc_type = PPC_PMC_G4,
980 .cpu_setup = __setup_cpu_745x,
981 .oprofile_cpu_type = "ppc/7450",
982 .oprofile_type = PPC_OPROFILE_G4,
983 .machine_check = machine_check_generic,
984 .platform = "ppc7450",
985 },
986 { /* 7447/7457 Rev 1.1 */
987 .pvr_mask = 0xffffffff,
988 .pvr_value = 0x80020101,
989 .cpu_name = "7447/7457",
990 .cpu_features = CPU_FTRS_7447_10,
991 .cpu_user_features = COMMON_USER |
992 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
993 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
994 .icache_bsize = 32,
995 .dcache_bsize = 32,
996 .num_pmcs = 6,
997 .pmc_type = PPC_PMC_G4,
998 .cpu_setup = __setup_cpu_745x,
999 .oprofile_cpu_type = "ppc/7450",
1000 .oprofile_type = PPC_OPROFILE_G4,
1001 .machine_check = machine_check_generic,
1002 .platform = "ppc7450",
1003 },
1004 { /* 7447/7457 Rev 1.2 and later */
1005 .pvr_mask = 0xffff0000,
1006 .pvr_value = 0x80020000,
1007 .cpu_name = "7447/7457",
1008 .cpu_features = CPU_FTRS_7447,
1009 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1010 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1011 .icache_bsize = 32,
1012 .dcache_bsize = 32,
1013 .num_pmcs = 6,
1014 .pmc_type = PPC_PMC_G4,
1015 .cpu_setup = __setup_cpu_745x,
1016 .oprofile_cpu_type = "ppc/7450",
1017 .oprofile_type = PPC_OPROFILE_G4,
1018 .machine_check = machine_check_generic,
1019 .platform = "ppc7450",
1020 },
1021 { /* 7447A */
1022 .pvr_mask = 0xffff0000,
1023 .pvr_value = 0x80030000,
1024 .cpu_name = "7447A",
1025 .cpu_features = CPU_FTRS_7447A,
1026 .cpu_user_features = COMMON_USER |
1027 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1028 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1029 .icache_bsize = 32,
1030 .dcache_bsize = 32,
1031 .num_pmcs = 6,
1032 .pmc_type = PPC_PMC_G4,
1033 .cpu_setup = __setup_cpu_745x,
1034 .oprofile_cpu_type = "ppc/7450",
1035 .oprofile_type = PPC_OPROFILE_G4,
1036 .machine_check = machine_check_generic,
1037 .platform = "ppc7450",
1038 },
1039 { /* 7448 */
1040 .pvr_mask = 0xffff0000,
1041 .pvr_value = 0x80040000,
1042 .cpu_name = "7448",
1043 .cpu_features = CPU_FTRS_7448,
1044 .cpu_user_features = COMMON_USER |
1045 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1046 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1047 .icache_bsize = 32,
1048 .dcache_bsize = 32,
1049 .num_pmcs = 6,
1050 .pmc_type = PPC_PMC_G4,
1051 .cpu_setup = __setup_cpu_745x,
1052 .oprofile_cpu_type = "ppc/7450",
1053 .oprofile_type = PPC_OPROFILE_G4,
1054 .machine_check = machine_check_generic,
1055 .platform = "ppc7450",
1056 },
1057 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1058 .pvr_mask = 0x7fff0000,
1059 .pvr_value = 0x00810000,
1060 .cpu_name = "82xx",
1061 .cpu_features = CPU_FTRS_82XX,
1062 .cpu_user_features = COMMON_USER,
1063 .mmu_features = 0,
1064 .icache_bsize = 32,
1065 .dcache_bsize = 32,
1066 .cpu_setup = __setup_cpu_603,
1067 .machine_check = machine_check_generic,
1068 .platform = "ppc603",
1069 },
1070 { /* All G2_LE (603e core, plus some) have the same pvr */
1071 .pvr_mask = 0x7fff0000,
1072 .pvr_value = 0x00820000,
1073 .cpu_name = "G2_LE",
1074 .cpu_features = CPU_FTRS_G2_LE,
1075 .cpu_user_features = COMMON_USER,
1076 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1077 .icache_bsize = 32,
1078 .dcache_bsize = 32,
1079 .cpu_setup = __setup_cpu_603,
1080 .machine_check = machine_check_generic,
1081 .platform = "ppc603",
1082 },
1083 { /* e300c1 (a 603e core, plus some) on 83xx */
1084 .pvr_mask = 0x7fff0000,
1085 .pvr_value = 0x00830000,
1086 .cpu_name = "e300c1",
1087 .cpu_features = CPU_FTRS_E300,
1088 .cpu_user_features = COMMON_USER,
1089 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1090 .icache_bsize = 32,
1091 .dcache_bsize = 32,
1092 .cpu_setup = __setup_cpu_603,
1093 .machine_check = machine_check_generic,
1094 .platform = "ppc603",
1095 },
1096 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1097 .pvr_mask = 0x7fff0000,
1098 .pvr_value = 0x00840000,
1099 .cpu_name = "e300c2",
1100 .cpu_features = CPU_FTRS_E300C2,
1101 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1102 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1103 MMU_FTR_NEED_DTLB_SW_LRU,
1104 .icache_bsize = 32,
1105 .dcache_bsize = 32,
1106 .cpu_setup = __setup_cpu_603,
1107 .machine_check = machine_check_generic,
1108 .platform = "ppc603",
1109 },
1110 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1111 .pvr_mask = 0x7fff0000,
1112 .pvr_value = 0x00850000,
1113 .cpu_name = "e300c3",
1114 .cpu_features = CPU_FTRS_E300,
1115 .cpu_user_features = COMMON_USER,
1116 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1117 MMU_FTR_NEED_DTLB_SW_LRU,
1118 .icache_bsize = 32,
1119 .dcache_bsize = 32,
1120 .cpu_setup = __setup_cpu_603,
1121 .num_pmcs = 4,
1122 .oprofile_cpu_type = "ppc/e300",
1123 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1124 .platform = "ppc603",
1125 },
1126 { /* e300c4 (e300c1, plus one IU) */
1127 .pvr_mask = 0x7fff0000,
1128 .pvr_value = 0x00860000,
1129 .cpu_name = "e300c4",
1130 .cpu_features = CPU_FTRS_E300,
1131 .cpu_user_features = COMMON_USER,
1132 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1133 MMU_FTR_NEED_DTLB_SW_LRU,
1134 .icache_bsize = 32,
1135 .dcache_bsize = 32,
1136 .cpu_setup = __setup_cpu_603,
1137 .machine_check = machine_check_generic,
1138 .num_pmcs = 4,
1139 .oprofile_cpu_type = "ppc/e300",
1140 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1141 .platform = "ppc603",
1142 },
1143 { /* default match, we assume split I/D cache & TB (non-601)... */
1144 .pvr_mask = 0x00000000,
1145 .pvr_value = 0x00000000,
1146 .cpu_name = "(generic PPC)",
1147 .cpu_features = CPU_FTRS_CLASSIC32,
1148 .cpu_user_features = COMMON_USER,
1149 .mmu_features = MMU_FTR_HPTE_TABLE,
1150 .icache_bsize = 32,
1151 .dcache_bsize = 32,
1152 .machine_check = machine_check_generic,
1153 .platform = "ppc603",
1154 },
1155 #endif /* CLASSIC_PPC */
1156 #ifdef CONFIG_8xx
1157 { /* 8xx */
1158 .pvr_mask = 0xffff0000,
1159 .pvr_value = 0x00500000,
1160 .cpu_name = "8xx",
1161 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1162 * if the 8xx code is there.... */
1163 .cpu_features = CPU_FTRS_8XX,
1164 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1165 .mmu_features = MMU_FTR_TYPE_8xx,
1166 .icache_bsize = 16,
1167 .dcache_bsize = 16,
1168 .platform = "ppc823",
1169 },
1170 #endif /* CONFIG_8xx */
1171 #ifdef CONFIG_40x
1172 { /* 403GC */
1173 .pvr_mask = 0xffffff00,
1174 .pvr_value = 0x00200200,
1175 .cpu_name = "403GC",
1176 .cpu_features = CPU_FTRS_40X,
1177 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1178 .mmu_features = MMU_FTR_TYPE_40x,
1179 .icache_bsize = 16,
1180 .dcache_bsize = 16,
1181 .machine_check = machine_check_4xx,
1182 .platform = "ppc403",
1183 },
1184 { /* 403GCX */
1185 .pvr_mask = 0xffffff00,
1186 .pvr_value = 0x00201400,
1187 .cpu_name = "403GCX",
1188 .cpu_features = CPU_FTRS_40X,
1189 .cpu_user_features = PPC_FEATURE_32 |
1190 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1191 .mmu_features = MMU_FTR_TYPE_40x,
1192 .icache_bsize = 16,
1193 .dcache_bsize = 16,
1194 .machine_check = machine_check_4xx,
1195 .platform = "ppc403",
1196 },
1197 { /* 403G ?? */
1198 .pvr_mask = 0xffff0000,
1199 .pvr_value = 0x00200000,
1200 .cpu_name = "403G ??",
1201 .cpu_features = CPU_FTRS_40X,
1202 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1203 .mmu_features = MMU_FTR_TYPE_40x,
1204 .icache_bsize = 16,
1205 .dcache_bsize = 16,
1206 .machine_check = machine_check_4xx,
1207 .platform = "ppc403",
1208 },
1209 { /* 405GP */
1210 .pvr_mask = 0xffff0000,
1211 .pvr_value = 0x40110000,
1212 .cpu_name = "405GP",
1213 .cpu_features = CPU_FTRS_40X,
1214 .cpu_user_features = PPC_FEATURE_32 |
1215 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1216 .mmu_features = MMU_FTR_TYPE_40x,
1217 .icache_bsize = 32,
1218 .dcache_bsize = 32,
1219 .machine_check = machine_check_4xx,
1220 .platform = "ppc405",
1221 },
1222 { /* STB 03xxx */
1223 .pvr_mask = 0xffff0000,
1224 .pvr_value = 0x40130000,
1225 .cpu_name = "STB03xxx",
1226 .cpu_features = CPU_FTRS_40X,
1227 .cpu_user_features = PPC_FEATURE_32 |
1228 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1229 .mmu_features = MMU_FTR_TYPE_40x,
1230 .icache_bsize = 32,
1231 .dcache_bsize = 32,
1232 .machine_check = machine_check_4xx,
1233 .platform = "ppc405",
1234 },
1235 { /* STB 04xxx */
1236 .pvr_mask = 0xffff0000,
1237 .pvr_value = 0x41810000,
1238 .cpu_name = "STB04xxx",
1239 .cpu_features = CPU_FTRS_40X,
1240 .cpu_user_features = PPC_FEATURE_32 |
1241 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1242 .mmu_features = MMU_FTR_TYPE_40x,
1243 .icache_bsize = 32,
1244 .dcache_bsize = 32,
1245 .machine_check = machine_check_4xx,
1246 .platform = "ppc405",
1247 },
1248 { /* NP405L */
1249 .pvr_mask = 0xffff0000,
1250 .pvr_value = 0x41610000,
1251 .cpu_name = "NP405L",
1252 .cpu_features = CPU_FTRS_40X,
1253 .cpu_user_features = PPC_FEATURE_32 |
1254 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1255 .mmu_features = MMU_FTR_TYPE_40x,
1256 .icache_bsize = 32,
1257 .dcache_bsize = 32,
1258 .machine_check = machine_check_4xx,
1259 .platform = "ppc405",
1260 },
1261 { /* NP4GS3 */
1262 .pvr_mask = 0xffff0000,
1263 .pvr_value = 0x40B10000,
1264 .cpu_name = "NP4GS3",
1265 .cpu_features = CPU_FTRS_40X,
1266 .cpu_user_features = PPC_FEATURE_32 |
1267 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1268 .mmu_features = MMU_FTR_TYPE_40x,
1269 .icache_bsize = 32,
1270 .dcache_bsize = 32,
1271 .machine_check = machine_check_4xx,
1272 .platform = "ppc405",
1273 },
1274 { /* NP405H */
1275 .pvr_mask = 0xffff0000,
1276 .pvr_value = 0x41410000,
1277 .cpu_name = "NP405H",
1278 .cpu_features = CPU_FTRS_40X,
1279 .cpu_user_features = PPC_FEATURE_32 |
1280 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1281 .mmu_features = MMU_FTR_TYPE_40x,
1282 .icache_bsize = 32,
1283 .dcache_bsize = 32,
1284 .machine_check = machine_check_4xx,
1285 .platform = "ppc405",
1286 },
1287 { /* 405GPr */
1288 .pvr_mask = 0xffff0000,
1289 .pvr_value = 0x50910000,
1290 .cpu_name = "405GPr",
1291 .cpu_features = CPU_FTRS_40X,
1292 .cpu_user_features = PPC_FEATURE_32 |
1293 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1294 .mmu_features = MMU_FTR_TYPE_40x,
1295 .icache_bsize = 32,
1296 .dcache_bsize = 32,
1297 .machine_check = machine_check_4xx,
1298 .platform = "ppc405",
1299 },
1300 { /* STBx25xx */
1301 .pvr_mask = 0xffff0000,
1302 .pvr_value = 0x51510000,
1303 .cpu_name = "STBx25xx",
1304 .cpu_features = CPU_FTRS_40X,
1305 .cpu_user_features = PPC_FEATURE_32 |
1306 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1307 .mmu_features = MMU_FTR_TYPE_40x,
1308 .icache_bsize = 32,
1309 .dcache_bsize = 32,
1310 .machine_check = machine_check_4xx,
1311 .platform = "ppc405",
1312 },
1313 { /* 405LP */
1314 .pvr_mask = 0xffff0000,
1315 .pvr_value = 0x41F10000,
1316 .cpu_name = "405LP",
1317 .cpu_features = CPU_FTRS_40X,
1318 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1319 .mmu_features = MMU_FTR_TYPE_40x,
1320 .icache_bsize = 32,
1321 .dcache_bsize = 32,
1322 .machine_check = machine_check_4xx,
1323 .platform = "ppc405",
1324 },
1325 { /* Xilinx Virtex-II Pro */
1326 .pvr_mask = 0xfffff000,
1327 .pvr_value = 0x20010000,
1328 .cpu_name = "Virtex-II Pro",
1329 .cpu_features = CPU_FTRS_40X,
1330 .cpu_user_features = PPC_FEATURE_32 |
1331 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1332 .mmu_features = MMU_FTR_TYPE_40x,
1333 .icache_bsize = 32,
1334 .dcache_bsize = 32,
1335 .machine_check = machine_check_4xx,
1336 .platform = "ppc405",
1337 },
1338 { /* Xilinx Virtex-4 FX */
1339 .pvr_mask = 0xfffff000,
1340 .pvr_value = 0x20011000,
1341 .cpu_name = "Virtex-4 FX",
1342 .cpu_features = CPU_FTRS_40X,
1343 .cpu_user_features = PPC_FEATURE_32 |
1344 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1345 .mmu_features = MMU_FTR_TYPE_40x,
1346 .icache_bsize = 32,
1347 .dcache_bsize = 32,
1348 .machine_check = machine_check_4xx,
1349 .platform = "ppc405",
1350 },
1351 { /* 405EP */
1352 .pvr_mask = 0xffff0000,
1353 .pvr_value = 0x51210000,
1354 .cpu_name = "405EP",
1355 .cpu_features = CPU_FTRS_40X,
1356 .cpu_user_features = PPC_FEATURE_32 |
1357 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1358 .mmu_features = MMU_FTR_TYPE_40x,
1359 .icache_bsize = 32,
1360 .dcache_bsize = 32,
1361 .machine_check = machine_check_4xx,
1362 .platform = "ppc405",
1363 },
1364 { /* 405EX Rev. A/B with Security */
1365 .pvr_mask = 0xffff000f,
1366 .pvr_value = 0x12910007,
1367 .cpu_name = "405EX Rev. A/B",
1368 .cpu_features = CPU_FTRS_40X,
1369 .cpu_user_features = PPC_FEATURE_32 |
1370 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1371 .mmu_features = MMU_FTR_TYPE_40x,
1372 .icache_bsize = 32,
1373 .dcache_bsize = 32,
1374 .machine_check = machine_check_4xx,
1375 .platform = "ppc405",
1376 },
1377 { /* 405EX Rev. C without Security */
1378 .pvr_mask = 0xffff000f,
1379 .pvr_value = 0x1291000d,
1380 .cpu_name = "405EX Rev. C",
1381 .cpu_features = CPU_FTRS_40X,
1382 .cpu_user_features = PPC_FEATURE_32 |
1383 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1384 .mmu_features = MMU_FTR_TYPE_40x,
1385 .icache_bsize = 32,
1386 .dcache_bsize = 32,
1387 .machine_check = machine_check_4xx,
1388 .platform = "ppc405",
1389 },
1390 { /* 405EX Rev. C with Security */
1391 .pvr_mask = 0xffff000f,
1392 .pvr_value = 0x1291000f,
1393 .cpu_name = "405EX Rev. C",
1394 .cpu_features = CPU_FTRS_40X,
1395 .cpu_user_features = PPC_FEATURE_32 |
1396 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1397 .mmu_features = MMU_FTR_TYPE_40x,
1398 .icache_bsize = 32,
1399 .dcache_bsize = 32,
1400 .machine_check = machine_check_4xx,
1401 .platform = "ppc405",
1402 },
1403 { /* 405EX Rev. D without Security */
1404 .pvr_mask = 0xffff000f,
1405 .pvr_value = 0x12910003,
1406 .cpu_name = "405EX Rev. D",
1407 .cpu_features = CPU_FTRS_40X,
1408 .cpu_user_features = PPC_FEATURE_32 |
1409 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1410 .mmu_features = MMU_FTR_TYPE_40x,
1411 .icache_bsize = 32,
1412 .dcache_bsize = 32,
1413 .machine_check = machine_check_4xx,
1414 .platform = "ppc405",
1415 },
1416 { /* 405EX Rev. D with Security */
1417 .pvr_mask = 0xffff000f,
1418 .pvr_value = 0x12910005,
1419 .cpu_name = "405EX Rev. D",
1420 .cpu_features = CPU_FTRS_40X,
1421 .cpu_user_features = PPC_FEATURE_32 |
1422 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1423 .mmu_features = MMU_FTR_TYPE_40x,
1424 .icache_bsize = 32,
1425 .dcache_bsize = 32,
1426 .machine_check = machine_check_4xx,
1427 .platform = "ppc405",
1428 },
1429 { /* 405EXr Rev. A/B without Security */
1430 .pvr_mask = 0xffff000f,
1431 .pvr_value = 0x12910001,
1432 .cpu_name = "405EXr Rev. A/B",
1433 .cpu_features = CPU_FTRS_40X,
1434 .cpu_user_features = PPC_FEATURE_32 |
1435 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1436 .mmu_features = MMU_FTR_TYPE_40x,
1437 .icache_bsize = 32,
1438 .dcache_bsize = 32,
1439 .machine_check = machine_check_4xx,
1440 .platform = "ppc405",
1441 },
1442 { /* 405EXr Rev. C without Security */
1443 .pvr_mask = 0xffff000f,
1444 .pvr_value = 0x12910009,
1445 .cpu_name = "405EXr Rev. C",
1446 .cpu_features = CPU_FTRS_40X,
1447 .cpu_user_features = PPC_FEATURE_32 |
1448 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1449 .mmu_features = MMU_FTR_TYPE_40x,
1450 .icache_bsize = 32,
1451 .dcache_bsize = 32,
1452 .machine_check = machine_check_4xx,
1453 .platform = "ppc405",
1454 },
1455 { /* 405EXr Rev. C with Security */
1456 .pvr_mask = 0xffff000f,
1457 .pvr_value = 0x1291000b,
1458 .cpu_name = "405EXr Rev. C",
1459 .cpu_features = CPU_FTRS_40X,
1460 .cpu_user_features = PPC_FEATURE_32 |
1461 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1462 .mmu_features = MMU_FTR_TYPE_40x,
1463 .icache_bsize = 32,
1464 .dcache_bsize = 32,
1465 .machine_check = machine_check_4xx,
1466 .platform = "ppc405",
1467 },
1468 { /* 405EXr Rev. D without Security */
1469 .pvr_mask = 0xffff000f,
1470 .pvr_value = 0x12910000,
1471 .cpu_name = "405EXr Rev. D",
1472 .cpu_features = CPU_FTRS_40X,
1473 .cpu_user_features = PPC_FEATURE_32 |
1474 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1475 .mmu_features = MMU_FTR_TYPE_40x,
1476 .icache_bsize = 32,
1477 .dcache_bsize = 32,
1478 .machine_check = machine_check_4xx,
1479 .platform = "ppc405",
1480 },
1481 { /* 405EXr Rev. D with Security */
1482 .pvr_mask = 0xffff000f,
1483 .pvr_value = 0x12910002,
1484 .cpu_name = "405EXr Rev. D",
1485 .cpu_features = CPU_FTRS_40X,
1486 .cpu_user_features = PPC_FEATURE_32 |
1487 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1488 .mmu_features = MMU_FTR_TYPE_40x,
1489 .icache_bsize = 32,
1490 .dcache_bsize = 32,
1491 .machine_check = machine_check_4xx,
1492 .platform = "ppc405",
1493 },
1494 {
1495 /* 405EZ */
1496 .pvr_mask = 0xffff0000,
1497 .pvr_value = 0x41510000,
1498 .cpu_name = "405EZ",
1499 .cpu_features = CPU_FTRS_40X,
1500 .cpu_user_features = PPC_FEATURE_32 |
1501 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1502 .mmu_features = MMU_FTR_TYPE_40x,
1503 .icache_bsize = 32,
1504 .dcache_bsize = 32,
1505 .machine_check = machine_check_4xx,
1506 .platform = "ppc405",
1507 },
1508 { /* default match */
1509 .pvr_mask = 0x00000000,
1510 .pvr_value = 0x00000000,
1511 .cpu_name = "(generic 40x PPC)",
1512 .cpu_features = CPU_FTRS_40X,
1513 .cpu_user_features = PPC_FEATURE_32 |
1514 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1515 .mmu_features = MMU_FTR_TYPE_40x,
1516 .icache_bsize = 32,
1517 .dcache_bsize = 32,
1518 .machine_check = machine_check_4xx,
1519 .platform = "ppc405",
1520 }
1521
1522 #endif /* CONFIG_40x */
1523 #ifdef CONFIG_44x
1524 {
1525 .pvr_mask = 0xf0000fff,
1526 .pvr_value = 0x40000850,
1527 .cpu_name = "440GR Rev. A",
1528 .cpu_features = CPU_FTRS_44X,
1529 .cpu_user_features = COMMON_USER_BOOKE,
1530 .mmu_features = MMU_FTR_TYPE_44x,
1531 .icache_bsize = 32,
1532 .dcache_bsize = 32,
1533 .machine_check = machine_check_4xx,
1534 .platform = "ppc440",
1535 },
1536 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1537 .pvr_mask = 0xf0000fff,
1538 .pvr_value = 0x40000858,
1539 .cpu_name = "440EP Rev. A",
1540 .cpu_features = CPU_FTRS_44X,
1541 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1542 .mmu_features = MMU_FTR_TYPE_44x,
1543 .icache_bsize = 32,
1544 .dcache_bsize = 32,
1545 .cpu_setup = __setup_cpu_440ep,
1546 .machine_check = machine_check_4xx,
1547 .platform = "ppc440",
1548 },
1549 {
1550 .pvr_mask = 0xf0000fff,
1551 .pvr_value = 0x400008d3,
1552 .cpu_name = "440GR Rev. B",
1553 .cpu_features = CPU_FTRS_44X,
1554 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1555 .mmu_features = MMU_FTR_TYPE_44x,
1556 .icache_bsize = 32,
1557 .dcache_bsize = 32,
1558 .machine_check = machine_check_4xx,
1559 .platform = "ppc440",
1560 },
1561 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1562 .pvr_mask = 0xf0000ff7,
1563 .pvr_value = 0x400008d4,
1564 .cpu_name = "440EP Rev. C",
1565 .cpu_features = CPU_FTRS_44X,
1566 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1567 .mmu_features = MMU_FTR_TYPE_44x,
1568 .icache_bsize = 32,
1569 .dcache_bsize = 32,
1570 .cpu_setup = __setup_cpu_440ep,
1571 .machine_check = machine_check_4xx,
1572 .platform = "ppc440",
1573 },
1574 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1575 .pvr_mask = 0xf0000fff,
1576 .pvr_value = 0x400008db,
1577 .cpu_name = "440EP Rev. B",
1578 .cpu_features = CPU_FTRS_44X,
1579 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1580 .mmu_features = MMU_FTR_TYPE_44x,
1581 .icache_bsize = 32,
1582 .dcache_bsize = 32,
1583 .cpu_setup = __setup_cpu_440ep,
1584 .machine_check = machine_check_4xx,
1585 .platform = "ppc440",
1586 },
1587 { /* 440GRX */
1588 .pvr_mask = 0xf0000ffb,
1589 .pvr_value = 0x200008D0,
1590 .cpu_name = "440GRX",
1591 .cpu_features = CPU_FTRS_44X,
1592 .cpu_user_features = COMMON_USER_BOOKE,
1593 .mmu_features = MMU_FTR_TYPE_44x,
1594 .icache_bsize = 32,
1595 .dcache_bsize = 32,
1596 .cpu_setup = __setup_cpu_440grx,
1597 .machine_check = machine_check_440A,
1598 .platform = "ppc440",
1599 },
1600 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1601 .pvr_mask = 0xf0000ffb,
1602 .pvr_value = 0x200008D8,
1603 .cpu_name = "440EPX",
1604 .cpu_features = CPU_FTRS_44X,
1605 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1606 .mmu_features = MMU_FTR_TYPE_44x,
1607 .icache_bsize = 32,
1608 .dcache_bsize = 32,
1609 .cpu_setup = __setup_cpu_440epx,
1610 .machine_check = machine_check_440A,
1611 .platform = "ppc440",
1612 },
1613 { /* 440GP Rev. B */
1614 .pvr_mask = 0xf0000fff,
1615 .pvr_value = 0x40000440,
1616 .cpu_name = "440GP Rev. B",
1617 .cpu_features = CPU_FTRS_44X,
1618 .cpu_user_features = COMMON_USER_BOOKE,
1619 .mmu_features = MMU_FTR_TYPE_44x,
1620 .icache_bsize = 32,
1621 .dcache_bsize = 32,
1622 .machine_check = machine_check_4xx,
1623 .platform = "ppc440gp",
1624 },
1625 { /* 440GP Rev. C */
1626 .pvr_mask = 0xf0000fff,
1627 .pvr_value = 0x40000481,
1628 .cpu_name = "440GP Rev. C",
1629 .cpu_features = CPU_FTRS_44X,
1630 .cpu_user_features = COMMON_USER_BOOKE,
1631 .mmu_features = MMU_FTR_TYPE_44x,
1632 .icache_bsize = 32,
1633 .dcache_bsize = 32,
1634 .machine_check = machine_check_4xx,
1635 .platform = "ppc440gp",
1636 },
1637 { /* 440GX Rev. A */
1638 .pvr_mask = 0xf0000fff,
1639 .pvr_value = 0x50000850,
1640 .cpu_name = "440GX Rev. A",
1641 .cpu_features = CPU_FTRS_44X,
1642 .cpu_user_features = COMMON_USER_BOOKE,
1643 .mmu_features = MMU_FTR_TYPE_44x,
1644 .icache_bsize = 32,
1645 .dcache_bsize = 32,
1646 .cpu_setup = __setup_cpu_440gx,
1647 .machine_check = machine_check_440A,
1648 .platform = "ppc440",
1649 },
1650 { /* 440GX Rev. B */
1651 .pvr_mask = 0xf0000fff,
1652 .pvr_value = 0x50000851,
1653 .cpu_name = "440GX Rev. B",
1654 .cpu_features = CPU_FTRS_44X,
1655 .cpu_user_features = COMMON_USER_BOOKE,
1656 .mmu_features = MMU_FTR_TYPE_44x,
1657 .icache_bsize = 32,
1658 .dcache_bsize = 32,
1659 .cpu_setup = __setup_cpu_440gx,
1660 .machine_check = machine_check_440A,
1661 .platform = "ppc440",
1662 },
1663 { /* 440GX Rev. C */
1664 .pvr_mask = 0xf0000fff,
1665 .pvr_value = 0x50000892,
1666 .cpu_name = "440GX Rev. C",
1667 .cpu_features = CPU_FTRS_44X,
1668 .cpu_user_features = COMMON_USER_BOOKE,
1669 .mmu_features = MMU_FTR_TYPE_44x,
1670 .icache_bsize = 32,
1671 .dcache_bsize = 32,
1672 .cpu_setup = __setup_cpu_440gx,
1673 .machine_check = machine_check_440A,
1674 .platform = "ppc440",
1675 },
1676 { /* 440GX Rev. F */
1677 .pvr_mask = 0xf0000fff,
1678 .pvr_value = 0x50000894,
1679 .cpu_name = "440GX Rev. F",
1680 .cpu_features = CPU_FTRS_44X,
1681 .cpu_user_features = COMMON_USER_BOOKE,
1682 .mmu_features = MMU_FTR_TYPE_44x,
1683 .icache_bsize = 32,
1684 .dcache_bsize = 32,
1685 .cpu_setup = __setup_cpu_440gx,
1686 .machine_check = machine_check_440A,
1687 .platform = "ppc440",
1688 },
1689 { /* 440SP Rev. A */
1690 .pvr_mask = 0xfff00fff,
1691 .pvr_value = 0x53200891,
1692 .cpu_name = "440SP Rev. A",
1693 .cpu_features = CPU_FTRS_44X,
1694 .cpu_user_features = COMMON_USER_BOOKE,
1695 .mmu_features = MMU_FTR_TYPE_44x,
1696 .icache_bsize = 32,
1697 .dcache_bsize = 32,
1698 .machine_check = machine_check_4xx,
1699 .platform = "ppc440",
1700 },
1701 { /* 440SPe Rev. A */
1702 .pvr_mask = 0xfff00fff,
1703 .pvr_value = 0x53400890,
1704 .cpu_name = "440SPe Rev. A",
1705 .cpu_features = CPU_FTRS_44X,
1706 .cpu_user_features = COMMON_USER_BOOKE,
1707 .mmu_features = MMU_FTR_TYPE_44x,
1708 .icache_bsize = 32,
1709 .dcache_bsize = 32,
1710 .cpu_setup = __setup_cpu_440spe,
1711 .machine_check = machine_check_440A,
1712 .platform = "ppc440",
1713 },
1714 { /* 440SPe Rev. B */
1715 .pvr_mask = 0xfff00fff,
1716 .pvr_value = 0x53400891,
1717 .cpu_name = "440SPe Rev. B",
1718 .cpu_features = CPU_FTRS_44X,
1719 .cpu_user_features = COMMON_USER_BOOKE,
1720 .mmu_features = MMU_FTR_TYPE_44x,
1721 .icache_bsize = 32,
1722 .dcache_bsize = 32,
1723 .cpu_setup = __setup_cpu_440spe,
1724 .machine_check = machine_check_440A,
1725 .platform = "ppc440",
1726 },
1727 { /* 440 in Xilinx Virtex-5 FXT */
1728 .pvr_mask = 0xfffffff0,
1729 .pvr_value = 0x7ff21910,
1730 .cpu_name = "440 in Virtex-5 FXT",
1731 .cpu_features = CPU_FTRS_44X,
1732 .cpu_user_features = COMMON_USER_BOOKE,
1733 .mmu_features = MMU_FTR_TYPE_44x,
1734 .icache_bsize = 32,
1735 .dcache_bsize = 32,
1736 .cpu_setup = __setup_cpu_440x5,
1737 .machine_check = machine_check_440A,
1738 .platform = "ppc440",
1739 },
1740 { /* 460EX */
1741 .pvr_mask = 0xffff0006,
1742 .pvr_value = 0x13020002,
1743 .cpu_name = "460EX",
1744 .cpu_features = CPU_FTRS_440x6,
1745 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1746 .mmu_features = MMU_FTR_TYPE_44x,
1747 .icache_bsize = 32,
1748 .dcache_bsize = 32,
1749 .cpu_setup = __setup_cpu_460ex,
1750 .machine_check = machine_check_440A,
1751 .platform = "ppc440",
1752 },
1753 { /* 460EX Rev B */
1754 .pvr_mask = 0xffff0007,
1755 .pvr_value = 0x13020004,
1756 .cpu_name = "460EX Rev. B",
1757 .cpu_features = CPU_FTRS_440x6,
1758 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1759 .mmu_features = MMU_FTR_TYPE_44x,
1760 .icache_bsize = 32,
1761 .dcache_bsize = 32,
1762 .cpu_setup = __setup_cpu_460ex,
1763 .machine_check = machine_check_440A,
1764 .platform = "ppc440",
1765 },
1766 { /* 460GT */
1767 .pvr_mask = 0xffff0006,
1768 .pvr_value = 0x13020000,
1769 .cpu_name = "460GT",
1770 .cpu_features = CPU_FTRS_440x6,
1771 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1772 .mmu_features = MMU_FTR_TYPE_44x,
1773 .icache_bsize = 32,
1774 .dcache_bsize = 32,
1775 .cpu_setup = __setup_cpu_460gt,
1776 .machine_check = machine_check_440A,
1777 .platform = "ppc440",
1778 },
1779 { /* 460GT Rev B */
1780 .pvr_mask = 0xffff0007,
1781 .pvr_value = 0x13020005,
1782 .cpu_name = "460GT Rev. B",
1783 .cpu_features = CPU_FTRS_440x6,
1784 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1785 .mmu_features = MMU_FTR_TYPE_44x,
1786 .icache_bsize = 32,
1787 .dcache_bsize = 32,
1788 .cpu_setup = __setup_cpu_460gt,
1789 .machine_check = machine_check_440A,
1790 .platform = "ppc440",
1791 },
1792 { /* 460SX */
1793 .pvr_mask = 0xffffff00,
1794 .pvr_value = 0x13541800,
1795 .cpu_name = "460SX",
1796 .cpu_features = CPU_FTRS_44X,
1797 .cpu_user_features = COMMON_USER_BOOKE,
1798 .mmu_features = MMU_FTR_TYPE_44x,
1799 .icache_bsize = 32,
1800 .dcache_bsize = 32,
1801 .cpu_setup = __setup_cpu_460sx,
1802 .machine_check = machine_check_440A,
1803 .platform = "ppc440",
1804 },
1805 { /* 464 in APM821xx */
1806 .pvr_mask = 0xffffff00,
1807 .pvr_value = 0x12C41C80,
1808 .cpu_name = "APM821XX",
1809 .cpu_features = CPU_FTRS_44X,
1810 .cpu_user_features = COMMON_USER_BOOKE |
1811 PPC_FEATURE_HAS_FPU,
1812 .mmu_features = MMU_FTR_TYPE_44x,
1813 .icache_bsize = 32,
1814 .dcache_bsize = 32,
1815 .cpu_setup = __setup_cpu_apm821xx,
1816 .machine_check = machine_check_440A,
1817 .platform = "ppc440",
1818 },
1819 { /* 476 DD2 core */
1820 .pvr_mask = 0xffffffff,
1821 .pvr_value = 0x11a52080,
1822 .cpu_name = "476",
1823 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1824 .cpu_user_features = COMMON_USER_BOOKE |
1825 PPC_FEATURE_HAS_FPU,
1826 .mmu_features = MMU_FTR_TYPE_47x |
1827 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1828 .icache_bsize = 32,
1829 .dcache_bsize = 128,
1830 .machine_check = machine_check_47x,
1831 .platform = "ppc470",
1832 },
1833 { /* 476 iss */
1834 .pvr_mask = 0xffff0000,
1835 .pvr_value = 0x00050000,
1836 .cpu_name = "476",
1837 .cpu_features = CPU_FTRS_47X,
1838 .cpu_user_features = COMMON_USER_BOOKE |
1839 PPC_FEATURE_HAS_FPU,
1840 .mmu_features = MMU_FTR_TYPE_47x |
1841 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1842 .icache_bsize = 32,
1843 .dcache_bsize = 128,
1844 .machine_check = machine_check_47x,
1845 .platform = "ppc470",
1846 },
1847 { /* 476 others */
1848 .pvr_mask = 0xffff0000,
1849 .pvr_value = 0x11a50000,
1850 .cpu_name = "476",
1851 .cpu_features = CPU_FTRS_47X,
1852 .cpu_user_features = COMMON_USER_BOOKE |
1853 PPC_FEATURE_HAS_FPU,
1854 .mmu_features = MMU_FTR_TYPE_47x |
1855 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1856 .icache_bsize = 32,
1857 .dcache_bsize = 128,
1858 .machine_check = machine_check_47x,
1859 .platform = "ppc470",
1860 },
1861 { /* default match */
1862 .pvr_mask = 0x00000000,
1863 .pvr_value = 0x00000000,
1864 .cpu_name = "(generic 44x PPC)",
1865 .cpu_features = CPU_FTRS_44X,
1866 .cpu_user_features = COMMON_USER_BOOKE,
1867 .mmu_features = MMU_FTR_TYPE_44x,
1868 .icache_bsize = 32,
1869 .dcache_bsize = 32,
1870 .machine_check = machine_check_4xx,
1871 .platform = "ppc440",
1872 }
1873 #endif /* CONFIG_44x */
1874 #ifdef CONFIG_E200
1875 { /* e200z5 */
1876 .pvr_mask = 0xfff00000,
1877 .pvr_value = 0x81000000,
1878 .cpu_name = "e200z5",
1879 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1880 .cpu_features = CPU_FTRS_E200,
1881 .cpu_user_features = COMMON_USER_BOOKE |
1882 PPC_FEATURE_HAS_EFP_SINGLE |
1883 PPC_FEATURE_UNIFIED_CACHE,
1884 .mmu_features = MMU_FTR_TYPE_FSL_E,
1885 .dcache_bsize = 32,
1886 .machine_check = machine_check_e200,
1887 .platform = "ppc5554",
1888 },
1889 { /* e200z6 */
1890 .pvr_mask = 0xfff00000,
1891 .pvr_value = 0x81100000,
1892 .cpu_name = "e200z6",
1893 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1894 .cpu_features = CPU_FTRS_E200,
1895 .cpu_user_features = COMMON_USER_BOOKE |
1896 PPC_FEATURE_HAS_SPE_COMP |
1897 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1898 PPC_FEATURE_UNIFIED_CACHE,
1899 .mmu_features = MMU_FTR_TYPE_FSL_E,
1900 .dcache_bsize = 32,
1901 .machine_check = machine_check_e200,
1902 .platform = "ppc5554",
1903 },
1904 { /* default match */
1905 .pvr_mask = 0x00000000,
1906 .pvr_value = 0x00000000,
1907 .cpu_name = "(generic E200 PPC)",
1908 .cpu_features = CPU_FTRS_E200,
1909 .cpu_user_features = COMMON_USER_BOOKE |
1910 PPC_FEATURE_HAS_EFP_SINGLE |
1911 PPC_FEATURE_UNIFIED_CACHE,
1912 .mmu_features = MMU_FTR_TYPE_FSL_E,
1913 .dcache_bsize = 32,
1914 .cpu_setup = __setup_cpu_e200,
1915 .machine_check = machine_check_e200,
1916 .platform = "ppc5554",
1917 }
1918 #endif /* CONFIG_E200 */
1919 #endif /* CONFIG_PPC32 */
1920 #ifdef CONFIG_E500
1921 #ifdef CONFIG_PPC32
1922 { /* e500 */
1923 .pvr_mask = 0xffff0000,
1924 .pvr_value = 0x80200000,
1925 .cpu_name = "e500",
1926 .cpu_features = CPU_FTRS_E500,
1927 .cpu_user_features = COMMON_USER_BOOKE |
1928 PPC_FEATURE_HAS_SPE_COMP |
1929 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1930 .mmu_features = MMU_FTR_TYPE_FSL_E,
1931 .icache_bsize = 32,
1932 .dcache_bsize = 32,
1933 .num_pmcs = 4,
1934 .oprofile_cpu_type = "ppc/e500",
1935 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1936 .cpu_setup = __setup_cpu_e500v1,
1937 .machine_check = machine_check_e500,
1938 .platform = "ppc8540",
1939 },
1940 { /* e500v2 */
1941 .pvr_mask = 0xffff0000,
1942 .pvr_value = 0x80210000,
1943 .cpu_name = "e500v2",
1944 .cpu_features = CPU_FTRS_E500_2,
1945 .cpu_user_features = COMMON_USER_BOOKE |
1946 PPC_FEATURE_HAS_SPE_COMP |
1947 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1948 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
1949 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
1950 .icache_bsize = 32,
1951 .dcache_bsize = 32,
1952 .num_pmcs = 4,
1953 .oprofile_cpu_type = "ppc/e500",
1954 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1955 .cpu_setup = __setup_cpu_e500v2,
1956 .machine_check = machine_check_e500,
1957 .platform = "ppc8548",
1958 },
1959 { /* e500mc */
1960 .pvr_mask = 0xffff0000,
1961 .pvr_value = 0x80230000,
1962 .cpu_name = "e500mc",
1963 .cpu_features = CPU_FTRS_E500MC,
1964 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1965 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1966 MMU_FTR_USE_TLBILX,
1967 .icache_bsize = 64,
1968 .dcache_bsize = 64,
1969 .num_pmcs = 4,
1970 .oprofile_cpu_type = "ppc/e500mc",
1971 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1972 .cpu_setup = __setup_cpu_e500mc,
1973 .machine_check = machine_check_e500mc,
1974 .platform = "ppce500mc",
1975 },
1976 #endif /* CONFIG_PPC32 */
1977 { /* e5500 */
1978 .pvr_mask = 0xffff0000,
1979 .pvr_value = 0x80240000,
1980 .cpu_name = "e5500",
1981 .cpu_features = CPU_FTRS_E5500,
1982 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1983 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
1984 MMU_FTR_USE_TLBILX,
1985 .icache_bsize = 64,
1986 .dcache_bsize = 64,
1987 .num_pmcs = 4,
1988 .oprofile_cpu_type = "ppc/e500mc",
1989 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1990 .cpu_setup = __setup_cpu_e5500,
1991 .cpu_restore = __restore_cpu_e5500,
1992 .machine_check = machine_check_e500mc,
1993 .platform = "ppce5500",
1994 },
1995 #ifdef CONFIG_PPC32
1996 { /* default match */
1997 .pvr_mask = 0x00000000,
1998 .pvr_value = 0x00000000,
1999 .cpu_name = "(generic E500 PPC)",
2000 .cpu_features = CPU_FTRS_E500,
2001 .cpu_user_features = COMMON_USER_BOOKE |
2002 PPC_FEATURE_HAS_SPE_COMP |
2003 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2004 .mmu_features = MMU_FTR_TYPE_FSL_E,
2005 .icache_bsize = 32,
2006 .dcache_bsize = 32,
2007 .machine_check = machine_check_e500,
2008 .platform = "powerpc",
2009 }
2010 #endif /* CONFIG_PPC32 */
2011 #endif /* CONFIG_E500 */
2012
2013 #ifdef CONFIG_PPC_A2
2014 { /* Standard A2 (>= DD2) + FPU core */
2015 .pvr_mask = 0xffff0000,
2016 .pvr_value = 0x00480000,
2017 .cpu_name = "A2 (>= DD2)",
2018 .cpu_features = CPU_FTRS_A2,
2019 .cpu_user_features = COMMON_USER_PPC64,
2020 .mmu_features = MMU_FTRS_A2,
2021 .icache_bsize = 64,
2022 .dcache_bsize = 64,
2023 .num_pmcs = 0,
2024 .cpu_setup = __setup_cpu_a2,
2025 .cpu_restore = __restore_cpu_a2,
2026 .machine_check = machine_check_generic,
2027 .platform = "ppca2",
2028 },
2029 { /* This is a default entry to get going, to be replaced by
2030 * a real one at some stage
2031 */
2032 #define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \
2033 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
2034 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
2035 .pvr_mask = 0x00000000,
2036 .pvr_value = 0x00000000,
2037 .cpu_name = "Book3E",
2038 .cpu_features = CPU_FTRS_BASE_BOOK3E,
2039 .cpu_user_features = COMMON_USER_PPC64,
2040 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
2041 MMU_FTR_USE_TLBIVAX_BCAST |
2042 MMU_FTR_LOCK_BCAST_INVAL,
2043 .icache_bsize = 64,
2044 .dcache_bsize = 64,
2045 .num_pmcs = 0,
2046 .machine_check = machine_check_generic,
2047 .platform = "power6",
2048 },
2049 #endif /* CONFIG_PPC_A2 */
2050 };
2051
2052 static struct cpu_spec the_cpu_spec;
2053
2054 static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
2055 struct cpu_spec *s)
2056 {
2057 struct cpu_spec *t = &the_cpu_spec;
2058 struct cpu_spec old;
2059
2060 t = PTRRELOC(t);
2061 old = *t;
2062
2063 /* Copy everything, then do fixups */
2064 *t = *s;
2065
2066 /*
2067 * If we are overriding a previous value derived from the real
2068 * PVR with a new value obtained using a logical PVR value,
2069 * don't modify the performance monitor fields.
2070 */
2071 if (old.num_pmcs && !s->num_pmcs) {
2072 t->num_pmcs = old.num_pmcs;
2073 t->pmc_type = old.pmc_type;
2074 t->oprofile_type = old.oprofile_type;
2075 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2076 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2077 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2078
2079 /*
2080 * If we have passed through this logic once before and
2081 * have pulled the default case because the real PVR was
2082 * not found inside cpu_specs[], then we are possibly
2083 * running in compatibility mode. In that case, let the
2084 * oprofiler know which set of compatibility counters to
2085 * pull from by making sure the oprofile_cpu_type string
2086 * is set to that of compatibility mode. If the
2087 * oprofile_cpu_type already has a value, then we are
2088 * possibly overriding a real PVR with a logical one,
2089 * and, in that case, keep the current value for
2090 * oprofile_cpu_type.
2091 */
2092 if (old.oprofile_cpu_type != NULL) {
2093 t->oprofile_cpu_type = old.oprofile_cpu_type;
2094 t->oprofile_type = old.oprofile_type;
2095 }
2096 }
2097
2098 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2099
2100 /*
2101 * Set the base platform string once; assumes
2102 * we're called with real pvr first.
2103 */
2104 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2105 *PTRRELOC(&powerpc_base_platform) = t->platform;
2106
2107 #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2108 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2109 * that processor. I will consolidate that at a later time, for now,
2110 * just use #ifdef. We also don't need to PTRRELOC the function
2111 * pointer on ppc64 and booke as we are running at 0 in real mode
2112 * on ppc64 and reloc_offset is always 0 on booke.
2113 */
2114 if (t->cpu_setup) {
2115 t->cpu_setup(offset, t);
2116 }
2117 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2118
2119 return t;
2120 }
2121
2122 struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2123 {
2124 struct cpu_spec *s = cpu_specs;
2125 int i;
2126
2127 s = PTRRELOC(s);
2128
2129 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2130 if ((pvr & s->pvr_mask) == s->pvr_value)
2131 return setup_cpu_spec(offset, s);
2132 }
2133
2134 BUG();
2135
2136 return NULL;
2137 }
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