arch/s390/include/asm/qdio.h

   1 /*
   2  * linux/include/asm-s390/qdio.h
   3  *
   4  * Copyright 2000,2008 IBM Corp.
   5  * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
   6  *            Jan Glauber <jang@linux.vnet.ibm.com>
   7  *
   8  */
   9 #ifndef __QDIO_H__
  10 #define __QDIO_H__
  11
  12 #include <linux/interrupt.h>
  13 #include <asm/cio.h>
  14 #include <asm/ccwdev.h>
  15
  16 /* only use 4 queues to save some cachelines */
  17 #define QDIO_MAX_QUEUES_PER_IRQ         4
  18 #define QDIO_MAX_BUFFERS_PER_Q          128
  19 #define QDIO_MAX_BUFFERS_MASK           (QDIO_MAX_BUFFERS_PER_Q - 1)
  20 #define QDIO_MAX_ELEMENTS_PER_BUFFER    16
  21 #define QDIO_SBAL_SIZE                  256
  22
  23 #define QDIO_QETH_QFMT                  0
  24 #define QDIO_ZFCP_QFMT                  1
  25 #define QDIO_IQDIO_QFMT                 2
  26
  27 /**
  28  * struct qdesfmt0 - queue descriptor, format 0
  29  * @sliba: storage list information block address
  30  * @sla: storage list address
  31  * @slsba: storage list state block address
  32  * @akey: access key for DLIB
  33  * @bkey: access key for SL
  34  * @ckey: access key for SBALs
  35  * @dkey: access key for SLSB
  36  */
  37 struct qdesfmt0 {
  38         u64 sliba;
  39         u64 sla;
  40         u64 slsba;
  41         u32      : 32;
  42         u32 akey : 4;
  43         u32 bkey : 4;
  44         u32 ckey : 4;
  45         u32 dkey : 4;
  46         u32      : 16;
  47 } __attribute__ ((packed));
  48
  49 /**
  50  * struct qdr - queue description record (QDR)
  51  * @qfmt: queue format
  52  * @pfmt: implementation dependent parameter format
  53  * @ac: adapter characteristics
  54  * @iqdcnt: input queue descriptor count
  55  * @oqdcnt: output queue descriptor count
  56  * @iqdsz: inpout queue descriptor size
  57  * @oqdsz: output queue descriptor size
  58  * @qiba: queue information block address
  59  * @qkey: queue information block key
  60  * @qdf0: queue descriptions
  61  */
  62 struct qdr {
  63         u32 qfmt   : 8;
  64         u32 pfmt   : 8;
  65         u32        : 8;
  66         u32 ac     : 8;
  67         u32        : 8;
  68         u32 iqdcnt : 8;
  69         u32        : 8;
  70         u32 oqdcnt : 8;
  71         u32        : 8;
  72         u32 iqdsz  : 8;
  73         u32        : 8;
  74         u32 oqdsz  : 8;
  75         /* private: */
  76         u32 res[9];
  77         /* public: */
  78         u64 qiba;
  79         u32        : 32;
  80         u32 qkey   : 4;
  81         u32        : 28;
  82         struct qdesfmt0 qdf0[126];
  83 } __attribute__ ((packed, aligned(4096)));
  84
  85 #define QIB_AC_OUTBOUND_PCI_SUPPORTED   0x40
  86 #define QIB_RFLAGS_ENABLE_QEBSM         0x80
  87 #define QIB_RFLAGS_ENABLE_DATA_DIV      0x02
  88
  89 /**
  90  * struct qib - queue information block (QIB)
  91  * @qfmt: queue format
  92  * @pfmt: implementation dependent parameter format
  93  * @rflags: QEBSM
  94  * @ac: adapter characteristics
  95  * @isliba: absolute address of first input SLIB
  96  * @osliba: absolute address of first output SLIB
  97  * @ebcnam: adapter identifier in EBCDIC
  98  * @parm: implementation dependent parameters
  99  */
 100 struct qib {
 101         u32 qfmt   : 8;
 102         u32 pfmt   : 8;
 103         u32 rflags : 8;
 104         u32 ac     : 8;
 105         u32        : 32;
 106         u64 isliba;
 107         u64 osliba;
 108         u32        : 32;
 109         u32        : 32;
 110         u8 ebcnam[8];
 111         /* private: */
 112         u8 res[88];
 113         /* public: */
 114         u8 parm[QDIO_MAX_BUFFERS_PER_Q];
 115 } __attribute__ ((packed, aligned(256)));
 116
 117 /**
 118  * struct slibe - storage list information block element (SLIBE)
 119  * @parms: implementation dependent parameters
 120  */
 121 struct slibe {
 122         u64 parms;
 123 };
 124
 125 /**
 126  * struct qaob - queue asynchronous operation block
 127  * @res0: reserved parameters
 128  * @res1: reserved parameter
 129  * @res2: reserved parameter
 130  * @res3: reserved parameter
 131  * @aorc: asynchronous operation return code
 132  * @flags: internal flags
 133  * @cbtbs: control block type
 134  * @sb_count: number of storage blocks
 135  * @sba: storage block element addresses
 136  * @dcount: size of storage block elements
 137  * @user0: user defineable value
 138  * @res4: reserved paramater
 139  * @user1: user defineable value
 140  * @user2: user defineable value
 141  */
 142 struct qaob {
 143         u64 res0[6];
 144         u8 res1;
 145         u8 res2;
 146         u8 res3;
 147         u8 aorc;
 148         u8 flags;
 149         u16 cbtbs;
 150         u8 sb_count;
 151         u64 sba[QDIO_MAX_ELEMENTS_PER_BUFFER];
 152         u16 dcount[QDIO_MAX_ELEMENTS_PER_BUFFER];
 153         u64 user0;
 154         u64 res4[2];
 155         u64 user1;
 156         u64 user2;
 157 } __attribute__ ((packed, aligned(256)));
 158
 159 /**
 160  * struct slib - storage list information block (SLIB)
 161  * @nsliba: next SLIB address (if any)
 162  * @sla: SL address
 163  * @slsba: SLSB address
 164  * @slibe: SLIB elements
 165  */
 166 struct slib {
 167         u64 nsliba;
 168         u64 sla;
 169         u64 slsba;
 170         /* private: */
 171         u8 res[1000];
 172         /* public: */
 173         struct slibe slibe[QDIO_MAX_BUFFERS_PER_Q];
 174 } __attribute__ ((packed, aligned(2048)));
 175
 176 #define SBAL_EFLAGS_LAST_ENTRY          0x40
 177 #define SBAL_EFLAGS_CONTIGUOUS          0x20
 178 #define SBAL_EFLAGS_FIRST_FRAG          0x04
 179 #define SBAL_EFLAGS_MIDDLE_FRAG         0x08
 180 #define SBAL_EFLAGS_LAST_FRAG           0x0c
 181 #define SBAL_EFLAGS_MASK                0x6f
 182
 183 #define SBAL_SFLAGS0_PCI_REQ            0x40
 184 #define SBAL_SFLAGS0_DATA_CONTINUATION  0x20
 185
 186 /* Awesome OpenFCP extensions */
 187 #define SBAL_SFLAGS0_TYPE_STATUS        0x00
 188 #define SBAL_SFLAGS0_TYPE_WRITE         0x08
 189 #define SBAL_SFLAGS0_TYPE_READ          0x10
 190 #define SBAL_SFLAGS0_TYPE_WRITE_READ    0x18
 191 #define SBAL_SFLAGS0_MORE_SBALS         0x04
 192 #define SBAL_SFLAGS0_COMMAND            0x02
 193 #define SBAL_SFLAGS0_LAST_SBAL          0x00
 194 #define SBAL_SFLAGS0_ONLY_SBAL          SBAL_SFLAGS0_COMMAND
 195 #define SBAL_SFLAGS0_MIDDLE_SBAL        SBAL_SFLAGS0_MORE_SBALS
 196 #define SBAL_SFLAGS0_FIRST_SBAL (SBAL_SFLAGS0_MORE_SBALS | SBAL_SFLAGS0_COMMAND)
 197
 198 /**
 199  * struct qdio_buffer_element - SBAL entry
 200  * @eflags: SBAL entry flags
 201  * @scount: SBAL count
 202  * @sflags: whole SBAL flags
 203  * @length: length
 204  * @addr: address
 205 */
 206 struct qdio_buffer_element {
 207         u8 eflags;
 208         /* private: */
 209         u8 res1;
 210         /* public: */
 211         u8 scount;
 212         u8 sflags;
 213         u32 length;
 214 #ifdef CONFIG_32BIT
 215         /* private: */
 216         void *res2;
 217         /* public: */
 218 #endif
 219         void *addr;
 220 } __attribute__ ((packed, aligned(16)));
 221
 222 /**
 223  * struct qdio_buffer - storage block address list (SBAL)
 224  * @element: SBAL entries
 225  */
 226 struct qdio_buffer {
 227         struct qdio_buffer_element element[QDIO_MAX_ELEMENTS_PER_BUFFER];
 228 } __attribute__ ((packed, aligned(256)));
 229
 230 /**
 231  * struct sl_element - storage list entry
 232  * @sbal: absolute SBAL address
 233  */
 234 struct sl_element {
 235 #ifdef CONFIG_32BIT
 236         /* private: */
 237         unsigned long reserved;
 238         /* public: */
 239 #endif
 240         unsigned long sbal;
 241 } __attribute__ ((packed));
 242
 243 /**
 244  * struct sl - storage list (SL)
 245  * @element: SL entries
 246  */
 247 struct sl {
 248         struct sl_element element[QDIO_MAX_BUFFERS_PER_Q];
 249 } __attribute__ ((packed, aligned(1024)));
 250
 251 /**
 252  * struct slsb - storage list state block (SLSB)
 253  * @val: state per buffer
 254  */
 255 struct slsb {
 256         u8 val[QDIO_MAX_BUFFERS_PER_Q];
 257 } __attribute__ ((packed, aligned(256)));
 258
 259 #define CHSC_AC2_DATA_DIV_AVAILABLE     0x0010
 260 #define CHSC_AC2_DATA_DIV_ENABLED       0x0002
 261
 262 /**
 263  * struct qdio_outbuf_state - SBAL related asynchronous operation information
 264  *   (for communication with upper layer programs)
 265  *   (only required for use with completion queues)
 266  * @flags: flags indicating state of buffer
 267  * @aob: pointer to QAOB used for the particular SBAL
 268  * @user: pointer to upper layer program's state information related to SBAL
 269  *        (stored in user1 data of QAOB)
 270  */
 271 struct qdio_outbuf_state {
 272         u8 flags;
 273         struct qaob *aob;
 274         void *user;
 275 };
 276
 277 #define QDIO_OUTBUF_STATE_FLAG_NONE     0x00
 278 #define QDIO_OUTBUF_STATE_FLAG_PENDING  0x01
 279
 280 #define CHSC_AC1_INITIATE_INPUTQ        0x80
 281
 282
 283 /* qdio adapter-characteristics-1 flag */
 284 #define AC1_SIGA_INPUT_NEEDED           0x40    /* process input queues */
 285 #define AC1_SIGA_OUTPUT_NEEDED          0x20    /* process output queues */
 286 #define AC1_SIGA_SYNC_NEEDED            0x10    /* ask hypervisor to sync */
 287 #define AC1_AUTOMATIC_SYNC_ON_THININT   0x08    /* set by hypervisor */
 288 #define AC1_AUTOMATIC_SYNC_ON_OUT_PCI   0x04    /* set by hypervisor */
 289 #define AC1_SC_QEBSM_AVAILABLE          0x02    /* available for subchannel */
 290 #define AC1_SC_QEBSM_ENABLED            0x01    /* enabled for subchannel */
 291
 292 #define CHSC_AC2_DATA_DIV_AVAILABLE     0x0010
 293 #define CHSC_AC2_DATA_DIV_ENABLED       0x0002
 294
 295 #define CHSC_AC3_FORMAT2_CQ_AVAILABLE   0x8000
 296
 297 struct qdio_ssqd_desc {
 298         u8 flags;
 299         u8:8;
 300         u16 sch;
 301         u8 qfmt;
 302         u8 parm;
 303         u8 qdioac1;
 304         u8 sch_class;
 305         u8 pcnt;
 306         u8 icnt;
 307         u8:8;
 308         u8 ocnt;
 309         u8:8;
 310         u8 mbccnt;
 311         u16 qdioac2;
 312         u64 sch_token;
 313         u8 mro;
 314         u8 mri;
 315         u16 qdioac3;
 316         u16:16;
 317         u8:8;
 318         u8 mmwc;
 319 } __attribute__ ((packed));
 320
 321 /* params are: ccw_device, qdio_error, queue_number,
 322    first element processed, number of elements processed, int_parm */
 323 typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
 324                             int, int, unsigned long);
 325
 326 /* qdio errors reported to the upper-layer program */
 327 #define QDIO_ERROR_SIGA_TARGET                  0x02
 328 #define QDIO_ERROR_SIGA_ACCESS_EXCEPTION        0x10
 329 #define QDIO_ERROR_SIGA_BUSY                    0x20
 330 #define QDIO_ERROR_ACTIVATE_CHECK_CONDITION     0x40
 331 #define QDIO_ERROR_SLSB_STATE                   0x80
 332
 333 /* for qdio_cleanup */
 334 #define QDIO_FLAG_CLEANUP_USING_CLEAR           0x01
 335 #define QDIO_FLAG_CLEANUP_USING_HALT            0x02
 336
 337 /**
 338  * struct qdio_initialize - qdio initalization data
 339  * @cdev: associated ccw device
 340  * @q_format: queue format
 341  * @adapter_name: name for the adapter
 342  * @qib_param_field_format: format for qib_parm_field
 343  * @qib_param_field: pointer to 128 bytes or NULL, if no param field
 344  * @qib_rflags: rflags to set
 345  * @input_slib_elements: pointer to no_input_qs * 128 words of data or NULL
 346  * @output_slib_elements: pointer to no_output_qs * 128 words of data or NULL
 347  * @no_input_qs: number of input queues
 348  * @no_output_qs: number of output queues
 349  * @input_handler: handler to be called for input queues
 350  * @output_handler: handler to be called for output queues
 351  * @queue_start_poll: polling handlers (one per input queue or NULL)
 352  * @int_parm: interruption parameter
 353  * @input_sbal_addr_array:  address of no_input_qs * 128 pointers
 354  * @output_sbal_addr_array: address of no_output_qs * 128 pointers
 355  * @output_sbal_state_array: no_output_qs * 128 state info (for CQ or NULL)
 356  */
 357 struct qdio_initialize {
 358         struct ccw_device *cdev;
 359         unsigned char q_format;
 360         unsigned char adapter_name[8];
 361         unsigned int qib_param_field_format;
 362         unsigned char *qib_param_field;
 363         unsigned char qib_rflags;
 364         unsigned long *input_slib_elements;
 365         unsigned long *output_slib_elements;
 366         unsigned int no_input_qs;
 367         unsigned int no_output_qs;
 368         qdio_handler_t *input_handler;
 369         qdio_handler_t *output_handler;
 370         void (**queue_start_poll) (struct ccw_device *, int, unsigned long);
 371         int scan_threshold;
 372         unsigned long int_parm;
 373         void **input_sbal_addr_array;
 374         void **output_sbal_addr_array;
 375         struct qdio_outbuf_state *output_sbal_state_array;
 376 };
 377
 378 #define QDIO_STATE_INACTIVE             0x00000002 /* after qdio_cleanup */
 379 #define QDIO_STATE_ESTABLISHED          0x00000004 /* after qdio_establish */
 380 #define QDIO_STATE_ACTIVE               0x00000008 /* after qdio_activate */
 381 #define QDIO_STATE_STOPPED              0x00000010 /* after queues went down */
 382
 383 #define QDIO_FLAG_SYNC_INPUT            0x01
 384 #define QDIO_FLAG_SYNC_OUTPUT           0x02
 385 #define QDIO_FLAG_PCI_OUT               0x10
 386
 387 extern int qdio_allocate(struct qdio_initialize *);
 388 extern int qdio_establish(struct qdio_initialize *);
 389 extern int qdio_activate(struct ccw_device *);
 390 extern void qdio_release_aob(struct qaob *);
 391 extern int do_QDIO(struct ccw_device *, unsigned int, int, unsigned int,
 392                    unsigned int);
 393 extern int qdio_start_irq(struct ccw_device *, int);
 394 extern int qdio_stop_irq(struct ccw_device *, int);
 395 extern int qdio_get_next_buffers(struct ccw_device *, int, int *, int *);
 396 extern int qdio_shutdown(struct ccw_device *, int);
 397 extern int qdio_free(struct ccw_device *);
 398 extern int qdio_get_ssqd_desc(struct ccw_device *, struct qdio_ssqd_desc *);
 399
 400 #endif /* __QDIO_H__ */