arch/x86/include/asm/uv/uv_bau.h

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * SGI UV Broadcast Assist Unit definitions
   7  *
   8  * Copyright (C) 2008-2011 Silicon Graphics, Inc. All rights reserved.
   9  */
  10
  11 #ifndef _ASM_X86_UV_UV_BAU_H
  12 #define _ASM_X86_UV_UV_BAU_H
  13
  14 #include <linux/bitmap.h>
  15 #define BITSPERBYTE 8
  16
  17 /*
  18  * Broadcast Assist Unit messaging structures
  19  *
  20  * Selective Broadcast activations are induced by software action
  21  * specifying a particular 8-descriptor "set" via a 6-bit index written
  22  * to an MMR.
  23  * Thus there are 64 unique 512-byte sets of SB descriptors - one set for
  24  * each 6-bit index value. These descriptor sets are mapped in sequence
  25  * starting with set 0 located at the address specified in the
  26  * BAU_SB_DESCRIPTOR_BASE register, set 1 is located at BASE + 512,
  27  * set 2 is at BASE + 2*512, set 3 at BASE + 3*512, and so on.
  28  *
  29  * We will use one set for sending BAU messages from each of the
  30  * cpu's on the uvhub.
  31  *
  32  * TLB shootdown will use the first of the 8 descriptors of each set.
  33  * Each of the descriptors is 64 bytes in size (8*64 = 512 bytes in a set).
  34  */
  35
  36 #define MAX_CPUS_PER_UVHUB              64
  37 #define MAX_CPUS_PER_SOCKET             32
  38 #define ADP_SZ                          64 /* hardware-provided max. */
  39 #define UV_CPUS_PER_AS                  32 /* hardware-provided max. */
  40 #define ITEMS_PER_DESC                  8
  41 /* the 'throttle' to prevent the hardware stay-busy bug */
  42 #define MAX_BAU_CONCURRENT              3
  43 #define UV_ACT_STATUS_MASK              0x3
  44 #define UV_ACT_STATUS_SIZE              2
  45 #define UV_DISTRIBUTION_SIZE            256
  46 #define UV_SW_ACK_NPENDING              8
  47 #define UV1_NET_ENDPOINT_INTD           0x38
  48 #define UV2_NET_ENDPOINT_INTD           0x28
  49 #define UV_NET_ENDPOINT_INTD            (is_uv1_hub() ?                 \
  50                         UV1_NET_ENDPOINT_INTD : UV2_NET_ENDPOINT_INTD)
  51 #define UV_DESC_PSHIFT                  49
  52 #define UV_PAYLOADQ_PNODE_SHIFT         49
  53 #define UV_PTC_BASENAME                 "sgi_uv/ptc_statistics"
  54 #define UV_BAU_BASENAME                 "sgi_uv/bau_tunables"
  55 #define UV_BAU_TUNABLES_DIR             "sgi_uv"
  56 #define UV_BAU_TUNABLES_FILE            "bau_tunables"
  57 #define WHITESPACE                      " \t\n"
  58 #define uv_physnodeaddr(x)              ((__pa((unsigned long)(x)) & uv_mmask))
  59 #define cpubit_isset(cpu, bau_local_cpumask) \
  60         test_bit((cpu), (bau_local_cpumask).bits)
  61
  62 /* [19:16] SOFT_ACK timeout period  19: 1 is urgency 7  17:16 1 is multiplier */
  63 /*
  64  * UV2: Bit 19 selects between
  65  *  (0): 10 microsecond timebase and
  66  *  (1): 80 microseconds
  67  *  we're using 655us, similar to UV1: 65 units of 10us
  68  */
  69 #define UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD (9UL)
  70 #define UV2_INTD_SOFT_ACK_TIMEOUT_PERIOD (15UL)
  71
  72 #define UV_INTD_SOFT_ACK_TIMEOUT_PERIOD (is_uv1_hub() ?                 \
  73                 UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD :                      \
  74                 UV2_INTD_SOFT_ACK_TIMEOUT_PERIOD)
  75
  76 #define BAU_MISC_CONTROL_MULT_MASK      3
  77
  78 #define UVH_AGING_PRESCALE_SEL          0x000000b000UL
  79 /* [30:28] URGENCY_7  an index into a table of times */
  80 #define BAU_URGENCY_7_SHIFT             28
  81 #define BAU_URGENCY_7_MASK              7
  82
  83 #define UVH_TRANSACTION_TIMEOUT         0x000000b200UL
  84 /* [45:40] BAU - BAU transaction timeout select - a multiplier */
  85 #define BAU_TRANS_SHIFT                 40
  86 #define BAU_TRANS_MASK                  0x3f
  87
  88 /*
  89  * shorten some awkward names
  90  */
  91 #define AS_PUSH_SHIFT UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT
  92 #define SOFTACK_MSHIFT UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT
  93 #define SOFTACK_PSHIFT UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT
  94 #define SOFTACK_TIMEOUT_PERIOD UV_INTD_SOFT_ACK_TIMEOUT_PERIOD
  95 #define write_gmmr      uv_write_global_mmr64
  96 #define write_lmmr      uv_write_local_mmr
  97 #define read_lmmr       uv_read_local_mmr
  98 #define read_gmmr       uv_read_global_mmr64
  99
 100 /*
 101  * bits in UVH_LB_BAU_SB_ACTIVATION_STATUS_0/1
 102  */
 103 #define DS_IDLE                         0
 104 #define DS_ACTIVE                       1
 105 #define DS_DESTINATION_TIMEOUT          2
 106 #define DS_SOURCE_TIMEOUT               3
 107 /*
 108  * bits put together from HRP_LB_BAU_SB_ACTIVATION_STATUS_0/1/2
 109  * values 1 and 3 will not occur
 110  *        Decoded meaning              ERROR  BUSY    AUX ERR
 111  * -------------------------------     ----   -----   -------
 112  * IDLE                                 0       0        0
 113  * BUSY (active)                        0       1        0
 114  * SW Ack Timeout (destination)         1       0        0
 115  * SW Ack INTD rejected (strong NACK)   1       0        1
 116  * Source Side Time Out Detected        1       1        0
 117  * Destination Side PUT Failed          1       1        1
 118  */
 119 #define UV2H_DESC_IDLE                  0
 120 #define UV2H_DESC_BUSY                  2
 121 #define UV2H_DESC_DEST_TIMEOUT          4
 122 #define UV2H_DESC_DEST_STRONG_NACK      5
 123 #define UV2H_DESC_SOURCE_TIMEOUT        6
 124 #define UV2H_DESC_DEST_PUT_ERR          7
 125
 126 /*
 127  * delay for 'plugged' timeout retries, in microseconds
 128  */
 129 #define PLUGGED_DELAY                   10
 130
 131 /*
 132  * threshholds at which to use IPI to free resources
 133  */
 134 /* after this # consecutive 'plugged' timeouts, use IPI to release resources */
 135 #define PLUGSB4RESET                    100
 136 /* after this many consecutive timeouts, use IPI to release resources */
 137 #define TIMEOUTSB4RESET                 1
 138 /* at this number uses of IPI to release resources, giveup the request */
 139 #define IPI_RESET_LIMIT                 1
 140 /* after this # consecutive successes, bump up the throttle if it was lowered */
 141 #define COMPLETE_THRESHOLD              5
 142
 143 #define UV_LB_SUBNODEID                 0x10
 144
 145 /* these two are the same for UV1 and UV2: */
 146 #define UV_SA_SHFT UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT
 147 #define UV_SA_MASK UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_MASK
 148 /* 4 bits of software ack period */
 149 #define UV2_ACK_MASK                    0x7UL
 150 #define UV2_ACK_UNITS_SHFT              3
 151 #define UV2_LEG_SHFT UV2H_LB_BAU_MISC_CONTROL_USE_LEGACY_DESCRIPTOR_FORMATS_SHFT
 152 #define UV2_EXT_SHFT UV2H_LB_BAU_MISC_CONTROL_ENABLE_EXTENDED_SB_STATUS_SHFT
 153
 154 /*
 155  * number of entries in the destination side payload queue
 156  */
 157 #define DEST_Q_SIZE                     20
 158 /*
 159  * number of destination side software ack resources
 160  */
 161 #define DEST_NUM_RESOURCES              8
 162 /*
 163  * completion statuses for sending a TLB flush message
 164  */
 165 #define FLUSH_RETRY_PLUGGED             1
 166 #define FLUSH_RETRY_TIMEOUT             2
 167 #define FLUSH_GIVEUP                    3
 168 #define FLUSH_COMPLETE                  4
 169
 170 /*
 171  * tuning the action when the numalink network is extremely delayed
 172  */
 173 #define CONGESTED_RESPONSE_US           1000    /* 'long' response time, in
 174                                                    microseconds */
 175 #define CONGESTED_REPS                  10      /* long delays averaged over
 176                                                    this many broadcasts */
 177 #define CONGESTED_PERIOD                30      /* time for the bau to be
 178                                                    disabled, in seconds */
 179 /* see msg_type: */
 180 #define MSG_NOOP                        0
 181 #define MSG_REGULAR                     1
 182 #define MSG_RETRY                       2
 183
 184 /*
 185  * Distribution: 32 bytes (256 bits) (bytes 0-0x1f of descriptor)
 186  * If the 'multilevel' flag in the header portion of the descriptor
 187  * has been set to 0, then endpoint multi-unicast mode is selected.
 188  * The distribution specification (32 bytes) is interpreted as a 256-bit
 189  * distribution vector. Adjacent bits correspond to consecutive even numbered
 190  * nodeIDs. The result of adding the index of a given bit to the 15-bit
 191  * 'base_dest_nasid' field of the header corresponds to the
 192  * destination nodeID associated with that specified bit.
 193  */
 194 struct pnmask {
 195         unsigned long           bits[BITS_TO_LONGS(UV_DISTRIBUTION_SIZE)];
 196 };
 197
 198 /*
 199  * mask of cpu's on a uvhub
 200  * (during initialization we need to check that unsigned long has
 201  *  enough bits for max. cpu's per uvhub)
 202  */
 203 struct bau_local_cpumask {
 204         unsigned long           bits;
 205 };
 206
 207 /*
 208  * Payload: 16 bytes (128 bits) (bytes 0x20-0x2f of descriptor)
 209  * only 12 bytes (96 bits) of the payload area are usable.
 210  * An additional 3 bytes (bits 27:4) of the header address are carried
 211  * to the next bytes of the destination payload queue.
 212  * And an additional 2 bytes of the header Suppl_A field are also
 213  * carried to the destination payload queue.
 214  * But the first byte of the Suppl_A becomes bits 127:120 (the 16th byte)
 215  * of the destination payload queue, which is written by the hardware
 216  * with the s/w ack resource bit vector.
 217  * [ effective message contents (16 bytes (128 bits) maximum), not counting
 218  *   the s/w ack bit vector  ]
 219  */
 220
 221 /*
 222  * The payload is software-defined for INTD transactions
 223  */
 224 struct bau_msg_payload {
 225         unsigned long   address;                /* signifies a page or all
 226                                                    TLB's of the cpu */
 227         /* 64 bits */
 228         unsigned short  sending_cpu;            /* filled in by sender */
 229         /* 16 bits */
 230         unsigned short  acknowledge_count;      /* filled in by destination */
 231         /* 16 bits */
 232         unsigned int    reserved1:32;           /* not usable */
 233 };
 234
 235
 236 /*
 237  * Message header:  16 bytes (128 bits) (bytes 0x30-0x3f of descriptor)
 238  * see table 4.2.3.0.1 in broacast_assist spec.
 239  */
 240 struct bau_msg_header {
 241         unsigned int    dest_subnodeid:6;       /* must be 0x10, for the LB */
 242         /* bits 5:0 */
 243         unsigned int    base_dest_nasid:15;     /* nasid of the first bit */
 244         /* bits 20:6 */                         /* in uvhub map */
 245         unsigned int    command:8;              /* message type */
 246         /* bits 28:21 */
 247         /* 0x38: SN3net EndPoint Message */
 248         unsigned int    rsvd_1:3;               /* must be zero */
 249         /* bits 31:29 */
 250         /* int will align on 32 bits */
 251         unsigned int    rsvd_2:9;               /* must be zero */
 252         /* bits 40:32 */
 253         /* Suppl_A is 56-41 */
 254         unsigned int    sequence:16;            /* message sequence number */
 255         /* bits 56:41 */                        /* becomes bytes 16-17 of msg */
 256                                                 /* Address field (96:57) is
 257                                                    never used as an address
 258                                                    (these are address bits
 259                                                    42:3) */
 260
 261         unsigned int    rsvd_3:1;               /* must be zero */
 262         /* bit 57 */
 263         /* address bits 27:4 are payload */
 264         /* these next 24  (58-81) bits become bytes 12-14 of msg */
 265         /* bits 65:58 land in byte 12 */
 266         unsigned int    replied_to:1;           /* sent as 0 by the source to
 267                                                    byte 12 */
 268         /* bit 58 */
 269         unsigned int    msg_type:3;             /* software type of the
 270                                                    message */
 271         /* bits 61:59 */
 272         unsigned int    canceled:1;             /* message canceled, resource
 273                                                    is to be freed*/
 274         /* bit 62 */
 275         unsigned int    payload_1a:1;           /* not currently used */
 276         /* bit 63 */
 277         unsigned int    payload_1b:2;           /* not currently used */
 278         /* bits 65:64 */
 279
 280         /* bits 73:66 land in byte 13 */
 281         unsigned int    payload_1ca:6;          /* not currently used */
 282         /* bits 71:66 */
 283         unsigned int    payload_1c:2;           /* not currently used */
 284         /* bits 73:72 */
 285
 286         /* bits 81:74 land in byte 14 */
 287         unsigned int    payload_1d:6;           /* not currently used */
 288         /* bits 79:74 */
 289         unsigned int    payload_1e:2;           /* not currently used */
 290         /* bits 81:80 */
 291
 292         unsigned int    rsvd_4:7;               /* must be zero */
 293         /* bits 88:82 */
 294         unsigned int    swack_flag:1;           /* software acknowledge flag */
 295         /* bit 89 */
 296                                                 /* INTD trasactions at
 297                                                    destination are to wait for
 298                                                    software acknowledge */
 299         unsigned int    rsvd_5:6;               /* must be zero */
 300         /* bits 95:90 */
 301         unsigned int    rsvd_6:5;               /* must be zero */
 302         /* bits 100:96 */
 303         unsigned int    int_both:1;             /* if 1, interrupt both sockets
 304                                                    on the uvhub */
 305         /* bit 101*/
 306         unsigned int    fairness:3;             /* usually zero */
 307         /* bits 104:102 */
 308         unsigned int    multilevel:1;           /* multi-level multicast
 309                                                    format */
 310         /* bit 105 */
 311         /* 0 for TLB: endpoint multi-unicast messages */
 312         unsigned int    chaining:1;             /* next descriptor is part of
 313                                                    this activation*/
 314         /* bit 106 */
 315         unsigned int    rsvd_7:21;              /* must be zero */
 316         /* bits 127:107 */
 317 };
 318
 319 /*
 320  * The activation descriptor:
 321  * The format of the message to send, plus all accompanying control
 322  * Should be 64 bytes
 323  */
 324 struct bau_desc {
 325         struct pnmask                   distribution;
 326         /*
 327          * message template, consisting of header and payload:
 328          */
 329         struct bau_msg_header           header;
 330         struct bau_msg_payload          payload;
 331 };
 332 /*
 333  *   -payload--    ---------header------
 334  *   bytes 0-11    bits 41-56  bits 58-81
 335  *       A           B  (2)      C (3)
 336  *
 337  *            A/B/C are moved to:
 338  *       A            C          B
 339  *   bytes 0-11  bytes 12-14  bytes 16-17  (byte 15 filled in by hw as vector)
 340  *   ------------payload queue-----------
 341  */
 342
 343 /*
 344  * The payload queue on the destination side is an array of these.
 345  * With BAU_MISC_CONTROL set for software acknowledge mode, the messages
 346  * are 32 bytes (2 micropackets) (256 bits) in length, but contain only 17
 347  * bytes of usable data, including the sw ack vector in byte 15 (bits 127:120)
 348  * (12 bytes come from bau_msg_payload, 3 from payload_1, 2 from
 349  *  swack_vec and payload_2)
 350  * "Enabling Software Acknowledgment mode (see Section 4.3.3 Software
 351  *  Acknowledge Processing) also selects 32 byte (17 bytes usable) payload
 352  *  operation."
 353  */
 354 struct bau_pq_entry {
 355         unsigned long   address;        /* signifies a page or all TLB's
 356                                            of the cpu */
 357         /* 64 bits, bytes 0-7 */
 358         unsigned short  sending_cpu;    /* cpu that sent the message */
 359         /* 16 bits, bytes 8-9 */
 360         unsigned short  acknowledge_count; /* filled in by destination */
 361         /* 16 bits, bytes 10-11 */
 362         /* these next 3 bytes come from bits 58-81 of the message header */
 363         unsigned short  replied_to:1;   /* sent as 0 by the source */
 364         unsigned short  msg_type:3;     /* software message type */
 365         unsigned short  canceled:1;     /* sent as 0 by the source */
 366         unsigned short  unused1:3;      /* not currently using */
 367         /* byte 12 */
 368         unsigned char   unused2a;       /* not currently using */
 369         /* byte 13 */
 370         unsigned char   unused2;        /* not currently using */
 371         /* byte 14 */
 372         unsigned char   swack_vec;      /* filled in by the hardware */
 373         /* byte 15 (bits 127:120) */
 374         unsigned short  sequence;       /* message sequence number */
 375         /* bytes 16-17 */
 376         unsigned char   unused4[2];     /* not currently using bytes 18-19 */
 377         /* bytes 18-19 */
 378         int             number_of_cpus; /* filled in at destination */
 379         /* 32 bits, bytes 20-23 (aligned) */
 380         unsigned char   unused5[8];     /* not using */
 381         /* bytes 24-31 */
 382 };
 383
 384 struct msg_desc {
 385         struct bau_pq_entry     *msg;
 386         int                     msg_slot;
 387         int                     swack_slot;
 388         struct bau_pq_entry     *queue_first;
 389         struct bau_pq_entry     *queue_last;
 390 };
 391
 392 struct reset_args {
 393         int                     sender;
 394 };
 395
 396 /*
 397  * This structure is allocated per_cpu for UV TLB shootdown statistics.
 398  */
 399 struct ptc_stats {
 400         /* sender statistics */
 401         unsigned long   s_giveup;               /* number of fall backs to
 402                                                    IPI-style flushes */
 403         unsigned long   s_requestor;            /* number of shootdown
 404                                                    requests */
 405         unsigned long   s_stimeout;             /* source side timeouts */
 406         unsigned long   s_dtimeout;             /* destination side timeouts */
 407         unsigned long   s_time;                 /* time spent in sending side */
 408         unsigned long   s_retriesok;            /* successful retries */
 409         unsigned long   s_ntargcpu;             /* total number of cpu's
 410                                                    targeted */
 411         unsigned long   s_ntargself;            /* times the sending cpu was
 412                                                    targeted */
 413         unsigned long   s_ntarglocals;          /* targets of cpus on the local
 414                                                    blade */
 415         unsigned long   s_ntargremotes;         /* targets of cpus on remote
 416                                                    blades */
 417         unsigned long   s_ntarglocaluvhub;      /* targets of the local hub */
 418         unsigned long   s_ntargremoteuvhub;     /* remotes hubs targeted */
 419         unsigned long   s_ntarguvhub;           /* total number of uvhubs
 420                                                    targeted */
 421         unsigned long   s_ntarguvhub16;         /* number of times target
 422                                                    hubs >= 16*/
 423         unsigned long   s_ntarguvhub8;          /* number of times target
 424                                                    hubs >= 8 */
 425         unsigned long   s_ntarguvhub4;          /* number of times target
 426                                                    hubs >= 4 */
 427         unsigned long   s_ntarguvhub2;          /* number of times target
 428                                                    hubs >= 2 */
 429         unsigned long   s_ntarguvhub1;          /* number of times target
 430                                                    hubs == 1 */
 431         unsigned long   s_resets_plug;          /* ipi-style resets from plug
 432                                                    state */
 433         unsigned long   s_resets_timeout;       /* ipi-style resets from
 434                                                    timeouts */
 435         unsigned long   s_busy;                 /* status stayed busy past
 436                                                    s/w timer */
 437         unsigned long   s_throttles;            /* waits in throttle */
 438         unsigned long   s_retry_messages;       /* retry broadcasts */
 439         unsigned long   s_bau_reenabled;        /* for bau enable/disable */
 440         unsigned long   s_bau_disabled;         /* for bau enable/disable */
 441         /* destination statistics */
 442         unsigned long   d_alltlb;               /* times all tlb's on this
 443                                                    cpu were flushed */
 444         unsigned long   d_onetlb;               /* times just one tlb on this
 445                                                    cpu was flushed */
 446         unsigned long   d_multmsg;              /* interrupts with multiple
 447                                                    messages */
 448         unsigned long   d_nomsg;                /* interrupts with no message */
 449         unsigned long   d_time;                 /* time spent on destination
 450                                                    side */
 451         unsigned long   d_requestee;            /* number of messages
 452                                                    processed */
 453         unsigned long   d_retries;              /* number of retry messages
 454                                                    processed */
 455         unsigned long   d_canceled;             /* number of messages canceled
 456                                                    by retries */
 457         unsigned long   d_nocanceled;           /* retries that found nothing
 458                                                    to cancel */
 459         unsigned long   d_resets;               /* number of ipi-style requests
 460                                                    processed */
 461         unsigned long   d_rcanceled;            /* number of messages canceled
 462                                                    by resets */
 463 };
 464
 465 struct tunables {
 466         int                     *tunp;
 467         int                     deflt;
 468 };
 469
 470 struct hub_and_pnode {
 471         short                   uvhub;
 472         short                   pnode;
 473 };
 474
 475 struct socket_desc {
 476         short                   num_cpus;
 477         short                   cpu_number[MAX_CPUS_PER_SOCKET];
 478 };
 479
 480 struct uvhub_desc {
 481         unsigned short          socket_mask;
 482         short                   num_cpus;
 483         short                   uvhub;
 484         short                   pnode;
 485         struct socket_desc      socket[2];
 486 };
 487
 488 /*
 489  * one per-cpu; to locate the software tables
 490  */
 491 struct bau_control {
 492         struct bau_desc         *descriptor_base;
 493         struct bau_pq_entry     *queue_first;
 494         struct bau_pq_entry     *queue_last;
 495         struct bau_pq_entry     *bau_msg_head;
 496         struct bau_control      *uvhub_master;
 497         struct bau_control      *socket_master;
 498         struct ptc_stats        *statp;
 499         cpumask_t               *cpumask;
 500         unsigned long           timeout_interval;
 501         unsigned long           set_bau_on_time;
 502         atomic_t                active_descriptor_count;
 503         int                     plugged_tries;
 504         int                     timeout_tries;
 505         int                     ipi_attempts;
 506         int                     conseccompletes;
 507         int                     baudisabled;
 508         int                     set_bau_off;
 509         short                   cpu;
 510         short                   osnode;
 511         short                   uvhub_cpu;
 512         short                   uvhub;
 513         short                   cpus_in_socket;
 514         short                   cpus_in_uvhub;
 515         short                   partition_base_pnode;
 516         unsigned short          message_number;
 517         unsigned short          uvhub_quiesce;
 518         short                   socket_acknowledge_count[DEST_Q_SIZE];
 519         cycles_t                send_message;
 520         spinlock_t              uvhub_lock;
 521         spinlock_t              queue_lock;
 522         /* tunables */
 523         int                     max_concurr;
 524         int                     max_concurr_const;
 525         int                     plugged_delay;
 526         int                     plugsb4reset;
 527         int                     timeoutsb4reset;
 528         int                     ipi_reset_limit;
 529         int                     complete_threshold;
 530         int                     cong_response_us;
 531         int                     cong_reps;
 532         int                     cong_period;
 533         cycles_t                period_time;
 534         long                    period_requests;
 535         struct hub_and_pnode    *thp;
 536 };
 537
 538 static inline unsigned long read_mmr_uv2_status(void)
 539 {
 540         return read_lmmr(UV2H_LB_BAU_SB_ACTIVATION_STATUS_2);
 541 }
 542
 543 static inline void write_mmr_data_broadcast(int pnode, unsigned long mmr_image)
 544 {
 545         write_gmmr(pnode, UVH_BAU_DATA_BROADCAST, mmr_image);
 546 }
 547
 548 static inline void write_mmr_descriptor_base(int pnode, unsigned long mmr_image)
 549 {
 550         write_gmmr(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE, mmr_image);
 551 }
 552
 553 static inline void write_mmr_activation(unsigned long index)
 554 {
 555         write_lmmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL, index);
 556 }
 557
 558 static inline void write_gmmr_activation(int pnode, unsigned long mmr_image)
 559 {
 560         write_gmmr(pnode, UVH_LB_BAU_SB_ACTIVATION_CONTROL, mmr_image);
 561 }
 562
 563 static inline void write_mmr_payload_first(int pnode, unsigned long mmr_image)
 564 {
 565         write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST, mmr_image);
 566 }
 567
 568 static inline void write_mmr_payload_tail(int pnode, unsigned long mmr_image)
 569 {
 570         write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL, mmr_image);
 571 }
 572
 573 static inline void write_mmr_payload_last(int pnode, unsigned long mmr_image)
 574 {
 575         write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST, mmr_image);
 576 }
 577
 578 static inline void write_mmr_misc_control(int pnode, unsigned long mmr_image)
 579 {
 580         write_gmmr(pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
 581 }
 582
 583 static inline unsigned long read_mmr_misc_control(int pnode)
 584 {
 585         return read_gmmr(pnode, UVH_LB_BAU_MISC_CONTROL);
 586 }
 587
 588 static inline void write_mmr_sw_ack(unsigned long mr)
 589 {
 590         uv_write_local_mmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, mr);
 591 }
 592
 593 static inline unsigned long read_mmr_sw_ack(void)
 594 {
 595         return read_lmmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
 596 }
 597
 598 static inline unsigned long read_gmmr_sw_ack(int pnode)
 599 {
 600         return read_gmmr(pnode, UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
 601 }
 602
 603 static inline void write_mmr_data_config(int pnode, unsigned long mr)
 604 {
 605         uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG, mr);
 606 }
 607
 608 static inline int bau_uvhub_isset(int uvhub, struct pnmask *dstp)
 609 {
 610         return constant_test_bit(uvhub, &dstp->bits[0]);
 611 }
 612 static inline void bau_uvhub_set(int pnode, struct pnmask *dstp)
 613 {
 614         __set_bit(pnode, &dstp->bits[0]);
 615 }
 616 static inline void bau_uvhubs_clear(struct pnmask *dstp,
 617                                     int nbits)
 618 {
 619         bitmap_zero(&dstp->bits[0], nbits);
 620 }
 621 static inline int bau_uvhub_weight(struct pnmask *dstp)
 622 {
 623         return bitmap_weight((unsigned long *)&dstp->bits[0],
 624                                 UV_DISTRIBUTION_SIZE);
 625 }
 626
 627 static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits)
 628 {
 629         bitmap_zero(&dstp->bits, nbits);
 630 }
 631
 632 extern void uv_bau_message_intr1(void);
 633 extern void uv_bau_timeout_intr1(void);
 634
 635 struct atomic_short {
 636         short counter;
 637 };
 638
 639 /*
 640  * atomic_read_short - read a short atomic variable
 641  * @v: pointer of type atomic_short
 642  *
 643  * Atomically reads the value of @v.
 644  */
 645 static inline int atomic_read_short(const struct atomic_short *v)
 646 {
 647         return v->counter;
 648 }
 649
 650 /*
 651  * atom_asr - add and return a short int
 652  * @i: short value to add
 653  * @v: pointer of type atomic_short
 654  *
 655  * Atomically adds @i to @v and returns @i + @v
 656  */
 657 static inline int atom_asr(short i, struct atomic_short *v)
 658 {
 659         short __i = i;
 660         asm volatile(LOCK_PREFIX "xaddw %0, %1"
 661                         : "+r" (i), "+m" (v->counter)
 662                         : : "memory");
 663         return i + __i;
 664 }
 665
 666 /*
 667  * conditionally add 1 to *v, unless *v is >= u
 668  * return 0 if we cannot add 1 to *v because it is >= u
 669  * return 1 if we can add 1 to *v because it is < u
 670  * the add is atomic
 671  *
 672  * This is close to atomic_add_unless(), but this allows the 'u' value
 673  * to be lowered below the current 'v'.  atomic_add_unless can only stop
 674  * on equal.
 675  */
 676 static inline int atomic_inc_unless_ge(spinlock_t *lock, atomic_t *v, int u)
 677 {
 678         spin_lock(lock);
 679         if (atomic_read(v) >= u) {
 680                 spin_unlock(lock);
 681                 return 0;
 682         }
 683         atomic_inc(v);
 684         spin_unlock(lock);
 685         return 1;
 686 }
 687
 688 #endif /* _ASM_X86_UV_UV_BAU_H */