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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[linux-btrfs-devel.git] / drivers / media / dvb / frontends / cxd2820r_core.c
blobd416e85589e1150fe57c7b204a86b6c62ef8b6d2
1 /*
2 * Sony CXD2820R demodulator driver
3 *
4 * Copyright (C) 2010 Antti Palosaari <crope@iki.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 */
20
21
22 #include "cxd2820r_priv.h"
23
24 int cxd2820r_debug;
25 module_param_named(debug, cxd2820r_debug, int, 0644);
26 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
27
28 /* write multiple registers */
29 static int cxd2820r_wr_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
30 u8 *val, int len)
31 {
32 int ret;
33 u8 buf[len+1];
34 struct i2c_msg msg[1] = {
35 {
36 .addr = i2c,
37 .flags = 0,
38 .len = sizeof(buf),
39 .buf = buf,
40 }
41 };
42
43 buf[0] = reg;
44 memcpy(&buf[1], val, len);
45
46 ret = i2c_transfer(priv->i2c, msg, 1);
47 if (ret == 1) {
48 ret = 0;
49 } else {
50 warn("i2c wr failed ret:%d reg:%02x len:%d", ret, reg, len);
51 ret = -EREMOTEIO;
52 }
53 return ret;
54 }
55
56 /* read multiple registers */
57 static int cxd2820r_rd_regs_i2c(struct cxd2820r_priv *priv, u8 i2c, u8 reg,
58 u8 *val, int len)
59 {
60 int ret;
61 u8 buf[len];
62 struct i2c_msg msg[2] = {
63 {
64 .addr = i2c,
65 .flags = 0,
66 .len = 1,
67 .buf = &reg,
68 }, {
69 .addr = i2c,
70 .flags = I2C_M_RD,
71 .len = sizeof(buf),
72 .buf = buf,
73 }
74 };
75
76 ret = i2c_transfer(priv->i2c, msg, 2);
77 if (ret == 2) {
78 memcpy(val, buf, len);
79 ret = 0;
80 } else {
81 warn("i2c rd failed ret:%d reg:%02x len:%d", ret, reg, len);
82 ret = -EREMOTEIO;
83 }
84
85 return ret;
86 }
87
88 /* write multiple registers */
89 int cxd2820r_wr_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
90 int len)
91 {
92 int ret;
93 u8 i2c_addr;
94 u8 reg = (reginfo >> 0) & 0xff;
95 u8 bank = (reginfo >> 8) & 0xff;
96 u8 i2c = (reginfo >> 16) & 0x01;
97
98 /* select I2C */
99 if (i2c)
100 i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
101 else
102 i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
103
104 /* switch bank if needed */
105 if (bank != priv->bank[i2c]) {
106 ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
107 if (ret)
108 return ret;
109 priv->bank[i2c] = bank;
110 }
111 return cxd2820r_wr_regs_i2c(priv, i2c_addr, reg, val, len);
112 }
113
114 /* read multiple registers */
115 int cxd2820r_rd_regs(struct cxd2820r_priv *priv, u32 reginfo, u8 *val,
116 int len)
117 {
118 int ret;
119 u8 i2c_addr;
120 u8 reg = (reginfo >> 0) & 0xff;
121 u8 bank = (reginfo >> 8) & 0xff;
122 u8 i2c = (reginfo >> 16) & 0x01;
123
124 /* select I2C */
125 if (i2c)
126 i2c_addr = priv->cfg.i2c_address | (1 << 1); /* DVB-C */
127 else
128 i2c_addr = priv->cfg.i2c_address; /* DVB-T/T2 */
129
130 /* switch bank if needed */
131 if (bank != priv->bank[i2c]) {
132 ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1);
133 if (ret)
134 return ret;
135 priv->bank[i2c] = bank;
136 }
137 return cxd2820r_rd_regs_i2c(priv, i2c_addr, reg, val, len);
138 }
139
140 /* write single register */
141 int cxd2820r_wr_reg(struct cxd2820r_priv *priv, u32 reg, u8 val)
142 {
143 return cxd2820r_wr_regs(priv, reg, &val, 1);
144 }
145
146 /* read single register */
147 int cxd2820r_rd_reg(struct cxd2820r_priv *priv, u32 reg, u8 *val)
148 {
149 return cxd2820r_rd_regs(priv, reg, val, 1);
150 }
151
152 /* write single register with mask */
153 int cxd2820r_wr_reg_mask(struct cxd2820r_priv *priv, u32 reg, u8 val,
154 u8 mask)
155 {
156 int ret;
157 u8 tmp;
158
159 /* no need for read if whole reg is written */
160 if (mask != 0xff) {
161 ret = cxd2820r_rd_reg(priv, reg, &tmp);
162 if (ret)
163 return ret;
164
165 val &= mask;
166 tmp &= ~mask;
167 val |= tmp;
168 }
169
170 return cxd2820r_wr_reg(priv, reg, val);
171 }
172
173 int cxd2820r_gpio(struct dvb_frontend *fe)
174 {
175 struct cxd2820r_priv *priv = fe->demodulator_priv;
176 int ret, i;
177 u8 *gpio, tmp0, tmp1;
178 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
179
180 switch (fe->dtv_property_cache.delivery_system) {
181 case SYS_DVBT:
182 gpio = priv->cfg.gpio_dvbt;
183 break;
184 case SYS_DVBT2:
185 gpio = priv->cfg.gpio_dvbt2;
186 break;
187 case SYS_DVBC_ANNEX_AC:
188 gpio = priv->cfg.gpio_dvbc;
189 break;
190 default:
191 ret = -EINVAL;
192 goto error;
193 }
194
195 /* update GPIOs only when needed */
196 if (!memcmp(gpio, priv->gpio, sizeof(priv->gpio)))
197 return 0;
198
199 tmp0 = 0x00;
200 tmp1 = 0x00;
201 for (i = 0; i < sizeof(priv->gpio); i++) {
202 /* enable / disable */
203 if (gpio[i] & CXD2820R_GPIO_E)
204 tmp0 |= (2 << 6) >> (2 * i);
205 else
206 tmp0 |= (1 << 6) >> (2 * i);
207
208 /* input / output */
209 if (gpio[i] & CXD2820R_GPIO_I)
210 tmp1 |= (1 << (3 + i));
211 else
212 tmp1 |= (0 << (3 + i));
213
214 /* high / low */
215 if (gpio[i] & CXD2820R_GPIO_H)
216 tmp1 |= (1 << (0 + i));
217 else
218 tmp1 |= (0 << (0 + i));
219
220 dbg("%s: GPIO i=%d %02x %02x", __func__, i, tmp0, tmp1);
221 }
222
223 dbg("%s: wr gpio=%02x %02x", __func__, tmp0, tmp1);
224
225 /* write bits [7:2] */
226 ret = cxd2820r_wr_reg_mask(priv, 0x00089, tmp0, 0xfc);
227 if (ret)
228 goto error;
229
230 /* write bits [5:0] */
231 ret = cxd2820r_wr_reg_mask(priv, 0x0008e, tmp1, 0x3f);
232 if (ret)
233 goto error;
234
235 memcpy(priv->gpio, gpio, sizeof(priv->gpio));
236
237 return ret;
238 error:
239 dbg("%s: failed:%d", __func__, ret);
240 return ret;
241 }
242
243 /* lock FE */
244 static int cxd2820r_lock(struct cxd2820r_priv *priv, int active_fe)
245 {
246 int ret = 0;
247 dbg("%s: active_fe=%d", __func__, active_fe);
248
249 mutex_lock(&priv->fe_lock);
250
251 /* -1=NONE, 0=DVB-T/T2, 1=DVB-C */
252 if (priv->active_fe == active_fe)
253 ;
254 else if (priv->active_fe == -1)
255 priv->active_fe = active_fe;
256 else
257 ret = -EBUSY;
258
259 mutex_unlock(&priv->fe_lock);
260
261 return ret;
262 }
263
264 /* unlock FE */
265 static void cxd2820r_unlock(struct cxd2820r_priv *priv, int active_fe)
266 {
267 dbg("%s: active_fe=%d", __func__, active_fe);
268
269 mutex_lock(&priv->fe_lock);
270
271 /* -1=NONE, 0=DVB-T/T2, 1=DVB-C */
272 if (priv->active_fe == active_fe)
273 priv->active_fe = -1;
274
275 mutex_unlock(&priv->fe_lock);
276
277 return;
278 }
279
280 /* 64 bit div with round closest, like DIV_ROUND_CLOSEST but 64 bit */
281 u32 cxd2820r_div_u64_round_closest(u64 dividend, u32 divisor)
282 {
283 return div_u64(dividend + (divisor / 2), divisor);
284 }
285
286 static int cxd2820r_set_frontend(struct dvb_frontend *fe,
287 struct dvb_frontend_parameters *p)
288 {
289 struct cxd2820r_priv *priv = fe->demodulator_priv;
290 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
291 int ret;
292 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
293
294 if (fe->ops.info.type == FE_OFDM) {
295 /* DVB-T/T2 */
296 ret = cxd2820r_lock(priv, 0);
297 if (ret)
298 return ret;
299
300 switch (priv->delivery_system) {
301 case SYS_UNDEFINED:
302 if (c->delivery_system == SYS_DVBT) {
303 /* SLEEP => DVB-T */
304 ret = cxd2820r_set_frontend_t(fe, p);
305 } else {
306 /* SLEEP => DVB-T2 */
307 ret = cxd2820r_set_frontend_t2(fe, p);
308 }
309 break;
310 case SYS_DVBT:
311 if (c->delivery_system == SYS_DVBT) {
312 /* DVB-T => DVB-T */
313 ret = cxd2820r_set_frontend_t(fe, p);
314 } else if (c->delivery_system == SYS_DVBT2) {
315 /* DVB-T => DVB-T2 */
316 ret = cxd2820r_sleep_t(fe);
317 if (ret)
318 break;
319 ret = cxd2820r_set_frontend_t2(fe, p);
320 }
321 break;
322 case SYS_DVBT2:
323 if (c->delivery_system == SYS_DVBT2) {
324 /* DVB-T2 => DVB-T2 */
325 ret = cxd2820r_set_frontend_t2(fe, p);
326 } else if (c->delivery_system == SYS_DVBT) {
327 /* DVB-T2 => DVB-T */
328 ret = cxd2820r_sleep_t2(fe);
329 if (ret)
330 break;
331 ret = cxd2820r_set_frontend_t(fe, p);
332 }
333 break;
334 default:
335 dbg("%s: error state=%d", __func__,
336 priv->delivery_system);
337 ret = -EINVAL;
338 }
339 } else {
340 /* DVB-C */
341 ret = cxd2820r_lock(priv, 1);
342 if (ret)
343 return ret;
344
345 ret = cxd2820r_set_frontend_c(fe, p);
346 }
347
348 return ret;
349 }
350
351 static int cxd2820r_read_status(struct dvb_frontend *fe, fe_status_t *status)
352 {
353 struct cxd2820r_priv *priv = fe->demodulator_priv;
354 int ret;
355 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
356
357 if (fe->ops.info.type == FE_OFDM) {
358 /* DVB-T/T2 */
359 ret = cxd2820r_lock(priv, 0);
360 if (ret)
361 return ret;
362
363 switch (fe->dtv_property_cache.delivery_system) {
364 case SYS_DVBT:
365 ret = cxd2820r_read_status_t(fe, status);
366 break;
367 case SYS_DVBT2:
368 ret = cxd2820r_read_status_t2(fe, status);
369 break;
370 default:
371 ret = -EINVAL;
372 }
373 } else {
374 /* DVB-C */
375 ret = cxd2820r_lock(priv, 1);
376 if (ret)
377 return ret;
378
379 ret = cxd2820r_read_status_c(fe, status);
380 }
381
382 return ret;
383 }
384
385 static int cxd2820r_get_frontend(struct dvb_frontend *fe,
386 struct dvb_frontend_parameters *p)
387 {
388 struct cxd2820r_priv *priv = fe->demodulator_priv;
389 int ret;
390 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
391
392 if (fe->ops.info.type == FE_OFDM) {
393 /* DVB-T/T2 */
394 ret = cxd2820r_lock(priv, 0);
395 if (ret)
396 return ret;
397
398 switch (fe->dtv_property_cache.delivery_system) {
399 case SYS_DVBT:
400 ret = cxd2820r_get_frontend_t(fe, p);
401 break;
402 case SYS_DVBT2:
403 ret = cxd2820r_get_frontend_t2(fe, p);
404 break;
405 default:
406 ret = -EINVAL;
407 }
408 } else {
409 /* DVB-C */
410 ret = cxd2820r_lock(priv, 1);
411 if (ret)
412 return ret;
413
414 ret = cxd2820r_get_frontend_c(fe, p);
415 }
416
417 return ret;
418 }
419
420 static int cxd2820r_read_ber(struct dvb_frontend *fe, u32 *ber)
421 {
422 struct cxd2820r_priv *priv = fe->demodulator_priv;
423 int ret;
424 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
425
426 if (fe->ops.info.type == FE_OFDM) {
427 /* DVB-T/T2 */
428 ret = cxd2820r_lock(priv, 0);
429 if (ret)
430 return ret;
431
432 switch (fe->dtv_property_cache.delivery_system) {
433 case SYS_DVBT:
434 ret = cxd2820r_read_ber_t(fe, ber);
435 break;
436 case SYS_DVBT2:
437 ret = cxd2820r_read_ber_t2(fe, ber);
438 break;
439 default:
440 ret = -EINVAL;
441 }
442 } else {
443 /* DVB-C */
444 ret = cxd2820r_lock(priv, 1);
445 if (ret)
446 return ret;
447
448 ret = cxd2820r_read_ber_c(fe, ber);
449 }
450
451 return ret;
452 }
453
454 static int cxd2820r_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
455 {
456 struct cxd2820r_priv *priv = fe->demodulator_priv;
457 int ret;
458 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
459
460 if (fe->ops.info.type == FE_OFDM) {
461 /* DVB-T/T2 */
462 ret = cxd2820r_lock(priv, 0);
463 if (ret)
464 return ret;
465
466 switch (fe->dtv_property_cache.delivery_system) {
467 case SYS_DVBT:
468 ret = cxd2820r_read_signal_strength_t(fe, strength);
469 break;
470 case SYS_DVBT2:
471 ret = cxd2820r_read_signal_strength_t2(fe, strength);
472 break;
473 default:
474 ret = -EINVAL;
475 }
476 } else {
477 /* DVB-C */
478 ret = cxd2820r_lock(priv, 1);
479 if (ret)
480 return ret;
481
482 ret = cxd2820r_read_signal_strength_c(fe, strength);
483 }
484
485 return ret;
486 }
487
488 static int cxd2820r_read_snr(struct dvb_frontend *fe, u16 *snr)
489 {
490 struct cxd2820r_priv *priv = fe->demodulator_priv;
491 int ret;
492 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
493
494 if (fe->ops.info.type == FE_OFDM) {
495 /* DVB-T/T2 */
496 ret = cxd2820r_lock(priv, 0);
497 if (ret)
498 return ret;
499
500 switch (fe->dtv_property_cache.delivery_system) {
501 case SYS_DVBT:
502 ret = cxd2820r_read_snr_t(fe, snr);
503 break;
504 case SYS_DVBT2:
505 ret = cxd2820r_read_snr_t2(fe, snr);
506 break;
507 default:
508 ret = -EINVAL;
509 }
510 } else {
511 /* DVB-C */
512 ret = cxd2820r_lock(priv, 1);
513 if (ret)
514 return ret;
515
516 ret = cxd2820r_read_snr_c(fe, snr);
517 }
518
519 return ret;
520 }
521
522 static int cxd2820r_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
523 {
524 struct cxd2820r_priv *priv = fe->demodulator_priv;
525 int ret;
526 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
527
528 if (fe->ops.info.type == FE_OFDM) {
529 /* DVB-T/T2 */
530 ret = cxd2820r_lock(priv, 0);
531 if (ret)
532 return ret;
533
534 switch (fe->dtv_property_cache.delivery_system) {
535 case SYS_DVBT:
536 ret = cxd2820r_read_ucblocks_t(fe, ucblocks);
537 break;
538 case SYS_DVBT2:
539 ret = cxd2820r_read_ucblocks_t2(fe, ucblocks);
540 break;
541 default:
542 ret = -EINVAL;
543 }
544 } else {
545 /* DVB-C */
546 ret = cxd2820r_lock(priv, 1);
547 if (ret)
548 return ret;
549
550 ret = cxd2820r_read_ucblocks_c(fe, ucblocks);
551 }
552
553 return ret;
554 }
555
556 static int cxd2820r_init(struct dvb_frontend *fe)
557 {
558 struct cxd2820r_priv *priv = fe->demodulator_priv;
559 int ret;
560 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
561
562 priv->delivery_system = SYS_UNDEFINED;
563 /* delivery system is unknown at that (init) phase */
564
565 if (fe->ops.info.type == FE_OFDM) {
566 /* DVB-T/T2 */
567 ret = cxd2820r_lock(priv, 0);
568 if (ret)
569 return ret;
570
571 ret = cxd2820r_init_t(fe);
572 } else {
573 /* DVB-C */
574 ret = cxd2820r_lock(priv, 1);
575 if (ret)
576 return ret;
577
578 ret = cxd2820r_init_c(fe);
579 }
580
581 return ret;
582 }
583
584 static int cxd2820r_sleep(struct dvb_frontend *fe)
585 {
586 struct cxd2820r_priv *priv = fe->demodulator_priv;
587 int ret;
588 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
589
590 if (fe->ops.info.type == FE_OFDM) {
591 /* DVB-T/T2 */
592 ret = cxd2820r_lock(priv, 0);
593 if (ret)
594 return ret;
595
596 switch (fe->dtv_property_cache.delivery_system) {
597 case SYS_DVBT:
598 ret = cxd2820r_sleep_t(fe);
599 break;
600 case SYS_DVBT2:
601 ret = cxd2820r_sleep_t2(fe);
602 break;
603 default:
604 ret = -EINVAL;
605 }
606
607 cxd2820r_unlock(priv, 0);
608 } else {
609 /* DVB-C */
610 ret = cxd2820r_lock(priv, 1);
611 if (ret)
612 return ret;
613
614 ret = cxd2820r_sleep_c(fe);
615
616 cxd2820r_unlock(priv, 1);
617 }
618
619 return ret;
620 }
621
622 static int cxd2820r_get_tune_settings(struct dvb_frontend *fe,
623 struct dvb_frontend_tune_settings *s)
624 {
625 struct cxd2820r_priv *priv = fe->demodulator_priv;
626 int ret;
627 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
628
629 if (fe->ops.info.type == FE_OFDM) {
630 /* DVB-T/T2 */
631 ret = cxd2820r_lock(priv, 0);
632 if (ret)
633 return ret;
634
635 switch (fe->dtv_property_cache.delivery_system) {
636 case SYS_DVBT:
637 ret = cxd2820r_get_tune_settings_t(fe, s);
638 break;
639 case SYS_DVBT2:
640 ret = cxd2820r_get_tune_settings_t2(fe, s);
641 break;
642 default:
643 ret = -EINVAL;
644 }
645 } else {
646 /* DVB-C */
647 ret = cxd2820r_lock(priv, 1);
648 if (ret)
649 return ret;
650
651 ret = cxd2820r_get_tune_settings_c(fe, s);
652 }
653
654 return ret;
655 }
656
657 static enum dvbfe_search cxd2820r_search(struct dvb_frontend *fe,
658 struct dvb_frontend_parameters *p)
659 {
660 struct cxd2820r_priv *priv = fe->demodulator_priv;
661 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
662 int ret, i;
663 fe_status_t status = 0;
664 dbg("%s: delsys=%d", __func__, fe->dtv_property_cache.delivery_system);
665
666 /* switch between DVB-T and DVB-T2 when tune fails */
667 if (priv->last_tune_failed) {
668 if (priv->delivery_system == SYS_DVBT)
669 c->delivery_system = SYS_DVBT2;
670 else
671 c->delivery_system = SYS_DVBT;
672 }
673
674 /* set frontend */
675 ret = cxd2820r_set_frontend(fe, p);
676 if (ret)
677 goto error;
678
679
680 /* frontend lock wait loop count */
681 switch (priv->delivery_system) {
682 case SYS_DVBT:
683 i = 20;
684 break;
685 case SYS_DVBT2:
686 i = 40;
687 break;
688 case SYS_UNDEFINED:
689 default:
690 i = 0;
691 break;
692 }
693
694 /* wait frontend lock */
695 for (; i > 0; i--) {
696 dbg("%s: LOOP=%d", __func__, i);
697 msleep(50);
698 ret = cxd2820r_read_status(fe, &status);
699 if (ret)
700 goto error;
701
702 if (status & FE_HAS_SIGNAL)
703 break;
704 }
705
706 /* check if we have a valid signal */
707 if (status) {
708 priv->last_tune_failed = 0;
709 return DVBFE_ALGO_SEARCH_SUCCESS;
710 } else {
711 priv->last_tune_failed = 1;
712 return DVBFE_ALGO_SEARCH_AGAIN;
713 }
714
715 error:
716 dbg("%s: failed:%d", __func__, ret);
717 return DVBFE_ALGO_SEARCH_ERROR;
718 }
719
720 static int cxd2820r_get_frontend_algo(struct dvb_frontend *fe)
721 {
722 return DVBFE_ALGO_CUSTOM;
723 }
724
725 static void cxd2820r_release(struct dvb_frontend *fe)
726 {
727 struct cxd2820r_priv *priv = fe->demodulator_priv;
728 dbg("%s", __func__);
729
730 if (fe->ops.info.type == FE_OFDM) {
731 i2c_del_adapter(&priv->tuner_i2c_adapter);
732 kfree(priv);
733 }
734
735 return;
736 }
737
738 static u32 cxd2820r_tuner_i2c_func(struct i2c_adapter *adapter)
739 {
740 return I2C_FUNC_I2C;
741 }
742
743 static int cxd2820r_tuner_i2c_xfer(struct i2c_adapter *i2c_adap,
744 struct i2c_msg msg[], int num)
745 {
746 struct cxd2820r_priv *priv = i2c_get_adapdata(i2c_adap);
747 int ret;
748 u8 *obuf = kmalloc(msg[0].len + 2, GFP_KERNEL);
749 struct i2c_msg msg2[2] = {
750 {
751 .addr = priv->cfg.i2c_address,
752 .flags = 0,
753 .len = msg[0].len + 2,
754 .buf = obuf,
755 }, {
756 .addr = priv->cfg.i2c_address,
757 .flags = I2C_M_RD,
758 .len = msg[1].len,
759 .buf = msg[1].buf,
760 }
761 };
762
763 if (!obuf)
764 return -ENOMEM;
765
766 obuf[0] = 0x09;
767 obuf[1] = (msg[0].addr << 1);
768 if (num == 2) { /* I2C read */
769 obuf[1] = (msg[0].addr << 1) | I2C_M_RD; /* I2C RD flag */
770 msg2[0].len = msg[0].len + 2 - 1; /* '-1' maybe HW bug ? */
771 }
772 memcpy(&obuf[2], msg[0].buf, msg[0].len);
773
774 ret = i2c_transfer(priv->i2c, msg2, num);
775 if (ret < 0)
776 warn("tuner i2c failed ret:%d", ret);
777
778 kfree(obuf);
779
780 return ret;
781 }
782
783 static struct i2c_algorithm cxd2820r_tuner_i2c_algo = {
784 .master_xfer = cxd2820r_tuner_i2c_xfer,
785 .functionality = cxd2820r_tuner_i2c_func,
786 };
787
788 struct i2c_adapter *cxd2820r_get_tuner_i2c_adapter(struct dvb_frontend *fe)
789 {
790 struct cxd2820r_priv *priv = fe->demodulator_priv;
791 return &priv->tuner_i2c_adapter;
792 }
793 EXPORT_SYMBOL(cxd2820r_get_tuner_i2c_adapter);
794
795 static struct dvb_frontend_ops cxd2820r_ops[2];
796
797 struct dvb_frontend *cxd2820r_attach(const struct cxd2820r_config *cfg,
798 struct i2c_adapter *i2c, struct dvb_frontend *fe)
799 {
800 int ret;
801 struct cxd2820r_priv *priv = NULL;
802 u8 tmp;
803
804 if (fe == NULL) {
805 /* FE0 */
806 /* allocate memory for the internal priv */
807 priv = kzalloc(sizeof(struct cxd2820r_priv), GFP_KERNEL);
808 if (priv == NULL)
809 goto error;
810
811 /* setup the priv */
812 priv->i2c = i2c;
813 memcpy(&priv->cfg, cfg, sizeof(struct cxd2820r_config));
814 mutex_init(&priv->fe_lock);
815
816 priv->active_fe = -1; /* NONE */
817
818 /* check if the demod is there */
819 priv->bank[0] = priv->bank[1] = 0xff;
820 ret = cxd2820r_rd_reg(priv, 0x000fd, &tmp);
821 dbg("%s: chip id=%02x", __func__, tmp);
822 if (ret || tmp != 0xe1)
823 goto error;
824
825 /* create frontends */
826 memcpy(&priv->fe[0].ops, &cxd2820r_ops[0],
827 sizeof(struct dvb_frontend_ops));
828 memcpy(&priv->fe[1].ops, &cxd2820r_ops[1],
829 sizeof(struct dvb_frontend_ops));
830
831 priv->fe[0].demodulator_priv = priv;
832 priv->fe[1].demodulator_priv = priv;
833
834 /* create tuner i2c adapter */
835 strlcpy(priv->tuner_i2c_adapter.name,
836 "CXD2820R tuner I2C adapter",
837 sizeof(priv->tuner_i2c_adapter.name));
838 priv->tuner_i2c_adapter.algo = &cxd2820r_tuner_i2c_algo;
839 priv->tuner_i2c_adapter.algo_data = NULL;
840 i2c_set_adapdata(&priv->tuner_i2c_adapter, priv);
841 if (i2c_add_adapter(&priv->tuner_i2c_adapter) < 0) {
842 err("tuner I2C bus could not be initialized");
843 goto error;
844 }
845
846 return &priv->fe[0];
847
848 } else {
849 /* FE1: FE0 given as pointer, just return FE1 we have
850 * already created */
851 priv = fe->demodulator_priv;
852 return &priv->fe[1];
853 }
854
855 error:
856 kfree(priv);
857 return NULL;
858 }
859 EXPORT_SYMBOL(cxd2820r_attach);
860
861 static struct dvb_frontend_ops cxd2820r_ops[2] = {
862 {
863 /* DVB-T/T2 */
864 .info = {
865 .name = "Sony CXD2820R (DVB-T/T2)",
866 .type = FE_OFDM,
867 .caps =
868 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
869 FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 |
870 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
871 FE_CAN_QPSK | FE_CAN_QAM_16 |
872 FE_CAN_QAM_64 | FE_CAN_QAM_256 |
873 FE_CAN_QAM_AUTO |
874 FE_CAN_TRANSMISSION_MODE_AUTO |
875 FE_CAN_GUARD_INTERVAL_AUTO |
876 FE_CAN_HIERARCHY_AUTO |
877 FE_CAN_MUTE_TS |
878 FE_CAN_2G_MODULATION
879 },
880
881 .release = cxd2820r_release,
882 .init = cxd2820r_init,
883 .sleep = cxd2820r_sleep,
884
885 .get_tune_settings = cxd2820r_get_tune_settings,
886
887 .get_frontend = cxd2820r_get_frontend,
888
889 .get_frontend_algo = cxd2820r_get_frontend_algo,
890 .search = cxd2820r_search,
891
892 .read_status = cxd2820r_read_status,
893 .read_snr = cxd2820r_read_snr,
894 .read_ber = cxd2820r_read_ber,
895 .read_ucblocks = cxd2820r_read_ucblocks,
896 .read_signal_strength = cxd2820r_read_signal_strength,
897 },
898 {
899 /* DVB-C */
900 .info = {
901 .name = "Sony CXD2820R (DVB-C)",
902 .type = FE_QAM,
903 .caps =
904 FE_CAN_QAM_16 | FE_CAN_QAM_32 | FE_CAN_QAM_64 |
905 FE_CAN_QAM_128 | FE_CAN_QAM_256 |
906 FE_CAN_FEC_AUTO
907 },
908
909 .release = cxd2820r_release,
910 .init = cxd2820r_init,
911 .sleep = cxd2820r_sleep,
912
913 .get_tune_settings = cxd2820r_get_tune_settings,
914
915 .set_frontend = cxd2820r_set_frontend,
916 .get_frontend = cxd2820r_get_frontend,
917
918 .read_status = cxd2820r_read_status,
919 .read_snr = cxd2820r_read_snr,
920 .read_ber = cxd2820r_read_ber,
921 .read_ucblocks = cxd2820r_read_ucblocks,
922 .read_signal_strength = cxd2820r_read_signal_strength,
923 },
924 };
925
926
927 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
928 MODULE_DESCRIPTION("Sony CXD2820R demodulator driver");
929 MODULE_LICENSE("GPL");
Linux Btrfs Development