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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[linux-btrfs-devel.git] / drivers / media / video / gspca / ov519.c
blob18305c89083c567944890ec3ee451aa52b5182df
1 /**
2 * OV519 driver
3 *
4 * Copyright (C) 2008-2011 Jean-François Moine <moinejf@free.fr>
5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
6 *
7 * This module is adapted from the ov51x-jpeg package, which itself
8 * was adapted from the ov511 driver.
9 *
10 * Original copyright for the ov511 driver is:
11 *
12 * Copyright (c) 1999-2006 Mark W. McClelland
13 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
14 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
15 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
16 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
17 * Changes by Claudio Matsuoka <claudio@conectiva.com>
18 *
19 * ov51x-jpeg original copyright is:
20 *
21 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
22 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
23 *
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
27 * any later version.
28 *
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
33 *
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
37 *
38 */
39 #define MODULE_NAME "ov519"
40
41 #include <linux/input.h>
42 #include "gspca.h"
43
44 /* The jpeg_hdr is used by w996Xcf only */
45 /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
46 #define CONEX_CAM
47 #include "jpeg.h"
48
49 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
50 MODULE_DESCRIPTION("OV519 USB Camera Driver");
51 MODULE_LICENSE("GPL");
52
53 /* global parameters */
54 static int frame_rate;
55
56 /* Number of times to retry a failed I2C transaction. Increase this if you
57 * are getting "Failed to read sensor ID..." */
58 static int i2c_detect_tries = 10;
59
60 /* controls */
61 enum e_ctrl {
62 BRIGHTNESS,
63 CONTRAST,
64 EXPOSURE,
65 COLORS,
66 HFLIP,
67 VFLIP,
68 AUTOBRIGHT,
69 AUTOGAIN,
70 FREQ,
71 NCTRL /* number of controls */
72 };
73
74 /* ov519 device descriptor */
75 struct sd {
76 struct gspca_dev gspca_dev; /* !! must be the first item */
77
78 struct gspca_ctrl ctrls[NCTRL];
79
80 u8 packet_nr;
81
82 char bridge;
83 #define BRIDGE_OV511 0
84 #define BRIDGE_OV511PLUS 1
85 #define BRIDGE_OV518 2
86 #define BRIDGE_OV518PLUS 3
87 #define BRIDGE_OV519 4 /* = ov530 */
88 #define BRIDGE_OVFX2 5
89 #define BRIDGE_W9968CF 6
90 #define BRIDGE_MASK 7
91
92 char invert_led;
93 #define BRIDGE_INVERT_LED 8
94
95 char snapshot_pressed;
96 char snapshot_needs_reset;
97
98 /* Determined by sensor type */
99 u8 sif;
100
101 u8 quality;
102 #define QUALITY_MIN 50
103 #define QUALITY_MAX 70
104 #define QUALITY_DEF 50
105
106 u8 stopped; /* Streaming is temporarily paused */
107 u8 first_frame;
108
109 u8 frame_rate; /* current Framerate */
110 u8 clockdiv; /* clockdiv override */
111
112 s8 sensor; /* Type of image sensor chip (SEN_*) */
113
114 u8 sensor_addr;
115 u16 sensor_width;
116 u16 sensor_height;
117 s16 sensor_reg_cache[256];
118
119 u8 jpeg_hdr[JPEG_HDR_SZ];
120 };
121 enum sensors {
122 SEN_OV2610,
123 SEN_OV2610AE,
124 SEN_OV3610,
125 SEN_OV6620,
126 SEN_OV6630,
127 SEN_OV66308AF,
128 SEN_OV7610,
129 SEN_OV7620,
130 SEN_OV7620AE,
131 SEN_OV7640,
132 SEN_OV7648,
133 SEN_OV7660,
134 SEN_OV7670,
135 SEN_OV76BE,
136 SEN_OV8610,
137 SEN_OV9600,
138 };
139
140 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
141 the ov sensors which is already present here. When we have the time we
142 really should move the sensor drivers to v4l2 sub drivers. */
143 #include "w996Xcf.c"
144
145 /* V4L2 controls supported by the driver */
146 static void setbrightness(struct gspca_dev *gspca_dev);
147 static void setcontrast(struct gspca_dev *gspca_dev);
148 static void setexposure(struct gspca_dev *gspca_dev);
149 static void setcolors(struct gspca_dev *gspca_dev);
150 static void sethvflip(struct gspca_dev *gspca_dev);
151 static void setautobright(struct gspca_dev *gspca_dev);
152 static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val);
153 static void setfreq(struct gspca_dev *gspca_dev);
154 static void setfreq_i(struct sd *sd);
155
156 static const struct ctrl sd_ctrls[] = {
157 [BRIGHTNESS] = {
158 {
159 .id = V4L2_CID_BRIGHTNESS,
160 .type = V4L2_CTRL_TYPE_INTEGER,
161 .name = "Brightness",
162 .minimum = 0,
163 .maximum = 255,
164 .step = 1,
165 .default_value = 127,
166 },
167 .set_control = setbrightness,
168 },
169 [CONTRAST] = {
170 {
171 .id = V4L2_CID_CONTRAST,
172 .type = V4L2_CTRL_TYPE_INTEGER,
173 .name = "Contrast",
174 .minimum = 0,
175 .maximum = 255,
176 .step = 1,
177 .default_value = 127,
178 },
179 .set_control = setcontrast,
180 },
181 [EXPOSURE] = {
182 {
183 .id = V4L2_CID_EXPOSURE,
184 .type = V4L2_CTRL_TYPE_INTEGER,
185 .name = "Exposure",
186 .minimum = 0,
187 .maximum = 255,
188 .step = 1,
189 .default_value = 127,
190 },
191 .set_control = setexposure,
192 },
193 [COLORS] = {
194 {
195 .id = V4L2_CID_SATURATION,
196 .type = V4L2_CTRL_TYPE_INTEGER,
197 .name = "Color",
198 .minimum = 0,
199 .maximum = 255,
200 .step = 1,
201 .default_value = 127,
202 },
203 .set_control = setcolors,
204 },
205 /* The flip controls work for sensors ov7660 and ov7670 only */
206 [HFLIP] = {
207 {
208 .id = V4L2_CID_HFLIP,
209 .type = V4L2_CTRL_TYPE_BOOLEAN,
210 .name = "Mirror",
211 .minimum = 0,
212 .maximum = 1,
213 .step = 1,
214 .default_value = 0,
215 },
216 .set_control = sethvflip,
217 },
218 [VFLIP] = {
219 {
220 .id = V4L2_CID_VFLIP,
221 .type = V4L2_CTRL_TYPE_BOOLEAN,
222 .name = "Vflip",
223 .minimum = 0,
224 .maximum = 1,
225 .step = 1,
226 .default_value = 0,
227 },
228 .set_control = sethvflip,
229 },
230 [AUTOBRIGHT] = {
231 {
232 .id = V4L2_CID_AUTOBRIGHTNESS,
233 .type = V4L2_CTRL_TYPE_BOOLEAN,
234 .name = "Auto Brightness",
235 .minimum = 0,
236 .maximum = 1,
237 .step = 1,
238 .default_value = 1,
239 },
240 .set_control = setautobright,
241 },
242 [AUTOGAIN] = {
243 {
244 .id = V4L2_CID_AUTOGAIN,
245 .type = V4L2_CTRL_TYPE_BOOLEAN,
246 .name = "Auto Gain",
247 .minimum = 0,
248 .maximum = 1,
249 .step = 1,
250 .default_value = 1,
251 .flags = V4L2_CTRL_FLAG_UPDATE
252 },
253 .set = sd_setautogain,
254 },
255 [FREQ] = {
256 {
257 .id = V4L2_CID_POWER_LINE_FREQUENCY,
258 .type = V4L2_CTRL_TYPE_MENU,
259 .name = "Light frequency filter",
260 .minimum = 0,
261 .maximum = 2, /* 0: no flicker, 1: 50Hz, 2:60Hz, 3: auto */
262 .step = 1,
263 .default_value = 0,
264 },
265 .set_control = setfreq,
266 },
267 };
268
269 /* table of the disabled controls */
270 static const unsigned ctrl_dis[] = {
271 [SEN_OV2610] = ((1 << NCTRL) - 1) /* no control */
272 ^ ((1 << EXPOSURE) /* but exposure */
273 | (1 << AUTOGAIN)), /* and autogain */
274
275 [SEN_OV2610AE] = ((1 << NCTRL) - 1) /* no control */
276 ^ ((1 << EXPOSURE) /* but exposure */
277 | (1 << AUTOGAIN)), /* and autogain */
278
279 [SEN_OV3610] = (1 << NCTRL) - 1, /* no control */
280
281 [SEN_OV6620] = (1 << HFLIP) |
282 (1 << VFLIP) |
283 (1 << EXPOSURE) |
284 (1 << AUTOGAIN),
285
286 [SEN_OV6630] = (1 << HFLIP) |
287 (1 << VFLIP) |
288 (1 << EXPOSURE) |
289 (1 << AUTOGAIN),
290
291 [SEN_OV66308AF] = (1 << HFLIP) |
292 (1 << VFLIP) |
293 (1 << EXPOSURE) |
294 (1 << AUTOGAIN),
295
296 [SEN_OV7610] = (1 << HFLIP) |
297 (1 << VFLIP) |
298 (1 << EXPOSURE) |
299 (1 << AUTOGAIN),
300
301 [SEN_OV7620] = (1 << HFLIP) |
302 (1 << VFLIP) |
303 (1 << EXPOSURE) |
304 (1 << AUTOGAIN),
305
306 [SEN_OV7620AE] = (1 << HFLIP) |
307 (1 << VFLIP) |
308 (1 << EXPOSURE) |
309 (1 << AUTOGAIN),
310
311 [SEN_OV7640] = (1 << HFLIP) |
312 (1 << VFLIP) |
313 (1 << AUTOBRIGHT) |
314 (1 << CONTRAST) |
315 (1 << EXPOSURE) |
316 (1 << AUTOGAIN),
317
318 [SEN_OV7648] = (1 << HFLIP) |
319 (1 << VFLIP) |
320 (1 << AUTOBRIGHT) |
321 (1 << CONTRAST) |
322 (1 << EXPOSURE) |
323 (1 << AUTOGAIN),
324
325 [SEN_OV7660] = (1 << AUTOBRIGHT) |
326 (1 << EXPOSURE) |
327 (1 << AUTOGAIN),
328
329 [SEN_OV7670] = (1 << COLORS) |
330 (1 << AUTOBRIGHT) |
331 (1 << EXPOSURE) |
332 (1 << AUTOGAIN),
333
334 [SEN_OV76BE] = (1 << HFLIP) |
335 (1 << VFLIP) |
336 (1 << EXPOSURE) |
337 (1 << AUTOGAIN),
338
339 [SEN_OV8610] = (1 << HFLIP) |
340 (1 << VFLIP) |
341 (1 << EXPOSURE) |
342 (1 << AUTOGAIN) |
343 (1 << FREQ),
344 [SEN_OV9600] = ((1 << NCTRL) - 1) /* no control */
345 ^ ((1 << EXPOSURE) /* but exposure */
346 | (1 << AUTOGAIN)), /* and autogain */
347
348 };
349
350 static const struct v4l2_pix_format ov519_vga_mode[] = {
351 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
352 .bytesperline = 320,
353 .sizeimage = 320 * 240 * 3 / 8 + 590,
354 .colorspace = V4L2_COLORSPACE_JPEG,
355 .priv = 1},
356 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
357 .bytesperline = 640,
358 .sizeimage = 640 * 480 * 3 / 8 + 590,
359 .colorspace = V4L2_COLORSPACE_JPEG,
360 .priv = 0},
361 };
362 static const struct v4l2_pix_format ov519_sif_mode[] = {
363 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
364 .bytesperline = 160,
365 .sizeimage = 160 * 120 * 3 / 8 + 590,
366 .colorspace = V4L2_COLORSPACE_JPEG,
367 .priv = 3},
368 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
369 .bytesperline = 176,
370 .sizeimage = 176 * 144 * 3 / 8 + 590,
371 .colorspace = V4L2_COLORSPACE_JPEG,
372 .priv = 1},
373 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
374 .bytesperline = 320,
375 .sizeimage = 320 * 240 * 3 / 8 + 590,
376 .colorspace = V4L2_COLORSPACE_JPEG,
377 .priv = 2},
378 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
379 .bytesperline = 352,
380 .sizeimage = 352 * 288 * 3 / 8 + 590,
381 .colorspace = V4L2_COLORSPACE_JPEG,
382 .priv = 0},
383 };
384
385 /* Note some of the sizeimage values for the ov511 / ov518 may seem
386 larger then necessary, however they need to be this big as the ov511 /
387 ov518 always fills the entire isoc frame, using 0 padding bytes when
388 it doesn't have any data. So with low framerates the amount of data
389 transferred can become quite large (libv4l will remove all the 0 padding
390 in userspace). */
391 static const struct v4l2_pix_format ov518_vga_mode[] = {
392 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
393 .bytesperline = 320,
394 .sizeimage = 320 * 240 * 3,
395 .colorspace = V4L2_COLORSPACE_JPEG,
396 .priv = 1},
397 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
398 .bytesperline = 640,
399 .sizeimage = 640 * 480 * 2,
400 .colorspace = V4L2_COLORSPACE_JPEG,
401 .priv = 0},
402 };
403 static const struct v4l2_pix_format ov518_sif_mode[] = {
404 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
405 .bytesperline = 160,
406 .sizeimage = 70000,
407 .colorspace = V4L2_COLORSPACE_JPEG,
408 .priv = 3},
409 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
410 .bytesperline = 176,
411 .sizeimage = 70000,
412 .colorspace = V4L2_COLORSPACE_JPEG,
413 .priv = 1},
414 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
415 .bytesperline = 320,
416 .sizeimage = 320 * 240 * 3,
417 .colorspace = V4L2_COLORSPACE_JPEG,
418 .priv = 2},
419 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
420 .bytesperline = 352,
421 .sizeimage = 352 * 288 * 3,
422 .colorspace = V4L2_COLORSPACE_JPEG,
423 .priv = 0},
424 };
425
426 static const struct v4l2_pix_format ov511_vga_mode[] = {
427 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
428 .bytesperline = 320,
429 .sizeimage = 320 * 240 * 3,
430 .colorspace = V4L2_COLORSPACE_JPEG,
431 .priv = 1},
432 {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
433 .bytesperline = 640,
434 .sizeimage = 640 * 480 * 2,
435 .colorspace = V4L2_COLORSPACE_JPEG,
436 .priv = 0},
437 };
438 static const struct v4l2_pix_format ov511_sif_mode[] = {
439 {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
440 .bytesperline = 160,
441 .sizeimage = 70000,
442 .colorspace = V4L2_COLORSPACE_JPEG,
443 .priv = 3},
444 {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
445 .bytesperline = 176,
446 .sizeimage = 70000,
447 .colorspace = V4L2_COLORSPACE_JPEG,
448 .priv = 1},
449 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
450 .bytesperline = 320,
451 .sizeimage = 320 * 240 * 3,
452 .colorspace = V4L2_COLORSPACE_JPEG,
453 .priv = 2},
454 {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
455 .bytesperline = 352,
456 .sizeimage = 352 * 288 * 3,
457 .colorspace = V4L2_COLORSPACE_JPEG,
458 .priv = 0},
459 };
460
461 static const struct v4l2_pix_format ovfx2_vga_mode[] = {
462 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
463 .bytesperline = 320,
464 .sizeimage = 320 * 240,
465 .colorspace = V4L2_COLORSPACE_SRGB,
466 .priv = 1},
467 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
468 .bytesperline = 640,
469 .sizeimage = 640 * 480,
470 .colorspace = V4L2_COLORSPACE_SRGB,
471 .priv = 0},
472 };
473 static const struct v4l2_pix_format ovfx2_cif_mode[] = {
474 {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
475 .bytesperline = 160,
476 .sizeimage = 160 * 120,
477 .colorspace = V4L2_COLORSPACE_SRGB,
478 .priv = 3},
479 {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
480 .bytesperline = 176,
481 .sizeimage = 176 * 144,
482 .colorspace = V4L2_COLORSPACE_SRGB,
483 .priv = 1},
484 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
485 .bytesperline = 320,
486 .sizeimage = 320 * 240,
487 .colorspace = V4L2_COLORSPACE_SRGB,
488 .priv = 2},
489 {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
490 .bytesperline = 352,
491 .sizeimage = 352 * 288,
492 .colorspace = V4L2_COLORSPACE_SRGB,
493 .priv = 0},
494 };
495 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
496 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
497 .bytesperline = 800,
498 .sizeimage = 800 * 600,
499 .colorspace = V4L2_COLORSPACE_SRGB,
500 .priv = 1},
501 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
502 .bytesperline = 1600,
503 .sizeimage = 1600 * 1200,
504 .colorspace = V4L2_COLORSPACE_SRGB},
505 };
506 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
507 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
508 .bytesperline = 640,
509 .sizeimage = 640 * 480,
510 .colorspace = V4L2_COLORSPACE_SRGB,
511 .priv = 1},
512 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
513 .bytesperline = 800,
514 .sizeimage = 800 * 600,
515 .colorspace = V4L2_COLORSPACE_SRGB,
516 .priv = 1},
517 {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
518 .bytesperline = 1024,
519 .sizeimage = 1024 * 768,
520 .colorspace = V4L2_COLORSPACE_SRGB,
521 .priv = 1},
522 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
523 .bytesperline = 1600,
524 .sizeimage = 1600 * 1200,
525 .colorspace = V4L2_COLORSPACE_SRGB,
526 .priv = 0},
527 {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
528 .bytesperline = 2048,
529 .sizeimage = 2048 * 1536,
530 .colorspace = V4L2_COLORSPACE_SRGB,
531 .priv = 0},
532 };
533 static const struct v4l2_pix_format ovfx2_ov9600_mode[] = {
534 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
535 .bytesperline = 640,
536 .sizeimage = 640 * 480,
537 .colorspace = V4L2_COLORSPACE_SRGB,
538 .priv = 1},
539 {1280, 1024, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
540 .bytesperline = 1280,
541 .sizeimage = 1280 * 1024,
542 .colorspace = V4L2_COLORSPACE_SRGB},
543 };
544
545 /* Registers common to OV511 / OV518 */
546 #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
547 #define R51x_SYS_RESET 0x50
548 /* Reset type flags */
549 #define OV511_RESET_OMNICE 0x08
550 #define R51x_SYS_INIT 0x53
551 #define R51x_SYS_SNAP 0x52
552 #define R51x_SYS_CUST_ID 0x5f
553 #define R51x_COMP_LUT_BEGIN 0x80
554
555 /* OV511 Camera interface register numbers */
556 #define R511_CAM_DELAY 0x10
557 #define R511_CAM_EDGE 0x11
558 #define R511_CAM_PXCNT 0x12
559 #define R511_CAM_LNCNT 0x13
560 #define R511_CAM_PXDIV 0x14
561 #define R511_CAM_LNDIV 0x15
562 #define R511_CAM_UV_EN 0x16
563 #define R511_CAM_LINE_MODE 0x17
564 #define R511_CAM_OPTS 0x18
565
566 #define R511_SNAP_FRAME 0x19
567 #define R511_SNAP_PXCNT 0x1a
568 #define R511_SNAP_LNCNT 0x1b
569 #define R511_SNAP_PXDIV 0x1c
570 #define R511_SNAP_LNDIV 0x1d
571 #define R511_SNAP_UV_EN 0x1e
572 #define R511_SNAP_OPTS 0x1f
573
574 #define R511_DRAM_FLOW_CTL 0x20
575 #define R511_FIFO_OPTS 0x31
576 #define R511_I2C_CTL 0x40
577 #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
578 #define R511_COMP_EN 0x78
579 #define R511_COMP_LUT_EN 0x79
580
581 /* OV518 Camera interface register numbers */
582 #define R518_GPIO_OUT 0x56 /* OV518(+) only */
583 #define R518_GPIO_CTL 0x57 /* OV518(+) only */
584
585 /* OV519 Camera interface register numbers */
586 #define OV519_R10_H_SIZE 0x10
587 #define OV519_R11_V_SIZE 0x11
588 #define OV519_R12_X_OFFSETL 0x12
589 #define OV519_R13_X_OFFSETH 0x13
590 #define OV519_R14_Y_OFFSETL 0x14
591 #define OV519_R15_Y_OFFSETH 0x15
592 #define OV519_R16_DIVIDER 0x16
593 #define OV519_R20_DFR 0x20
594 #define OV519_R25_FORMAT 0x25
595
596 /* OV519 System Controller register numbers */
597 #define OV519_R51_RESET1 0x51
598 #define OV519_R54_EN_CLK1 0x54
599 #define OV519_R57_SNAPSHOT 0x57
600
601 #define OV519_GPIO_DATA_OUT0 0x71
602 #define OV519_GPIO_IO_CTRL0 0x72
603
604 /*#define OV511_ENDPOINT_ADDRESS 1 * Isoc endpoint number */
605
606 /*
607 * The FX2 chip does not give us a zero length read at end of frame.
608 * It does, however, give a short read at the end of a frame, if
609 * necessary, rather than run two frames together.
610 *
611 * By choosing the right bulk transfer size, we are guaranteed to always
612 * get a short read for the last read of each frame. Frame sizes are
613 * always a composite number (width * height, or a multiple) so if we
614 * choose a prime number, we are guaranteed that the last read of a
615 * frame will be short.
616 *
617 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
618 * otherwise EOVERFLOW "babbling" errors occur. I have not been able
619 * to figure out why. [PMiller]
620 *
621 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
622 *
623 * It isn't enough to know the number of bytes per frame, in case we
624 * have data dropouts or buffer overruns (even though the FX2 double
625 * buffers, there are some pretty strict real time constraints for
626 * isochronous transfer for larger frame sizes).
627 */
628 /*jfm: this value does not work for 800x600 - see isoc_init */
629 #define OVFX2_BULK_SIZE (13 * 4096)
630
631 /* I2C registers */
632 #define R51x_I2C_W_SID 0x41
633 #define R51x_I2C_SADDR_3 0x42
634 #define R51x_I2C_SADDR_2 0x43
635 #define R51x_I2C_R_SID 0x44
636 #define R51x_I2C_DATA 0x45
637 #define R518_I2C_CTL 0x47 /* OV518(+) only */
638 #define OVFX2_I2C_ADDR 0x00
639
640 /* I2C ADDRESSES */
641 #define OV7xx0_SID 0x42
642 #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
643 #define OV8xx0_SID 0xa0
644 #define OV6xx0_SID 0xc0
645
646 /* OV7610 registers */
647 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
648 #define OV7610_REG_BLUE 0x01 /* blue channel balance */
649 #define OV7610_REG_RED 0x02 /* red channel balance */
650 #define OV7610_REG_SAT 0x03 /* saturation */
651 #define OV8610_REG_HUE 0x04 /* 04 reserved */
652 #define OV7610_REG_CNT 0x05 /* Y contrast */
653 #define OV7610_REG_BRT 0x06 /* Y brightness */
654 #define OV7610_REG_COM_C 0x14 /* misc common regs */
655 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
656 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
657 #define OV7610_REG_COM_I 0x29 /* misc settings */
658
659 /* OV7660 and OV7670 registers */
660 #define OV7670_R00_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
661 #define OV7670_R01_BLUE 0x01 /* blue gain */
662 #define OV7670_R02_RED 0x02 /* red gain */
663 #define OV7670_R03_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
664 #define OV7670_R04_COM1 0x04 /* Control 1 */
665 /*#define OV7670_R07_AECHH 0x07 * AEC MS 5 bits */
666 #define OV7670_R0C_COM3 0x0c /* Control 3 */
667 #define OV7670_R0D_COM4 0x0d /* Control 4 */
668 #define OV7670_R0E_COM5 0x0e /* All "reserved" */
669 #define OV7670_R0F_COM6 0x0f /* Control 6 */
670 #define OV7670_R10_AECH 0x10 /* More bits of AEC value */
671 #define OV7670_R11_CLKRC 0x11 /* Clock control */
672 #define OV7670_R12_COM7 0x12 /* Control 7 */
673 #define OV7670_COM7_FMT_VGA 0x00
674 /*#define OV7670_COM7_YUV 0x00 * YUV */
675 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
676 #define OV7670_COM7_FMT_MASK 0x38
677 #define OV7670_COM7_RESET 0x80 /* Register reset */
678 #define OV7670_R13_COM8 0x13 /* Control 8 */
679 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
680 #define OV7670_COM8_AWB 0x02 /* White balance enable */
681 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
682 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
683 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
684 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
685 #define OV7670_R14_COM9 0x14 /* Control 9 - gain ceiling */
686 #define OV7670_R15_COM10 0x15 /* Control 10 */
687 #define OV7670_R17_HSTART 0x17 /* Horiz start high bits */
688 #define OV7670_R18_HSTOP 0x18 /* Horiz stop high bits */
689 #define OV7670_R19_VSTART 0x19 /* Vert start high bits */
690 #define OV7670_R1A_VSTOP 0x1a /* Vert stop high bits */
691 #define OV7670_R1E_MVFP 0x1e /* Mirror / vflip */
692 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
693 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
694 #define OV7670_R24_AEW 0x24 /* AGC upper limit */
695 #define OV7670_R25_AEB 0x25 /* AGC lower limit */
696 #define OV7670_R26_VPT 0x26 /* AGC/AEC fast mode op region */
697 #define OV7670_R32_HREF 0x32 /* HREF pieces */
698 #define OV7670_R3A_TSLB 0x3a /* lots of stuff */
699 #define OV7670_R3B_COM11 0x3b /* Control 11 */
700 #define OV7670_COM11_EXP 0x02
701 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
702 #define OV7670_R3C_COM12 0x3c /* Control 12 */
703 #define OV7670_R3D_COM13 0x3d /* Control 13 */
704 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
705 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
706 #define OV7670_R3E_COM14 0x3e /* Control 14 */
707 #define OV7670_R3F_EDGE 0x3f /* Edge enhancement factor */
708 #define OV7670_R40_COM15 0x40 /* Control 15 */
709 /*#define OV7670_COM15_R00FF 0xc0 * 00 to FF */
710 #define OV7670_R41_COM16 0x41 /* Control 16 */
711 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
712 /* end of ov7660 common registers */
713 #define OV7670_R55_BRIGHT 0x55 /* Brightness */
714 #define OV7670_R56_CONTRAS 0x56 /* Contrast control */
715 #define OV7670_R69_GFIX 0x69 /* Fix gain control */
716 /*#define OV7670_R8C_RGB444 0x8c * RGB 444 control */
717 #define OV7670_R9F_HAECC1 0x9f /* Hist AEC/AGC control 1 */
718 #define OV7670_RA0_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
719 #define OV7670_RA5_BD50MAX 0xa5 /* 50hz banding step limit */
720 #define OV7670_RA6_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
721 #define OV7670_RA7_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
722 #define OV7670_RA8_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
723 #define OV7670_RA9_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
724 #define OV7670_RAA_HAECC7 0xaa /* Hist AEC/AGC control 7 */
725 #define OV7670_RAB_BD60MAX 0xab /* 60hz banding step limit */
726
727 struct ov_regvals {
728 u8 reg;
729 u8 val;
730 };
731 struct ov_i2c_regvals {
732 u8 reg;
733 u8 val;
734 };
735
736 /* Settings for OV2610 camera chip */
737 static const struct ov_i2c_regvals norm_2610[] = {
738 { 0x12, 0x80 }, /* reset */
739 };
740
741 static const struct ov_i2c_regvals norm_2610ae[] = {
742 {0x12, 0x80}, /* reset */
743 {0x13, 0xcd},
744 {0x09, 0x01},
745 {0x0d, 0x00},
746 {0x11, 0x80},
747 {0x12, 0x20}, /* 1600x1200 */
748 {0x33, 0x0c},
749 {0x35, 0x90},
750 {0x36, 0x37},
751 /* ms-win traces */
752 {0x11, 0x83}, /* clock / 3 ? */
753 {0x2d, 0x00}, /* 60 Hz filter */
754 {0x24, 0xb0}, /* normal colors */
755 {0x25, 0x90},
756 {0x10, 0x43},
757 };
758
759 static const struct ov_i2c_regvals norm_3620b[] = {
760 /*
761 * From the datasheet: "Note that after writing to register COMH
762 * (0x12) to change the sensor mode, registers related to the
763 * sensor’s cropping window will be reset back to their default
764 * values."
765 *
766 * "wait 4096 external clock ... to make sure the sensor is
767 * stable and ready to access registers" i.e. 160us at 24MHz
768 */
769 { 0x12, 0x80 }, /* COMH reset */
770 { 0x12, 0x00 }, /* QXGA, master */
771
772 /*
773 * 11 CLKRC "Clock Rate Control"
774 * [7] internal frequency doublers: on
775 * [6] video port mode: master
776 * [5:0] clock divider: 1
777 */
778 { 0x11, 0x80 },
779
780 /*
781 * 13 COMI "Common Control I"
782 * = 192 (0xC0) 11000000
783 * COMI[7] "AEC speed selection"
784 * = 1 (0x01) 1....... "Faster AEC correction"
785 * COMI[6] "AEC speed step selection"
786 * = 1 (0x01) .1...... "Big steps, fast"
787 * COMI[5] "Banding filter on off"
788 * = 0 (0x00) ..0..... "Off"
789 * COMI[4] "Banding filter option"
790 * = 0 (0x00) ...0.... "Main clock is 48 MHz and
791 * the PLL is ON"
792 * COMI[3] "Reserved"
793 * = 0 (0x00) ....0...
794 * COMI[2] "AGC auto manual control selection"
795 * = 0 (0x00) .....0.. "Manual"
796 * COMI[1] "AWB auto manual control selection"
797 * = 0 (0x00) ......0. "Manual"
798 * COMI[0] "Exposure control"
799 * = 0 (0x00) .......0 "Manual"
800 */
801 { 0x13, 0xc0 },
802
803 /*
804 * 09 COMC "Common Control C"
805 * = 8 (0x08) 00001000
806 * COMC[7:5] "Reserved"
807 * = 0 (0x00) 000.....
808 * COMC[4] "Sleep Mode Enable"
809 * = 0 (0x00) ...0.... "Normal mode"
810 * COMC[3:2] "Sensor sampling reset timing selection"
811 * = 2 (0x02) ....10.. "Longer reset time"
812 * COMC[1:0] "Output drive current select"
813 * = 0 (0x00) ......00 "Weakest"
814 */
815 { 0x09, 0x08 },
816
817 /*
818 * 0C COMD "Common Control D"
819 * = 8 (0x08) 00001000
820 * COMD[7] "Reserved"
821 * = 0 (0x00) 0.......
822 * COMD[6] "Swap MSB and LSB at the output port"
823 * = 0 (0x00) .0...... "False"
824 * COMD[5:3] "Reserved"
825 * = 1 (0x01) ..001...
826 * COMD[2] "Output Average On Off"
827 * = 0 (0x00) .....0.. "Output Normal"
828 * COMD[1] "Sensor precharge voltage selection"
829 * = 0 (0x00) ......0. "Selects internal
830 * reference precharge
831 * voltage"
832 * COMD[0] "Snapshot option"
833 * = 0 (0x00) .......0 "Enable live video output
834 * after snapshot sequence"
835 */
836 { 0x0c, 0x08 },
837
838 /*
839 * 0D COME "Common Control E"
840 * = 161 (0xA1) 10100001
841 * COME[7] "Output average option"
842 * = 1 (0x01) 1....... "Output average of 4 pixels"
843 * COME[6] "Anti-blooming control"
844 * = 0 (0x00) .0...... "Off"
845 * COME[5:3] "Reserved"
846 * = 4 (0x04) ..100...
847 * COME[2] "Clock output power down pin status"
848 * = 0 (0x00) .....0.. "Tri-state data output pin
849 * on power down"
850 * COME[1] "Data output pin status selection at power down"
851 * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
852 * HREF, and CHSYNC pins on
853 * power down"
854 * COME[0] "Auto zero circuit select"
855 * = 1 (0x01) .......1 "On"
856 */
857 { 0x0d, 0xa1 },
858
859 /*
860 * 0E COMF "Common Control F"
861 * = 112 (0x70) 01110000
862 * COMF[7] "System clock selection"
863 * = 0 (0x00) 0....... "Use 24 MHz system clock"
864 * COMF[6:4] "Reserved"
865 * = 7 (0x07) .111....
866 * COMF[3] "Manual auto negative offset canceling selection"
867 * = 0 (0x00) ....0... "Auto detect negative
868 * offset and cancel it"
869 * COMF[2:0] "Reserved"
870 * = 0 (0x00) .....000
871 */
872 { 0x0e, 0x70 },
873
874 /*
875 * 0F COMG "Common Control G"
876 * = 66 (0x42) 01000010
877 * COMG[7] "Optical black output selection"
878 * = 0 (0x00) 0....... "Disable"
879 * COMG[6] "Black level calibrate selection"
880 * = 1 (0x01) .1...... "Use optical black pixels
881 * to calibrate"
882 * COMG[5:4] "Reserved"
883 * = 0 (0x00) ..00....
884 * COMG[3] "Channel offset adjustment"
885 * = 0 (0x00) ....0... "Disable offset adjustment"
886 * COMG[2] "ADC black level calibration option"
887 * = 0 (0x00) .....0.. "Use B/G line and G/R
888 * line to calibrate each
889 * channel's black level"
890 * COMG[1] "Reserved"
891 * = 1 (0x01) ......1.
892 * COMG[0] "ADC black level calibration enable"
893 * = 0 (0x00) .......0 "Disable"
894 */
895 { 0x0f, 0x42 },
896
897 /*
898 * 14 COMJ "Common Control J"
899 * = 198 (0xC6) 11000110
900 * COMJ[7:6] "AGC gain ceiling"
901 * = 3 (0x03) 11...... "8x"
902 * COMJ[5:4] "Reserved"
903 * = 0 (0x00) ..00....
904 * COMJ[3] "Auto banding filter"
905 * = 0 (0x00) ....0... "Banding filter is always
906 * on off depending on
907 * COMI[5] setting"
908 * COMJ[2] "VSYNC drop option"
909 * = 1 (0x01) .....1.. "SYNC is dropped if frame
910 * data is dropped"
911 * COMJ[1] "Frame data drop"
912 * = 1 (0x01) ......1. "Drop frame data if
913 * exposure is not within
914 * tolerance. In AEC mode,
915 * data is normally dropped
916 * when data is out of
917 * range."
918 * COMJ[0] "Reserved"
919 * = 0 (0x00) .......0
920 */
921 { 0x14, 0xc6 },
922
923 /*
924 * 15 COMK "Common Control K"
925 * = 2 (0x02) 00000010
926 * COMK[7] "CHSYNC pin output swap"
927 * = 0 (0x00) 0....... "CHSYNC"
928 * COMK[6] "HREF pin output swap"
929 * = 0 (0x00) .0...... "HREF"
930 * COMK[5] "PCLK output selection"
931 * = 0 (0x00) ..0..... "PCLK always output"
932 * COMK[4] "PCLK edge selection"
933 * = 0 (0x00) ...0.... "Data valid on falling edge"
934 * COMK[3] "HREF output polarity"
935 * = 0 (0x00) ....0... "positive"
936 * COMK[2] "Reserved"
937 * = 0 (0x00) .....0..
938 * COMK[1] "VSYNC polarity"
939 * = 1 (0x01) ......1. "negative"
940 * COMK[0] "HSYNC polarity"
941 * = 0 (0x00) .......0 "positive"
942 */
943 { 0x15, 0x02 },
944
945 /*
946 * 33 CHLF "Current Control"
947 * = 9 (0x09) 00001001
948 * CHLF[7:6] "Sensor current control"
949 * = 0 (0x00) 00......
950 * CHLF[5] "Sensor current range control"
951 * = 0 (0x00) ..0..... "normal range"
952 * CHLF[4] "Sensor current"
953 * = 0 (0x00) ...0.... "normal current"
954 * CHLF[3] "Sensor buffer current control"
955 * = 1 (0x01) ....1... "half current"
956 * CHLF[2] "Column buffer current control"
957 * = 0 (0x00) .....0.. "normal current"
958 * CHLF[1] "Analog DSP current control"
959 * = 0 (0x00) ......0. "normal current"
960 * CHLF[1] "ADC current control"
961 * = 0 (0x00) ......0. "normal current"
962 */
963 { 0x33, 0x09 },
964
965 /*
966 * 34 VBLM "Blooming Control"
967 * = 80 (0x50) 01010000
968 * VBLM[7] "Hard soft reset switch"
969 * = 0 (0x00) 0....... "Hard reset"
970 * VBLM[6:4] "Blooming voltage selection"
971 * = 5 (0x05) .101....
972 * VBLM[3:0] "Sensor current control"
973 * = 0 (0x00) ....0000
974 */
975 { 0x34, 0x50 },
976
977 /*
978 * 36 VCHG "Sensor Precharge Voltage Control"
979 * = 0 (0x00) 00000000
980 * VCHG[7] "Reserved"
981 * = 0 (0x00) 0.......
982 * VCHG[6:4] "Sensor precharge voltage control"
983 * = 0 (0x00) .000....
984 * VCHG[3:0] "Sensor array common reference"
985 * = 0 (0x00) ....0000
986 */
987 { 0x36, 0x00 },
988
989 /*
990 * 37 ADC "ADC Reference Control"
991 * = 4 (0x04) 00000100
992 * ADC[7:4] "Reserved"
993 * = 0 (0x00) 0000....
994 * ADC[3] "ADC input signal range"
995 * = 0 (0x00) ....0... "Input signal 1.0x"
996 * ADC[2:0] "ADC range control"
997 * = 4 (0x04) .....100
998 */
999 { 0x37, 0x04 },
1000
1001 /*
1002 * 38 ACOM "Analog Common Ground"
1003 * = 82 (0x52) 01010010
1004 * ACOM[7] "Analog gain control"
1005 * = 0 (0x00) 0....... "Gain 1x"
1006 * ACOM[6] "Analog black level calibration"
1007 * = 1 (0x01) .1...... "On"
1008 * ACOM[5:0] "Reserved"
1009 * = 18 (0x12) ..010010
1010 */
1011 { 0x38, 0x52 },
1012
1013 /*
1014 * 3A FREFA "Internal Reference Adjustment"
1015 * = 0 (0x00) 00000000
1016 * FREFA[7:0] "Range"
1017 * = 0 (0x00) 00000000
1018 */
1019 { 0x3a, 0x00 },
1020
1021 /*
1022 * 3C FVOPT "Internal Reference Adjustment"
1023 * = 31 (0x1F) 00011111
1024 * FVOPT[7:0] "Range"
1025 * = 31 (0x1F) 00011111
1026 */
1027 { 0x3c, 0x1f },
1028
1029 /*
1030 * 44 Undocumented = 0 (0x00) 00000000
1031 * 44[7:0] "It's a secret"
1032 * = 0 (0x00) 00000000
1033 */
1034 { 0x44, 0x00 },
1035
1036 /*
1037 * 40 Undocumented = 0 (0x00) 00000000
1038 * 40[7:0] "It's a secret"
1039 * = 0 (0x00) 00000000
1040 */
1041 { 0x40, 0x00 },
1042
1043 /*
1044 * 41 Undocumented = 0 (0x00) 00000000
1045 * 41[7:0] "It's a secret"
1046 * = 0 (0x00) 00000000
1047 */
1048 { 0x41, 0x00 },
1049
1050 /*
1051 * 42 Undocumented = 0 (0x00) 00000000
1052 * 42[7:0] "It's a secret"
1053 * = 0 (0x00) 00000000
1054 */
1055 { 0x42, 0x00 },
1056
1057 /*
1058 * 43 Undocumented = 0 (0x00) 00000000
1059 * 43[7:0] "It's a secret"
1060 * = 0 (0x00) 00000000
1061 */
1062 { 0x43, 0x00 },
1063
1064 /*
1065 * 45 Undocumented = 128 (0x80) 10000000
1066 * 45[7:0] "It's a secret"
1067 * = 128 (0x80) 10000000
1068 */
1069 { 0x45, 0x80 },
1070
1071 /*
1072 * 48 Undocumented = 192 (0xC0) 11000000
1073 * 48[7:0] "It's a secret"
1074 * = 192 (0xC0) 11000000
1075 */
1076 { 0x48, 0xc0 },
1077
1078 /*
1079 * 49 Undocumented = 25 (0x19) 00011001
1080 * 49[7:0] "It's a secret"
1081 * = 25 (0x19) 00011001
1082 */
1083 { 0x49, 0x19 },
1084
1085 /*
1086 * 4B Undocumented = 128 (0x80) 10000000
1087 * 4B[7:0] "It's a secret"
1088 * = 128 (0x80) 10000000
1089 */
1090 { 0x4b, 0x80 },
1091
1092 /*
1093 * 4D Undocumented = 196 (0xC4) 11000100
1094 * 4D[7:0] "It's a secret"
1095 * = 196 (0xC4) 11000100
1096 */
1097 { 0x4d, 0xc4 },
1098
1099 /*
1100 * 35 VREF "Reference Voltage Control"
1101 * = 76 (0x4c) 01001100
1102 * VREF[7:5] "Column high reference control"
1103 * = 2 (0x02) 010..... "higher voltage"
1104 * VREF[4:2] "Column low reference control"
1105 * = 3 (0x03) ...011.. "Highest voltage"
1106 * VREF[1:0] "Reserved"
1107 * = 0 (0x00) ......00
1108 */
1109 { 0x35, 0x4c },
1110
1111 /*
1112 * 3D Undocumented = 0 (0x00) 00000000
1113 * 3D[7:0] "It's a secret"
1114 * = 0 (0x00) 00000000
1115 */
1116 { 0x3d, 0x00 },
1117
1118 /*
1119 * 3E Undocumented = 0 (0x00) 00000000
1120 * 3E[7:0] "It's a secret"
1121 * = 0 (0x00) 00000000
1122 */
1123 { 0x3e, 0x00 },
1124
1125 /*
1126 * 3B FREFB "Internal Reference Adjustment"
1127 * = 24 (0x18) 00011000
1128 * FREFB[7:0] "Range"
1129 * = 24 (0x18) 00011000
1130 */
1131 { 0x3b, 0x18 },
1132
1133 /*
1134 * 33 CHLF "Current Control"
1135 * = 25 (0x19) 00011001
1136 * CHLF[7:6] "Sensor current control"
1137 * = 0 (0x00) 00......
1138 * CHLF[5] "Sensor current range control"
1139 * = 0 (0x00) ..0..... "normal range"
1140 * CHLF[4] "Sensor current"
1141 * = 1 (0x01) ...1.... "double current"
1142 * CHLF[3] "Sensor buffer current control"
1143 * = 1 (0x01) ....1... "half current"
1144 * CHLF[2] "Column buffer current control"
1145 * = 0 (0x00) .....0.. "normal current"
1146 * CHLF[1] "Analog DSP current control"
1147 * = 0 (0x00) ......0. "normal current"
1148 * CHLF[1] "ADC current control"
1149 * = 0 (0x00) ......0. "normal current"
1150 */
1151 { 0x33, 0x19 },
1152
1153 /*
1154 * 34 VBLM "Blooming Control"
1155 * = 90 (0x5A) 01011010
1156 * VBLM[7] "Hard soft reset switch"
1157 * = 0 (0x00) 0....... "Hard reset"
1158 * VBLM[6:4] "Blooming voltage selection"
1159 * = 5 (0x05) .101....
1160 * VBLM[3:0] "Sensor current control"
1161 * = 10 (0x0A) ....1010
1162 */
1163 { 0x34, 0x5a },
1164
1165 /*
1166 * 3B FREFB "Internal Reference Adjustment"
1167 * = 0 (0x00) 00000000
1168 * FREFB[7:0] "Range"
1169 * = 0 (0x00) 00000000
1170 */
1171 { 0x3b, 0x00 },
1172
1173 /*
1174 * 33 CHLF "Current Control"
1175 * = 9 (0x09) 00001001
1176 * CHLF[7:6] "Sensor current control"
1177 * = 0 (0x00) 00......
1178 * CHLF[5] "Sensor current range control"
1179 * = 0 (0x00) ..0..... "normal range"
1180 * CHLF[4] "Sensor current"
1181 * = 0 (0x00) ...0.... "normal current"
1182 * CHLF[3] "Sensor buffer current control"
1183 * = 1 (0x01) ....1... "half current"
1184 * CHLF[2] "Column buffer current control"
1185 * = 0 (0x00) .....0.. "normal current"
1186 * CHLF[1] "Analog DSP current control"
1187 * = 0 (0x00) ......0. "normal current"
1188 * CHLF[1] "ADC current control"
1189 * = 0 (0x00) ......0. "normal current"
1190 */
1191 { 0x33, 0x09 },
1192
1193 /*
1194 * 34 VBLM "Blooming Control"
1195 * = 80 (0x50) 01010000
1196 * VBLM[7] "Hard soft reset switch"
1197 * = 0 (0x00) 0....... "Hard reset"
1198 * VBLM[6:4] "Blooming voltage selection"
1199 * = 5 (0x05) .101....
1200 * VBLM[3:0] "Sensor current control"
1201 * = 0 (0x00) ....0000
1202 */
1203 { 0x34, 0x50 },
1204
1205 /*
1206 * 12 COMH "Common Control H"
1207 * = 64 (0x40) 01000000
1208 * COMH[7] "SRST"
1209 * = 0 (0x00) 0....... "No-op"
1210 * COMH[6:4] "Resolution selection"
1211 * = 4 (0x04) .100.... "XGA"
1212 * COMH[3] "Master slave selection"
1213 * = 0 (0x00) ....0... "Master mode"
1214 * COMH[2] "Internal B/R channel option"
1215 * = 0 (0x00) .....0.. "B/R use same channel"
1216 * COMH[1] "Color bar test pattern"
1217 * = 0 (0x00) ......0. "Off"
1218 * COMH[0] "Reserved"
1219 * = 0 (0x00) .......0
1220 */
1221 { 0x12, 0x40 },
1222
1223 /*
1224 * 17 HREFST "Horizontal window start"
1225 * = 31 (0x1F) 00011111
1226 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1227 * = 31 (0x1F) 00011111
1228 */
1229 { 0x17, 0x1f },
1230
1231 /*
1232 * 18 HREFEND "Horizontal window end"
1233 * = 95 (0x5F) 01011111
1234 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1235 * = 95 (0x5F) 01011111
1236 */
1237 { 0x18, 0x5f },
1238
1239 /*
1240 * 19 VSTRT "Vertical window start"
1241 * = 0 (0x00) 00000000
1242 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1243 * = 0 (0x00) 00000000
1244 */
1245 { 0x19, 0x00 },
1246
1247 /*
1248 * 1A VEND "Vertical window end"
1249 * = 96 (0x60) 01100000
1250 * VEND[7:0] "Vertical Window End, 8 MSBs"
1251 * = 96 (0x60) 01100000
1252 */
1253 { 0x1a, 0x60 },
1254
1255 /*
1256 * 32 COMM "Common Control M"
1257 * = 18 (0x12) 00010010
1258 * COMM[7:6] "Pixel clock divide option"
1259 * = 0 (0x00) 00...... "/1"
1260 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1261 * = 2 (0x02) ..010...
1262 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1263 * = 2 (0x02) .....010
1264 */
1265 { 0x32, 0x12 },
1266
1267 /*
1268 * 03 COMA "Common Control A"
1269 * = 74 (0x4A) 01001010
1270 * COMA[7:4] "AWB Update Threshold"
1271 * = 4 (0x04) 0100....
1272 * COMA[3:2] "Vertical window end line control 2 LSBs"
1273 * = 2 (0x02) ....10..
1274 * COMA[1:0] "Vertical window start line control 2 LSBs"
1275 * = 2 (0x02) ......10
1276 */
1277 { 0x03, 0x4a },
1278
1279 /*
1280 * 11 CLKRC "Clock Rate Control"
1281 * = 128 (0x80) 10000000
1282 * CLKRC[7] "Internal frequency doublers on off seclection"
1283 * = 1 (0x01) 1....... "On"
1284 * CLKRC[6] "Digital video master slave selection"
1285 * = 0 (0x00) .0...... "Master mode, sensor
1286 * provides PCLK"
1287 * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1288 * = 0 (0x00) ..000000
1289 */
1290 { 0x11, 0x80 },
1291
1292 /*
1293 * 12 COMH "Common Control H"
1294 * = 0 (0x00) 00000000
1295 * COMH[7] "SRST"
1296 * = 0 (0x00) 0....... "No-op"
1297 * COMH[6:4] "Resolution selection"
1298 * = 0 (0x00) .000.... "QXGA"
1299 * COMH[3] "Master slave selection"
1300 * = 0 (0x00) ....0... "Master mode"
1301 * COMH[2] "Internal B/R channel option"
1302 * = 0 (0x00) .....0.. "B/R use same channel"
1303 * COMH[1] "Color bar test pattern"
1304 * = 0 (0x00) ......0. "Off"
1305 * COMH[0] "Reserved"
1306 * = 0 (0x00) .......0
1307 */
1308 { 0x12, 0x00 },
1309
1310 /*
1311 * 12 COMH "Common Control H"
1312 * = 64 (0x40) 01000000
1313 * COMH[7] "SRST"
1314 * = 0 (0x00) 0....... "No-op"
1315 * COMH[6:4] "Resolution selection"
1316 * = 4 (0x04) .100.... "XGA"
1317 * COMH[3] "Master slave selection"
1318 * = 0 (0x00) ....0... "Master mode"
1319 * COMH[2] "Internal B/R channel option"
1320 * = 0 (0x00) .....0.. "B/R use same channel"
1321 * COMH[1] "Color bar test pattern"
1322 * = 0 (0x00) ......0. "Off"
1323 * COMH[0] "Reserved"
1324 * = 0 (0x00) .......0
1325 */
1326 { 0x12, 0x40 },
1327
1328 /*
1329 * 17 HREFST "Horizontal window start"
1330 * = 31 (0x1F) 00011111
1331 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1332 * = 31 (0x1F) 00011111
1333 */
1334 { 0x17, 0x1f },
1335
1336 /*
1337 * 18 HREFEND "Horizontal window end"
1338 * = 95 (0x5F) 01011111
1339 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1340 * = 95 (0x5F) 01011111
1341 */
1342 { 0x18, 0x5f },
1343
1344 /*
1345 * 19 VSTRT "Vertical window start"
1346 * = 0 (0x00) 00000000
1347 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1348 * = 0 (0x00) 00000000
1349 */
1350 { 0x19, 0x00 },
1351
1352 /*
1353 * 1A VEND "Vertical window end"
1354 * = 96 (0x60) 01100000
1355 * VEND[7:0] "Vertical Window End, 8 MSBs"
1356 * = 96 (0x60) 01100000
1357 */
1358 { 0x1a, 0x60 },
1359
1360 /*
1361 * 32 COMM "Common Control M"
1362 * = 18 (0x12) 00010010
1363 * COMM[7:6] "Pixel clock divide option"
1364 * = 0 (0x00) 00...... "/1"
1365 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1366 * = 2 (0x02) ..010...
1367 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1368 * = 2 (0x02) .....010
1369 */
1370 { 0x32, 0x12 },
1371
1372 /*
1373 * 03 COMA "Common Control A"
1374 * = 74 (0x4A) 01001010
1375 * COMA[7:4] "AWB Update Threshold"
1376 * = 4 (0x04) 0100....
1377 * COMA[3:2] "Vertical window end line control 2 LSBs"
1378 * = 2 (0x02) ....10..
1379 * COMA[1:0] "Vertical window start line control 2 LSBs"
1380 * = 2 (0x02) ......10
1381 */
1382 { 0x03, 0x4a },
1383
1384 /*
1385 * 02 RED "Red Gain Control"
1386 * = 175 (0xAF) 10101111
1387 * RED[7] "Action"
1388 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1389 * RED[6:0] "Value"
1390 * = 47 (0x2F) .0101111
1391 */
1392 { 0x02, 0xaf },
1393
1394 /*
1395 * 2D ADDVSL "VSYNC Pulse Width"
1396 * = 210 (0xD2) 11010010
1397 * ADDVSL[7:0] "VSYNC pulse width, LSB"
1398 * = 210 (0xD2) 11010010
1399 */
1400 { 0x2d, 0xd2 },
1401
1402 /*
1403 * 00 GAIN = 24 (0x18) 00011000
1404 * GAIN[7:6] "Reserved"
1405 * = 0 (0x00) 00......
1406 * GAIN[5] "Double"
1407 * = 0 (0x00) ..0..... "False"
1408 * GAIN[4] "Double"
1409 * = 1 (0x01) ...1.... "True"
1410 * GAIN[3:0] "Range"
1411 * = 8 (0x08) ....1000
1412 */
1413 { 0x00, 0x18 },
1414
1415 /*
1416 * 01 BLUE "Blue Gain Control"
1417 * = 240 (0xF0) 11110000
1418 * BLUE[7] "Action"
1419 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1420 * BLUE[6:0] "Value"
1421 * = 112 (0x70) .1110000
1422 */
1423 { 0x01, 0xf0 },
1424
1425 /*
1426 * 10 AEC "Automatic Exposure Control"
1427 * = 10 (0x0A) 00001010
1428 * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1429 * = 10 (0x0A) 00001010
1430 */
1431 { 0x10, 0x0a },
1432
1433 { 0xe1, 0x67 },
1434 { 0xe3, 0x03 },
1435 { 0xe4, 0x26 },
1436 { 0xe5, 0x3e },
1437 { 0xf8, 0x01 },
1438 { 0xff, 0x01 },
1439 };
1440
1441 static const struct ov_i2c_regvals norm_6x20[] = {
1442 { 0x12, 0x80 }, /* reset */
1443 { 0x11, 0x01 },
1444 { 0x03, 0x60 },
1445 { 0x05, 0x7f }, /* For when autoadjust is off */
1446 { 0x07, 0xa8 },
1447 /* The ratio of 0x0c and 0x0d controls the white point */
1448 { 0x0c, 0x24 },
1449 { 0x0d, 0x24 },
1450 { 0x0f, 0x15 }, /* COMS */
1451 { 0x10, 0x75 }, /* AEC Exposure time */
1452 { 0x12, 0x24 }, /* Enable AGC */
1453 { 0x14, 0x04 },
1454 /* 0x16: 0x06 helps frame stability with moving objects */
1455 { 0x16, 0x06 },
1456 /* { 0x20, 0x30 }, * Aperture correction enable */
1457 { 0x26, 0xb2 }, /* BLC enable */
1458 /* 0x28: 0x05 Selects RGB format if RGB on */
1459 { 0x28, 0x05 },
1460 { 0x2a, 0x04 }, /* Disable framerate adjust */
1461 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
1462 { 0x2d, 0x85 },
1463 { 0x33, 0xa0 }, /* Color Processing Parameter */
1464 { 0x34, 0xd2 }, /* Max A/D range */
1465 { 0x38, 0x8b },
1466 { 0x39, 0x40 },
1467
1468 { 0x3c, 0x39 }, /* Enable AEC mode changing */
1469 { 0x3c, 0x3c }, /* Change AEC mode */
1470 { 0x3c, 0x24 }, /* Disable AEC mode changing */
1471
1472 { 0x3d, 0x80 },
1473 /* These next two registers (0x4a, 0x4b) are undocumented.
1474 * They control the color balance */
1475 { 0x4a, 0x80 },
1476 { 0x4b, 0x80 },
1477 { 0x4d, 0xd2 }, /* This reduces noise a bit */
1478 { 0x4e, 0xc1 },
1479 { 0x4f, 0x04 },
1480 /* Do 50-53 have any effect? */
1481 /* Toggle 0x12[2] off and on here? */
1482 };
1483
1484 static const struct ov_i2c_regvals norm_6x30[] = {
1485 { 0x12, 0x80 }, /* Reset */
1486 { 0x00, 0x1f }, /* Gain */
1487 { 0x01, 0x99 }, /* Blue gain */
1488 { 0x02, 0x7c }, /* Red gain */
1489 { 0x03, 0xc0 }, /* Saturation */
1490 { 0x05, 0x0a }, /* Contrast */
1491 { 0x06, 0x95 }, /* Brightness */
1492 { 0x07, 0x2d }, /* Sharpness */
1493 { 0x0c, 0x20 },
1494 { 0x0d, 0x20 },
1495 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1496 { 0x0f, 0x05 },
1497 { 0x10, 0x9a },
1498 { 0x11, 0x00 }, /* Pixel clock = fastest */
1499 { 0x12, 0x24 }, /* Enable AGC and AWB */
1500 { 0x13, 0x21 },
1501 { 0x14, 0x80 },
1502 { 0x15, 0x01 },
1503 { 0x16, 0x03 },
1504 { 0x17, 0x38 },
1505 { 0x18, 0xea },
1506 { 0x19, 0x04 },
1507 { 0x1a, 0x93 },
1508 { 0x1b, 0x00 },
1509 { 0x1e, 0xc4 },
1510 { 0x1f, 0x04 },
1511 { 0x20, 0x20 },
1512 { 0x21, 0x10 },
1513 { 0x22, 0x88 },
1514 { 0x23, 0xc0 }, /* Crystal circuit power level */
1515 { 0x25, 0x9a }, /* Increase AEC black ratio */
1516 { 0x26, 0xb2 }, /* BLC enable */
1517 { 0x27, 0xa2 },
1518 { 0x28, 0x00 },
1519 { 0x29, 0x00 },
1520 { 0x2a, 0x84 }, /* 60 Hz power */
1521 { 0x2b, 0xa8 }, /* 60 Hz power */
1522 { 0x2c, 0xa0 },
1523 { 0x2d, 0x95 }, /* Enable auto-brightness */
1524 { 0x2e, 0x88 },
1525 { 0x33, 0x26 },
1526 { 0x34, 0x03 },
1527 { 0x36, 0x8f },
1528 { 0x37, 0x80 },
1529 { 0x38, 0x83 },
1530 { 0x39, 0x80 },
1531 { 0x3a, 0x0f },
1532 { 0x3b, 0x3c },
1533 { 0x3c, 0x1a },
1534 { 0x3d, 0x80 },
1535 { 0x3e, 0x80 },
1536 { 0x3f, 0x0e },
1537 { 0x40, 0x00 }, /* White bal */
1538 { 0x41, 0x00 }, /* White bal */
1539 { 0x42, 0x80 },
1540 { 0x43, 0x3f }, /* White bal */
1541 { 0x44, 0x80 },
1542 { 0x45, 0x20 },
1543 { 0x46, 0x20 },
1544 { 0x47, 0x80 },
1545 { 0x48, 0x7f },
1546 { 0x49, 0x00 },
1547 { 0x4a, 0x00 },
1548 { 0x4b, 0x80 },
1549 { 0x4c, 0xd0 },
1550 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1551 { 0x4e, 0x40 },
1552 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1553 { 0x50, 0xff },
1554 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1555 { 0x55, 0xff },
1556 { 0x56, 0x12 },
1557 { 0x57, 0x81 },
1558 { 0x58, 0x75 },
1559 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1560 { 0x5a, 0x2c },
1561 { 0x5b, 0x0f }, /* AWB chrominance levels */
1562 { 0x5c, 0x10 },
1563 { 0x3d, 0x80 },
1564 { 0x27, 0xa6 },
1565 { 0x12, 0x20 }, /* Toggle AWB */
1566 { 0x12, 0x24 },
1567 };
1568
1569 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
1570 *
1571 * Register 0x0f in the 7610 has the following effects:
1572 *
1573 * 0x85 (AEC method 1): Best overall, good contrast range
1574 * 0x45 (AEC method 2): Very overexposed
1575 * 0xa5 (spec sheet default): Ok, but the black level is
1576 * shifted resulting in loss of contrast
1577 * 0x05 (old driver setting): very overexposed, too much
1578 * contrast
1579 */
1580 static const struct ov_i2c_regvals norm_7610[] = {
1581 { 0x10, 0xff },
1582 { 0x16, 0x06 },
1583 { 0x28, 0x24 },
1584 { 0x2b, 0xac },
1585 { 0x12, 0x00 },
1586 { 0x38, 0x81 },
1587 { 0x28, 0x24 }, /* 0c */
1588 { 0x0f, 0x85 }, /* lg's setting */
1589 { 0x15, 0x01 },
1590 { 0x20, 0x1c },
1591 { 0x23, 0x2a },
1592 { 0x24, 0x10 },
1593 { 0x25, 0x8a },
1594 { 0x26, 0xa2 },
1595 { 0x27, 0xc2 },
1596 { 0x2a, 0x04 },
1597 { 0x2c, 0xfe },
1598 { 0x2d, 0x93 },
1599 { 0x30, 0x71 },
1600 { 0x31, 0x60 },
1601 { 0x32, 0x26 },
1602 { 0x33, 0x20 },
1603 { 0x34, 0x48 },
1604 { 0x12, 0x24 },
1605 { 0x11, 0x01 },
1606 { 0x0c, 0x24 },
1607 { 0x0d, 0x24 },
1608 };
1609
1610 static const struct ov_i2c_regvals norm_7620[] = {
1611 { 0x12, 0x80 }, /* reset */
1612 { 0x00, 0x00 }, /* gain */
1613 { 0x01, 0x80 }, /* blue gain */
1614 { 0x02, 0x80 }, /* red gain */
1615 { 0x03, 0xc0 }, /* OV7670_R03_VREF */
1616 { 0x06, 0x60 },
1617 { 0x07, 0x00 },
1618 { 0x0c, 0x24 },
1619 { 0x0c, 0x24 },
1620 { 0x0d, 0x24 },
1621 { 0x11, 0x01 },
1622 { 0x12, 0x24 },
1623 { 0x13, 0x01 },
1624 { 0x14, 0x84 },
1625 { 0x15, 0x01 },
1626 { 0x16, 0x03 },
1627 { 0x17, 0x2f },
1628 { 0x18, 0xcf },
1629 { 0x19, 0x06 },
1630 { 0x1a, 0xf5 },
1631 { 0x1b, 0x00 },
1632 { 0x20, 0x18 },
1633 { 0x21, 0x80 },
1634 { 0x22, 0x80 },
1635 { 0x23, 0x00 },
1636 { 0x26, 0xa2 },
1637 { 0x27, 0xea },
1638 { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1639 { 0x29, 0x00 },
1640 { 0x2a, 0x10 },
1641 { 0x2b, 0x00 },
1642 { 0x2c, 0x88 },
1643 { 0x2d, 0x91 },
1644 { 0x2e, 0x80 },
1645 { 0x2f, 0x44 },
1646 { 0x60, 0x27 },
1647 { 0x61, 0x02 },
1648 { 0x62, 0x5f },
1649 { 0x63, 0xd5 },
1650 { 0x64, 0x57 },
1651 { 0x65, 0x83 },
1652 { 0x66, 0x55 },
1653 { 0x67, 0x92 },
1654 { 0x68, 0xcf },
1655 { 0x69, 0x76 },
1656 { 0x6a, 0x22 },
1657 { 0x6b, 0x00 },
1658 { 0x6c, 0x02 },
1659 { 0x6d, 0x44 },
1660 { 0x6e, 0x80 },
1661 { 0x6f, 0x1d },
1662 { 0x70, 0x8b },
1663 { 0x71, 0x00 },
1664 { 0x72, 0x14 },
1665 { 0x73, 0x54 },
1666 { 0x74, 0x00 },
1667 { 0x75, 0x8e },
1668 { 0x76, 0x00 },
1669 { 0x77, 0xff },
1670 { 0x78, 0x80 },
1671 { 0x79, 0x80 },
1672 { 0x7a, 0x80 },
1673 { 0x7b, 0xe2 },
1674 { 0x7c, 0x00 },
1675 };
1676
1677 /* 7640 and 7648. The defaults should be OK for most registers. */
1678 static const struct ov_i2c_regvals norm_7640[] = {
1679 { 0x12, 0x80 },
1680 { 0x12, 0x14 },
1681 };
1682
1683 static const struct ov_regvals init_519_ov7660[] = {
1684 { 0x5d, 0x03 }, /* Turn off suspend mode */
1685 { 0x53, 0x9b }, /* 0x9f enables the (unused) microcontroller */
1686 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
1687 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
1688 { 0xa3, 0x18 },
1689 { 0xa4, 0x04 },
1690 { 0xa5, 0x28 },
1691 { 0x37, 0x00 }, /* SetUsbInit */
1692 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
1693 /* Enable both fields, YUV Input, disable defect comp (why?) */
1694 { 0x20, 0x0c }, /* 0x0d does U <-> V swap */
1695 { 0x21, 0x38 },
1696 { 0x22, 0x1d },
1697 { 0x17, 0x50 }, /* undocumented */
1698 { 0x37, 0x00 }, /* undocumented */
1699 { 0x40, 0xff }, /* I2C timeout counter */
1700 { 0x46, 0x00 }, /* I2C clock prescaler */
1701 };
1702 static const struct ov_i2c_regvals norm_7660[] = {
1703 {OV7670_R12_COM7, OV7670_COM7_RESET},
1704 {OV7670_R11_CLKRC, 0x81},
1705 {0x92, 0x00}, /* DM_LNL */
1706 {0x93, 0x00}, /* DM_LNH */
1707 {0x9d, 0x4c}, /* BD50ST */
1708 {0x9e, 0x3f}, /* BD60ST */
1709 {OV7670_R3B_COM11, 0x02},
1710 {OV7670_R13_COM8, 0xf5},
1711 {OV7670_R10_AECH, 0x00},
1712 {OV7670_R00_GAIN, 0x00},
1713 {OV7670_R01_BLUE, 0x7c},
1714 {OV7670_R02_RED, 0x9d},
1715 {OV7670_R12_COM7, 0x00},
1716 {OV7670_R04_COM1, 00},
1717 {OV7670_R18_HSTOP, 0x01},
1718 {OV7670_R17_HSTART, 0x13},
1719 {OV7670_R32_HREF, 0x92},
1720 {OV7670_R19_VSTART, 0x02},
1721 {OV7670_R1A_VSTOP, 0x7a},
1722 {OV7670_R03_VREF, 0x00},
1723 {OV7670_R0E_COM5, 0x04},
1724 {OV7670_R0F_COM6, 0x62},
1725 {OV7670_R15_COM10, 0x00},
1726 {0x16, 0x02}, /* RSVD */
1727 {0x1b, 0x00}, /* PSHFT */
1728 {OV7670_R1E_MVFP, 0x01},
1729 {0x29, 0x3c}, /* RSVD */
1730 {0x33, 0x00}, /* CHLF */
1731 {0x34, 0x07}, /* ARBLM */
1732 {0x35, 0x84}, /* RSVD */
1733 {0x36, 0x00}, /* RSVD */
1734 {0x37, 0x04}, /* ADC */
1735 {0x39, 0x43}, /* OFON */
1736 {OV7670_R3A_TSLB, 0x00},
1737 {OV7670_R3C_COM12, 0x6c},
1738 {OV7670_R3D_COM13, 0x98},
1739 {OV7670_R3F_EDGE, 0x23},
1740 {OV7670_R40_COM15, 0xc1},
1741 {OV7670_R41_COM16, 0x22},
1742 {0x6b, 0x0a}, /* DBLV */
1743 {0xa1, 0x08}, /* RSVD */
1744 {0x69, 0x80}, /* HV */
1745 {0x43, 0xf0}, /* RSVD.. */
1746 {0x44, 0x10},
1747 {0x45, 0x78},
1748 {0x46, 0xa8},
1749 {0x47, 0x60},
1750 {0x48, 0x80},
1751 {0x59, 0xba},
1752 {0x5a, 0x9a},
1753 {0x5b, 0x22},
1754 {0x5c, 0xb9},
1755 {0x5d, 0x9b},
1756 {0x5e, 0x10},
1757 {0x5f, 0xe0},
1758 {0x60, 0x85},
1759 {0x61, 0x60},
1760 {0x9f, 0x9d}, /* RSVD */
1761 {0xa0, 0xa0}, /* DSPC2 */
1762 {0x4f, 0x60}, /* matrix */
1763 {0x50, 0x64},
1764 {0x51, 0x04},
1765 {0x52, 0x18},
1766 {0x53, 0x3c},
1767 {0x54, 0x54},
1768 {0x55, 0x40},
1769 {0x56, 0x40},
1770 {0x57, 0x40},
1771 {0x58, 0x0d}, /* matrix sign */
1772 {0x8b, 0xcc}, /* RSVD */
1773 {0x8c, 0xcc},
1774 {0x8d, 0xcf},
1775 {0x6c, 0x40}, /* gamma curve */
1776 {0x6d, 0xe0},
1777 {0x6e, 0xa0},
1778 {0x6f, 0x80},
1779 {0x70, 0x70},
1780 {0x71, 0x80},
1781 {0x72, 0x60},
1782 {0x73, 0x60},
1783 {0x74, 0x50},
1784 {0x75, 0x40},
1785 {0x76, 0x38},
1786 {0x77, 0x3c},
1787 {0x78, 0x32},
1788 {0x79, 0x1a},
1789 {0x7a, 0x28},
1790 {0x7b, 0x24},
1791 {0x7c, 0x04}, /* gamma curve */
1792 {0x7d, 0x12},
1793 {0x7e, 0x26},
1794 {0x7f, 0x46},
1795 {0x80, 0x54},
1796 {0x81, 0x64},
1797 {0x82, 0x70},
1798 {0x83, 0x7c},
1799 {0x84, 0x86},
1800 {0x85, 0x8e},
1801 {0x86, 0x9c},
1802 {0x87, 0xab},
1803 {0x88, 0xc4},
1804 {0x89, 0xd1},
1805 {0x8a, 0xe5},
1806 {OV7670_R14_COM9, 0x1e},
1807 {OV7670_R24_AEW, 0x80},
1808 {OV7670_R25_AEB, 0x72},
1809 {OV7670_R26_VPT, 0xb3},
1810 {0x62, 0x80}, /* LCC1 */
1811 {0x63, 0x80}, /* LCC2 */
1812 {0x64, 0x06}, /* LCC3 */
1813 {0x65, 0x00}, /* LCC4 */
1814 {0x66, 0x01}, /* LCC5 */
1815 {0x94, 0x0e}, /* RSVD.. */
1816 {0x95, 0x14},
1817 {OV7670_R13_COM8, OV7670_COM8_FASTAEC
1818 | OV7670_COM8_AECSTEP
1819 | OV7670_COM8_BFILT
1820 | 0x10
1821 | OV7670_COM8_AGC
1822 | OV7670_COM8_AWB
1823 | OV7670_COM8_AEC},
1824 {0xa1, 0xc8}
1825 };
1826 static const struct ov_i2c_regvals norm_9600[] = {
1827 {0x12, 0x80},
1828 {0x0c, 0x28},
1829 {0x11, 0x80},
1830 {0x13, 0xb5},
1831 {0x14, 0x3e},
1832 {0x1b, 0x04},
1833 {0x24, 0xb0},
1834 {0x25, 0x90},
1835 {0x26, 0x94},
1836 {0x35, 0x90},
1837 {0x37, 0x07},
1838 {0x38, 0x08},
1839 {0x01, 0x8e},
1840 {0x02, 0x85}
1841 };
1842
1843 /* 7670. Defaults taken from OmniVision provided data,
1844 * as provided by Jonathan Corbet of OLPC */
1845 static const struct ov_i2c_regvals norm_7670[] = {
1846 { OV7670_R12_COM7, OV7670_COM7_RESET },
1847 { OV7670_R3A_TSLB, 0x04 }, /* OV */
1848 { OV7670_R12_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1849 { OV7670_R11_CLKRC, 0x01 },
1850 /*
1851 * Set the hardware window. These values from OV don't entirely
1852 * make sense - hstop is less than hstart. But they work...
1853 */
1854 { OV7670_R17_HSTART, 0x13 },
1855 { OV7670_R18_HSTOP, 0x01 },
1856 { OV7670_R32_HREF, 0xb6 },
1857 { OV7670_R19_VSTART, 0x02 },
1858 { OV7670_R1A_VSTOP, 0x7a },
1859 { OV7670_R03_VREF, 0x0a },
1860
1861 { OV7670_R0C_COM3, 0x00 },
1862 { OV7670_R3E_COM14, 0x00 },
1863 /* Mystery scaling numbers */
1864 { 0x70, 0x3a },
1865 { 0x71, 0x35 },
1866 { 0x72, 0x11 },
1867 { 0x73, 0xf0 },
1868 { 0xa2, 0x02 },
1869 /* { OV7670_R15_COM10, 0x0 }, */
1870
1871 /* Gamma curve values */
1872 { 0x7a, 0x20 },
1873 { 0x7b, 0x10 },
1874 { 0x7c, 0x1e },
1875 { 0x7d, 0x35 },
1876 { 0x7e, 0x5a },
1877 { 0x7f, 0x69 },
1878 { 0x80, 0x76 },
1879 { 0x81, 0x80 },
1880 { 0x82, 0x88 },
1881 { 0x83, 0x8f },
1882 { 0x84, 0x96 },
1883 { 0x85, 0xa3 },
1884 { 0x86, 0xaf },
1885 { 0x87, 0xc4 },
1886 { 0x88, 0xd7 },
1887 { 0x89, 0xe8 },
1888
1889 /* AGC and AEC parameters. Note we start by disabling those features,
1890 then turn them only after tweaking the values. */
1891 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1892 | OV7670_COM8_AECSTEP
1893 | OV7670_COM8_BFILT },
1894 { OV7670_R00_GAIN, 0x00 },
1895 { OV7670_R10_AECH, 0x00 },
1896 { OV7670_R0D_COM4, 0x40 }, /* magic reserved bit */
1897 { OV7670_R14_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1898 { OV7670_RA5_BD50MAX, 0x05 },
1899 { OV7670_RAB_BD60MAX, 0x07 },
1900 { OV7670_R24_AEW, 0x95 },
1901 { OV7670_R25_AEB, 0x33 },
1902 { OV7670_R26_VPT, 0xe3 },
1903 { OV7670_R9F_HAECC1, 0x78 },
1904 { OV7670_RA0_HAECC2, 0x68 },
1905 { 0xa1, 0x03 }, /* magic */
1906 { OV7670_RA6_HAECC3, 0xd8 },
1907 { OV7670_RA7_HAECC4, 0xd8 },
1908 { OV7670_RA8_HAECC5, 0xf0 },
1909 { OV7670_RA9_HAECC6, 0x90 },
1910 { OV7670_RAA_HAECC7, 0x94 },
1911 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1912 | OV7670_COM8_AECSTEP
1913 | OV7670_COM8_BFILT
1914 | OV7670_COM8_AGC
1915 | OV7670_COM8_AEC },
1916
1917 /* Almost all of these are magic "reserved" values. */
1918 { OV7670_R0E_COM5, 0x61 },
1919 { OV7670_R0F_COM6, 0x4b },
1920 { 0x16, 0x02 },
1921 { OV7670_R1E_MVFP, 0x07 },
1922 { 0x21, 0x02 },
1923 { 0x22, 0x91 },
1924 { 0x29, 0x07 },
1925 { 0x33, 0x0b },
1926 { 0x35, 0x0b },
1927 { 0x37, 0x1d },
1928 { 0x38, 0x71 },
1929 { 0x39, 0x2a },
1930 { OV7670_R3C_COM12, 0x78 },
1931 { 0x4d, 0x40 },
1932 { 0x4e, 0x20 },
1933 { OV7670_R69_GFIX, 0x00 },
1934 { 0x6b, 0x4a },
1935 { 0x74, 0x10 },
1936 { 0x8d, 0x4f },
1937 { 0x8e, 0x00 },
1938 { 0x8f, 0x00 },
1939 { 0x90, 0x00 },
1940 { 0x91, 0x00 },
1941 { 0x96, 0x00 },
1942 { 0x9a, 0x00 },
1943 { 0xb0, 0x84 },
1944 { 0xb1, 0x0c },
1945 { 0xb2, 0x0e },
1946 { 0xb3, 0x82 },
1947 { 0xb8, 0x0a },
1948
1949 /* More reserved magic, some of which tweaks white balance */
1950 { 0x43, 0x0a },
1951 { 0x44, 0xf0 },
1952 { 0x45, 0x34 },
1953 { 0x46, 0x58 },
1954 { 0x47, 0x28 },
1955 { 0x48, 0x3a },
1956 { 0x59, 0x88 },
1957 { 0x5a, 0x88 },
1958 { 0x5b, 0x44 },
1959 { 0x5c, 0x67 },
1960 { 0x5d, 0x49 },
1961 { 0x5e, 0x0e },
1962 { 0x6c, 0x0a },
1963 { 0x6d, 0x55 },
1964 { 0x6e, 0x11 },
1965 { 0x6f, 0x9f }, /* "9e for advance AWB" */
1966 { 0x6a, 0x40 },
1967 { OV7670_R01_BLUE, 0x40 },
1968 { OV7670_R02_RED, 0x60 },
1969 { OV7670_R13_COM8, OV7670_COM8_FASTAEC
1970 | OV7670_COM8_AECSTEP
1971 | OV7670_COM8_BFILT
1972 | OV7670_COM8_AGC
1973 | OV7670_COM8_AEC
1974 | OV7670_COM8_AWB },
1975
1976 /* Matrix coefficients */
1977 { 0x4f, 0x80 },
1978 { 0x50, 0x80 },
1979 { 0x51, 0x00 },
1980 { 0x52, 0x22 },
1981 { 0x53, 0x5e },
1982 { 0x54, 0x80 },
1983 { 0x58, 0x9e },
1984
1985 { OV7670_R41_COM16, OV7670_COM16_AWBGAIN },
1986 { OV7670_R3F_EDGE, 0x00 },
1987 { 0x75, 0x05 },
1988 { 0x76, 0xe1 },
1989 { 0x4c, 0x00 },
1990 { 0x77, 0x01 },
1991 { OV7670_R3D_COM13, OV7670_COM13_GAMMA
1992 | OV7670_COM13_UVSAT
1993 | 2}, /* was 3 */
1994 { 0x4b, 0x09 },
1995 { 0xc9, 0x60 },
1996 { OV7670_R41_COM16, 0x38 },
1997 { 0x56, 0x40 },
1998
1999 { 0x34, 0x11 },
2000 { OV7670_R3B_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
2001 { 0xa4, 0x88 },
2002 { 0x96, 0x00 },
2003 { 0x97, 0x30 },
2004 { 0x98, 0x20 },
2005 { 0x99, 0x30 },
2006 { 0x9a, 0x84 },
2007 { 0x9b, 0x29 },
2008 { 0x9c, 0x03 },
2009 { 0x9d, 0x4c },
2010 { 0x9e, 0x3f },
2011 { 0x78, 0x04 },
2012
2013 /* Extra-weird stuff. Some sort of multiplexor register */
2014 { 0x79, 0x01 },
2015 { 0xc8, 0xf0 },
2016 { 0x79, 0x0f },
2017 { 0xc8, 0x00 },
2018 { 0x79, 0x10 },
2019 { 0xc8, 0x7e },
2020 { 0x79, 0x0a },
2021 { 0xc8, 0x80 },
2022 { 0x79, 0x0b },
2023 { 0xc8, 0x01 },
2024 { 0x79, 0x0c },
2025 { 0xc8, 0x0f },
2026 { 0x79, 0x0d },
2027 { 0xc8, 0x20 },
2028 { 0x79, 0x09 },
2029 { 0xc8, 0x80 },
2030 { 0x79, 0x02 },
2031 { 0xc8, 0xc0 },
2032 { 0x79, 0x03 },
2033 { 0xc8, 0x40 },
2034 { 0x79, 0x05 },
2035 { 0xc8, 0x30 },
2036 { 0x79, 0x26 },
2037 };
2038
2039 static const struct ov_i2c_regvals norm_8610[] = {
2040 { 0x12, 0x80 },
2041 { 0x00, 0x00 },
2042 { 0x01, 0x80 },
2043 { 0x02, 0x80 },
2044 { 0x03, 0xc0 },
2045 { 0x04, 0x30 },
2046 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
2047 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
2048 { 0x0a, 0x86 },
2049 { 0x0b, 0xb0 },
2050 { 0x0c, 0x20 },
2051 { 0x0d, 0x20 },
2052 { 0x11, 0x01 },
2053 { 0x12, 0x25 },
2054 { 0x13, 0x01 },
2055 { 0x14, 0x04 },
2056 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
2057 { 0x16, 0x03 },
2058 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
2059 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
2060 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
2061 { 0x1a, 0xf5 },
2062 { 0x1b, 0x00 },
2063 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
2064 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
2065 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
2066 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
2067 { 0x26, 0xa2 },
2068 { 0x27, 0xea },
2069 { 0x28, 0x00 },
2070 { 0x29, 0x00 },
2071 { 0x2a, 0x80 },
2072 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
2073 { 0x2c, 0xac },
2074 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
2075 { 0x2e, 0x80 },
2076 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
2077 { 0x4c, 0x00 },
2078 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
2079 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
2080 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
2081 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
2082 { 0x63, 0xff },
2083 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
2084 * maybe thats wrong */
2085 { 0x65, 0x00 },
2086 { 0x66, 0x55 },
2087 { 0x67, 0xb0 },
2088 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
2089 { 0x69, 0x02 },
2090 { 0x6a, 0x22 },
2091 { 0x6b, 0x00 },
2092 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
2093 * deleting bit7 colors the first images red */
2094 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
2095 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
2096 { 0x6f, 0x01 },
2097 { 0x70, 0x8b },
2098 { 0x71, 0x00 },
2099 { 0x72, 0x14 },
2100 { 0x73, 0x54 },
2101 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
2102 { 0x75, 0x0e },
2103 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
2104 { 0x77, 0xff },
2105 { 0x78, 0x80 },
2106 { 0x79, 0x80 },
2107 { 0x7a, 0x80 },
2108 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
2109 { 0x7c, 0x00 },
2110 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
2111 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
2112 { 0x7f, 0xfb },
2113 { 0x80, 0x28 },
2114 { 0x81, 0x00 },
2115 { 0x82, 0x23 },
2116 { 0x83, 0x0b },
2117 { 0x84, 0x00 },
2118 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
2119 { 0x86, 0xc9 },
2120 { 0x87, 0x00 },
2121 { 0x88, 0x00 },
2122 { 0x89, 0x01 },
2123 { 0x12, 0x20 },
2124 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
2125 };
2126
2127 static unsigned char ov7670_abs_to_sm(unsigned char v)
2128 {
2129 if (v > 127)
2130 return v & 0x7f;
2131 return (128 - v) | 0x80;
2132 }
2133
2134 /* Write a OV519 register */
2135 static void reg_w(struct sd *sd, u16 index, u16 value)
2136 {
2137 int ret, req = 0;
2138
2139 if (sd->gspca_dev.usb_err < 0)
2140 return;
2141
2142 switch (sd->bridge) {
2143 case BRIDGE_OV511:
2144 case BRIDGE_OV511PLUS:
2145 req = 2;
2146 break;
2147 case BRIDGE_OVFX2:
2148 req = 0x0a;
2149 /* fall through */
2150 case BRIDGE_W9968CF:
2151 PDEBUG(D_USBO, "SET %02x %04x %04x",
2152 req, value, index);
2153 ret = usb_control_msg(sd->gspca_dev.dev,
2154 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2155 req,
2156 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2157 value, index, NULL, 0, 500);
2158 goto leave;
2159 default:
2160 req = 1;
2161 }
2162
2163 PDEBUG(D_USBO, "SET %02x 0000 %04x %02x",
2164 req, index, value);
2165 sd->gspca_dev.usb_buf[0] = value;
2166 ret = usb_control_msg(sd->gspca_dev.dev,
2167 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2168 req,
2169 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2170 0, index,
2171 sd->gspca_dev.usb_buf, 1, 500);
2172 leave:
2173 if (ret < 0) {
2174 err("reg_w %02x failed %d", index, ret);
2175 sd->gspca_dev.usb_err = ret;
2176 return;
2177 }
2178 }
2179
2180 /* Read from a OV519 register, note not valid for the w9968cf!! */
2181 /* returns: negative is error, pos or zero is data */
2182 static int reg_r(struct sd *sd, u16 index)
2183 {
2184 int ret;
2185 int req;
2186
2187 if (sd->gspca_dev.usb_err < 0)
2188 return -1;
2189
2190 switch (sd->bridge) {
2191 case BRIDGE_OV511:
2192 case BRIDGE_OV511PLUS:
2193 req = 3;
2194 break;
2195 case BRIDGE_OVFX2:
2196 req = 0x0b;
2197 break;
2198 default:
2199 req = 1;
2200 }
2201
2202 ret = usb_control_msg(sd->gspca_dev.dev,
2203 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2204 req,
2205 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2206 0, index, sd->gspca_dev.usb_buf, 1, 500);
2207
2208 if (ret >= 0) {
2209 ret = sd->gspca_dev.usb_buf[0];
2210 PDEBUG(D_USBI, "GET %02x 0000 %04x %02x",
2211 req, index, ret);
2212 } else {
2213 err("reg_r %02x failed %d", index, ret);
2214 sd->gspca_dev.usb_err = ret;
2215 }
2216
2217 return ret;
2218 }
2219
2220 /* Read 8 values from a OV519 register */
2221 static int reg_r8(struct sd *sd,
2222 u16 index)
2223 {
2224 int ret;
2225
2226 if (sd->gspca_dev.usb_err < 0)
2227 return -1;
2228
2229 ret = usb_control_msg(sd->gspca_dev.dev,
2230 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2231 1, /* REQ_IO */
2232 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2233 0, index, sd->gspca_dev.usb_buf, 8, 500);
2234
2235 if (ret >= 0) {
2236 ret = sd->gspca_dev.usb_buf[0];
2237 } else {
2238 err("reg_r8 %02x failed %d", index, ret);
2239 sd->gspca_dev.usb_err = ret;
2240 }
2241
2242 return ret;
2243 }
2244
2245 /*
2246 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
2247 * the same position as 1's in "mask" are cleared and set to "value". Bits
2248 * that are in the same position as 0's in "mask" are preserved, regardless
2249 * of their respective state in "value".
2250 */
2251 static void reg_w_mask(struct sd *sd,
2252 u16 index,
2253 u8 value,
2254 u8 mask)
2255 {
2256 int ret;
2257 u8 oldval;
2258
2259 if (mask != 0xff) {
2260 value &= mask; /* Enforce mask on value */
2261 ret = reg_r(sd, index);
2262 if (ret < 0)
2263 return;
2264
2265 oldval = ret & ~mask; /* Clear the masked bits */
2266 value |= oldval; /* Set the desired bits */
2267 }
2268 reg_w(sd, index, value);
2269 }
2270
2271 /*
2272 * Writes multiple (n) byte value to a single register. Only valid with certain
2273 * registers (0x30 and 0xc4 - 0xce).
2274 */
2275 static void ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
2276 {
2277 int ret;
2278
2279 if (sd->gspca_dev.usb_err < 0)
2280 return;
2281
2282 *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
2283
2284 ret = usb_control_msg(sd->gspca_dev.dev,
2285 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2286 1 /* REG_IO */,
2287 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2288 0, index,
2289 sd->gspca_dev.usb_buf, n, 500);
2290 if (ret < 0) {
2291 err("reg_w32 %02x failed %d", index, ret);
2292 sd->gspca_dev.usb_err = ret;
2293 }
2294 }
2295
2296 static void ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
2297 {
2298 int rc, retries;
2299
2300 PDEBUG(D_USBO, "ov511_i2c_w %02x %02x", reg, value);
2301
2302 /* Three byte write cycle */
2303 for (retries = 6; ; ) {
2304 /* Select camera register */
2305 reg_w(sd, R51x_I2C_SADDR_3, reg);
2306
2307 /* Write "value" to I2C data port of OV511 */
2308 reg_w(sd, R51x_I2C_DATA, value);
2309
2310 /* Initiate 3-byte write cycle */
2311 reg_w(sd, R511_I2C_CTL, 0x01);
2312
2313 do {
2314 rc = reg_r(sd, R511_I2C_CTL);
2315 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2316
2317 if (rc < 0)
2318 return;
2319
2320 if ((rc & 2) == 0) /* Ack? */
2321 break;
2322 if (--retries < 0) {
2323 PDEBUG(D_USBO, "i2c write retries exhausted");
2324 return;
2325 }
2326 }
2327 }
2328
2329 static int ov511_i2c_r(struct sd *sd, u8 reg)
2330 {
2331 int rc, value, retries;
2332
2333 /* Two byte write cycle */
2334 for (retries = 6; ; ) {
2335 /* Select camera register */
2336 reg_w(sd, R51x_I2C_SADDR_2, reg);
2337
2338 /* Initiate 2-byte write cycle */
2339 reg_w(sd, R511_I2C_CTL, 0x03);
2340
2341 do {
2342 rc = reg_r(sd, R511_I2C_CTL);
2343 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2344
2345 if (rc < 0)
2346 return rc;
2347
2348 if ((rc & 2) == 0) /* Ack? */
2349 break;
2350
2351 /* I2C abort */
2352 reg_w(sd, R511_I2C_CTL, 0x10);
2353
2354 if (--retries < 0) {
2355 PDEBUG(D_USBI, "i2c write retries exhausted");
2356 return -1;
2357 }
2358 }
2359
2360 /* Two byte read cycle */
2361 for (retries = 6; ; ) {
2362 /* Initiate 2-byte read cycle */
2363 reg_w(sd, R511_I2C_CTL, 0x05);
2364
2365 do {
2366 rc = reg_r(sd, R511_I2C_CTL);
2367 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2368
2369 if (rc < 0)
2370 return rc;
2371
2372 if ((rc & 2) == 0) /* Ack? */
2373 break;
2374
2375 /* I2C abort */
2376 reg_w(sd, R511_I2C_CTL, 0x10);
2377
2378 if (--retries < 0) {
2379 PDEBUG(D_USBI, "i2c read retries exhausted");
2380 return -1;
2381 }
2382 }
2383
2384 value = reg_r(sd, R51x_I2C_DATA);
2385
2386 PDEBUG(D_USBI, "ov511_i2c_r %02x %02x", reg, value);
2387
2388 /* This is needed to make i2c_w() work */
2389 reg_w(sd, R511_I2C_CTL, 0x05);
2390
2391 return value;
2392 }
2393
2394 /*
2395 * The OV518 I2C I/O procedure is different, hence, this function.
2396 * This is normally only called from i2c_w(). Note that this function
2397 * always succeeds regardless of whether the sensor is present and working.
2398 */
2399 static void ov518_i2c_w(struct sd *sd,
2400 u8 reg,
2401 u8 value)
2402 {
2403 PDEBUG(D_USBO, "ov518_i2c_w %02x %02x", reg, value);
2404
2405 /* Select camera register */
2406 reg_w(sd, R51x_I2C_SADDR_3, reg);
2407
2408 /* Write "value" to I2C data port of OV511 */
2409 reg_w(sd, R51x_I2C_DATA, value);
2410
2411 /* Initiate 3-byte write cycle */
2412 reg_w(sd, R518_I2C_CTL, 0x01);
2413
2414 /* wait for write complete */
2415 msleep(4);
2416 reg_r8(sd, R518_I2C_CTL);
2417 }
2418
2419 /*
2420 * returns: negative is error, pos or zero is data
2421 *
2422 * The OV518 I2C I/O procedure is different, hence, this function.
2423 * This is normally only called from i2c_r(). Note that this function
2424 * always succeeds regardless of whether the sensor is present and working.
2425 */
2426 static int ov518_i2c_r(struct sd *sd, u8 reg)
2427 {
2428 int value;
2429
2430 /* Select camera register */
2431 reg_w(sd, R51x_I2C_SADDR_2, reg);
2432
2433 /* Initiate 2-byte write cycle */
2434 reg_w(sd, R518_I2C_CTL, 0x03);
2435 reg_r8(sd, R518_I2C_CTL);
2436
2437 /* Initiate 2-byte read cycle */
2438 reg_w(sd, R518_I2C_CTL, 0x05);
2439 reg_r8(sd, R518_I2C_CTL);
2440
2441 value = reg_r(sd, R51x_I2C_DATA);
2442 PDEBUG(D_USBI, "ov518_i2c_r %02x %02x", reg, value);
2443 return value;
2444 }
2445
2446 static void ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
2447 {
2448 int ret;
2449
2450 if (sd->gspca_dev.usb_err < 0)
2451 return;
2452
2453 ret = usb_control_msg(sd->gspca_dev.dev,
2454 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2455 0x02,
2456 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2457 (u16) value, (u16) reg, NULL, 0, 500);
2458
2459 if (ret < 0) {
2460 err("ovfx2_i2c_w %02x failed %d", reg, ret);
2461 sd->gspca_dev.usb_err = ret;
2462 }
2463
2464 PDEBUG(D_USBO, "ovfx2_i2c_w %02x %02x", reg, value);
2465 }
2466
2467 static int ovfx2_i2c_r(struct sd *sd, u8 reg)
2468 {
2469 int ret;
2470
2471 if (sd->gspca_dev.usb_err < 0)
2472 return -1;
2473
2474 ret = usb_control_msg(sd->gspca_dev.dev,
2475 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2476 0x03,
2477 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2478 0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
2479
2480 if (ret >= 0) {
2481 ret = sd->gspca_dev.usb_buf[0];
2482 PDEBUG(D_USBI, "ovfx2_i2c_r %02x %02x", reg, ret);
2483 } else {
2484 err("ovfx2_i2c_r %02x failed %d", reg, ret);
2485 sd->gspca_dev.usb_err = ret;
2486 }
2487
2488 return ret;
2489 }
2490
2491 static void i2c_w(struct sd *sd, u8 reg, u8 value)
2492 {
2493 if (sd->sensor_reg_cache[reg] == value)
2494 return;
2495
2496 switch (sd->bridge) {
2497 case BRIDGE_OV511:
2498 case BRIDGE_OV511PLUS:
2499 ov511_i2c_w(sd, reg, value);
2500 break;
2501 case BRIDGE_OV518:
2502 case BRIDGE_OV518PLUS:
2503 case BRIDGE_OV519:
2504 ov518_i2c_w(sd, reg, value);
2505 break;
2506 case BRIDGE_OVFX2:
2507 ovfx2_i2c_w(sd, reg, value);
2508 break;
2509 case BRIDGE_W9968CF:
2510 w9968cf_i2c_w(sd, reg, value);
2511 break;
2512 }
2513
2514 if (sd->gspca_dev.usb_err >= 0) {
2515 /* Up on sensor reset empty the register cache */
2516 if (reg == 0x12 && (value & 0x80))
2517 memset(sd->sensor_reg_cache, -1,
2518 sizeof(sd->sensor_reg_cache));
2519 else
2520 sd->sensor_reg_cache[reg] = value;
2521 }
2522 }
2523
2524 static int i2c_r(struct sd *sd, u8 reg)
2525 {
2526 int ret = -1;
2527
2528 if (sd->sensor_reg_cache[reg] != -1)
2529 return sd->sensor_reg_cache[reg];
2530
2531 switch (sd->bridge) {
2532 case BRIDGE_OV511:
2533 case BRIDGE_OV511PLUS:
2534 ret = ov511_i2c_r(sd, reg);
2535 break;
2536 case BRIDGE_OV518:
2537 case BRIDGE_OV518PLUS:
2538 case BRIDGE_OV519:
2539 ret = ov518_i2c_r(sd, reg);
2540 break;
2541 case BRIDGE_OVFX2:
2542 ret = ovfx2_i2c_r(sd, reg);
2543 break;
2544 case BRIDGE_W9968CF:
2545 ret = w9968cf_i2c_r(sd, reg);
2546 break;
2547 }
2548
2549 if (ret >= 0)
2550 sd->sensor_reg_cache[reg] = ret;
2551
2552 return ret;
2553 }
2554
2555 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2556 * the same position as 1's in "mask" are cleared and set to "value". Bits
2557 * that are in the same position as 0's in "mask" are preserved, regardless
2558 * of their respective state in "value".
2559 */
2560 static void i2c_w_mask(struct sd *sd,
2561 u8 reg,
2562 u8 value,
2563 u8 mask)
2564 {
2565 int rc;
2566 u8 oldval;
2567
2568 value &= mask; /* Enforce mask on value */
2569 rc = i2c_r(sd, reg);
2570 if (rc < 0)
2571 return;
2572 oldval = rc & ~mask; /* Clear the masked bits */
2573 value |= oldval; /* Set the desired bits */
2574 i2c_w(sd, reg, value);
2575 }
2576
2577 /* Temporarily stops OV511 from functioning. Must do this before changing
2578 * registers while the camera is streaming */
2579 static inline void ov51x_stop(struct sd *sd)
2580 {
2581 PDEBUG(D_STREAM, "stopping");
2582 sd->stopped = 1;
2583 switch (sd->bridge) {
2584 case BRIDGE_OV511:
2585 case BRIDGE_OV511PLUS:
2586 reg_w(sd, R51x_SYS_RESET, 0x3d);
2587 break;
2588 case BRIDGE_OV518:
2589 case BRIDGE_OV518PLUS:
2590 reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2591 break;
2592 case BRIDGE_OV519:
2593 reg_w(sd, OV519_R51_RESET1, 0x0f);
2594 reg_w(sd, OV519_R51_RESET1, 0x00);
2595 reg_w(sd, 0x22, 0x00); /* FRAR */
2596 break;
2597 case BRIDGE_OVFX2:
2598 reg_w_mask(sd, 0x0f, 0x00, 0x02);
2599 break;
2600 case BRIDGE_W9968CF:
2601 reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2602 break;
2603 }
2604 }
2605
2606 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2607 * actually stopped (for performance). */
2608 static inline void ov51x_restart(struct sd *sd)
2609 {
2610 PDEBUG(D_STREAM, "restarting");
2611 if (!sd->stopped)
2612 return;
2613 sd->stopped = 0;
2614
2615 /* Reinitialize the stream */
2616 switch (sd->bridge) {
2617 case BRIDGE_OV511:
2618 case BRIDGE_OV511PLUS:
2619 reg_w(sd, R51x_SYS_RESET, 0x00);
2620 break;
2621 case BRIDGE_OV518:
2622 case BRIDGE_OV518PLUS:
2623 reg_w(sd, 0x2f, 0x80);
2624 reg_w(sd, R51x_SYS_RESET, 0x00);
2625 break;
2626 case BRIDGE_OV519:
2627 reg_w(sd, OV519_R51_RESET1, 0x0f);
2628 reg_w(sd, OV519_R51_RESET1, 0x00);
2629 reg_w(sd, 0x22, 0x1d); /* FRAR */
2630 break;
2631 case BRIDGE_OVFX2:
2632 reg_w_mask(sd, 0x0f, 0x02, 0x02);
2633 break;
2634 case BRIDGE_W9968CF:
2635 reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2636 break;
2637 }
2638 }
2639
2640 static void ov51x_set_slave_ids(struct sd *sd, u8 slave);
2641
2642 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2643 * is synchronized. Returns <0 on failure.
2644 */
2645 static int init_ov_sensor(struct sd *sd, u8 slave)
2646 {
2647 int i;
2648
2649 ov51x_set_slave_ids(sd, slave);
2650
2651 /* Reset the sensor */
2652 i2c_w(sd, 0x12, 0x80);
2653
2654 /* Wait for it to initialize */
2655 msleep(150);
2656
2657 for (i = 0; i < i2c_detect_tries; i++) {
2658 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2659 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2660 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2661 return 0;
2662 }
2663
2664 /* Reset the sensor */
2665 i2c_w(sd, 0x12, 0x80);
2666
2667 /* Wait for it to initialize */
2668 msleep(150);
2669
2670 /* Dummy read to sync I2C */
2671 if (i2c_r(sd, 0x00) < 0)
2672 return -1;
2673 }
2674 return -1;
2675 }
2676
2677 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2678 * and the read slave will be set to (slave + 1).
2679 * This should not be called from outside the i2c I/O functions.
2680 * Sets I2C read and write slave IDs. Returns <0 for error
2681 */
2682 static void ov51x_set_slave_ids(struct sd *sd,
2683 u8 slave)
2684 {
2685 switch (sd->bridge) {
2686 case BRIDGE_OVFX2:
2687 reg_w(sd, OVFX2_I2C_ADDR, slave);
2688 return;
2689 case BRIDGE_W9968CF:
2690 sd->sensor_addr = slave;
2691 return;
2692 }
2693
2694 reg_w(sd, R51x_I2C_W_SID, slave);
2695 reg_w(sd, R51x_I2C_R_SID, slave + 1);
2696 }
2697
2698 static void write_regvals(struct sd *sd,
2699 const struct ov_regvals *regvals,
2700 int n)
2701 {
2702 while (--n >= 0) {
2703 reg_w(sd, regvals->reg, regvals->val);
2704 regvals++;
2705 }
2706 }
2707
2708 static void write_i2c_regvals(struct sd *sd,
2709 const struct ov_i2c_regvals *regvals,
2710 int n)
2711 {
2712 while (--n >= 0) {
2713 i2c_w(sd, regvals->reg, regvals->val);
2714 regvals++;
2715 }
2716 }
2717
2718 /****************************************************************************
2719 *
2720 * OV511 and sensor configuration
2721 *
2722 ***************************************************************************/
2723
2724 /* This initializes the OV2x10 / OV3610 / OV3620 / OV9600 */
2725 static void ov_hires_configure(struct sd *sd)
2726 {
2727 int high, low;
2728
2729 if (sd->bridge != BRIDGE_OVFX2) {
2730 err("error hires sensors only supported with ovfx2");
2731 return;
2732 }
2733
2734 PDEBUG(D_PROBE, "starting ov hires configuration");
2735
2736 /* Detect sensor (sub)type */
2737 high = i2c_r(sd, 0x0a);
2738 low = i2c_r(sd, 0x0b);
2739 /* info("%x, %x", high, low); */
2740 switch (high) {
2741 case 0x96:
2742 switch (low) {
2743 case 0x40:
2744 PDEBUG(D_PROBE, "Sensor is a OV2610");
2745 sd->sensor = SEN_OV2610;
2746 return;
2747 case 0x41:
2748 PDEBUG(D_PROBE, "Sensor is a OV2610AE");
2749 sd->sensor = SEN_OV2610AE;
2750 return;
2751 case 0xb1:
2752 PDEBUG(D_PROBE, "Sensor is a OV9600");
2753 sd->sensor = SEN_OV9600;
2754 return;
2755 }
2756 break;
2757 case 0x36:
2758 if ((low & 0x0f) == 0x00) {
2759 PDEBUG(D_PROBE, "Sensor is a OV3610");
2760 sd->sensor = SEN_OV3610;
2761 return;
2762 }
2763 break;
2764 }
2765 err("Error unknown sensor type: %02x%02x", high, low);
2766 }
2767
2768 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2769 * the same register settings as the OV8610, since they are very similar.
2770 */
2771 static void ov8xx0_configure(struct sd *sd)
2772 {
2773 int rc;
2774
2775 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2776
2777 /* Detect sensor (sub)type */
2778 rc = i2c_r(sd, OV7610_REG_COM_I);
2779 if (rc < 0) {
2780 PDEBUG(D_ERR, "Error detecting sensor type");
2781 return;
2782 }
2783 if ((rc & 3) == 1)
2784 sd->sensor = SEN_OV8610;
2785 else
2786 err("Unknown image sensor version: %d", rc & 3);
2787 }
2788
2789 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2790 * the same register settings as the OV7610, since they are very similar.
2791 */
2792 static void ov7xx0_configure(struct sd *sd)
2793 {
2794 int rc, high, low;
2795
2796 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2797
2798 /* Detect sensor (sub)type */
2799 rc = i2c_r(sd, OV7610_REG_COM_I);
2800
2801 /* add OV7670 here
2802 * it appears to be wrongly detected as a 7610 by default */
2803 if (rc < 0) {
2804 PDEBUG(D_ERR, "Error detecting sensor type");
2805 return;
2806 }
2807 if ((rc & 3) == 3) {
2808 /* quick hack to make OV7670s work */
2809 high = i2c_r(sd, 0x0a);
2810 low = i2c_r(sd, 0x0b);
2811 /* info("%x, %x", high, low); */
2812 if (high == 0x76 && (low & 0xf0) == 0x70) {
2813 PDEBUG(D_PROBE, "Sensor is an OV76%02x", low);
2814 sd->sensor = SEN_OV7670;
2815 } else {
2816 PDEBUG(D_PROBE, "Sensor is an OV7610");
2817 sd->sensor = SEN_OV7610;
2818 }
2819 } else if ((rc & 3) == 1) {
2820 /* I don't know what's different about the 76BE yet. */
2821 if (i2c_r(sd, 0x15) & 1) {
2822 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2823 sd->sensor = SEN_OV7620AE;
2824 } else {
2825 PDEBUG(D_PROBE, "Sensor is an OV76BE");
2826 sd->sensor = SEN_OV76BE;
2827 }
2828 } else if ((rc & 3) == 0) {
2829 /* try to read product id registers */
2830 high = i2c_r(sd, 0x0a);
2831 if (high < 0) {
2832 PDEBUG(D_ERR, "Error detecting camera chip PID");
2833 return;
2834 }
2835 low = i2c_r(sd, 0x0b);
2836 if (low < 0) {
2837 PDEBUG(D_ERR, "Error detecting camera chip VER");
2838 return;
2839 }
2840 if (high == 0x76) {
2841 switch (low) {
2842 case 0x30:
2843 err("Sensor is an OV7630/OV7635");
2844 err("7630 is not supported by this driver");
2845 return;
2846 case 0x40:
2847 PDEBUG(D_PROBE, "Sensor is an OV7645");
2848 sd->sensor = SEN_OV7640; /* FIXME */
2849 break;
2850 case 0x45:
2851 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2852 sd->sensor = SEN_OV7640; /* FIXME */
2853 break;
2854 case 0x48:
2855 PDEBUG(D_PROBE, "Sensor is an OV7648");
2856 sd->sensor = SEN_OV7648;
2857 break;
2858 case 0x60:
2859 PDEBUG(D_PROBE, "Sensor is a OV7660");
2860 sd->sensor = SEN_OV7660;
2861 break;
2862 default:
2863 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
2864 return;
2865 }
2866 } else {
2867 PDEBUG(D_PROBE, "Sensor is an OV7620");
2868 sd->sensor = SEN_OV7620;
2869 }
2870 } else {
2871 err("Unknown image sensor version: %d", rc & 3);
2872 }
2873 }
2874
2875 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2876 static void ov6xx0_configure(struct sd *sd)
2877 {
2878 int rc;
2879 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2880
2881 /* Detect sensor (sub)type */
2882 rc = i2c_r(sd, OV7610_REG_COM_I);
2883 if (rc < 0) {
2884 PDEBUG(D_ERR, "Error detecting sensor type");
2885 return;
2886 }
2887
2888 /* Ugh. The first two bits are the version bits, but
2889 * the entire register value must be used. I guess OVT
2890 * underestimated how many variants they would make. */
2891 switch (rc) {
2892 case 0x00:
2893 sd->sensor = SEN_OV6630;
2894 warn("WARNING: Sensor is an OV66308. Your camera may have");
2895 warn("been misdetected in previous driver versions.");
2896 break;
2897 case 0x01:
2898 sd->sensor = SEN_OV6620;
2899 PDEBUG(D_PROBE, "Sensor is an OV6620");
2900 break;
2901 case 0x02:
2902 sd->sensor = SEN_OV6630;
2903 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2904 break;
2905 case 0x03:
2906 sd->sensor = SEN_OV66308AF;
2907 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2908 break;
2909 case 0x90:
2910 sd->sensor = SEN_OV6630;
2911 warn("WARNING: Sensor is an OV66307. Your camera may have");
2912 warn("been misdetected in previous driver versions.");
2913 break;
2914 default:
2915 err("FATAL: Unknown sensor version: 0x%02x", rc);
2916 return;
2917 }
2918
2919 /* Set sensor-specific vars */
2920 sd->sif = 1;
2921 }
2922
2923 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2924 static void ov51x_led_control(struct sd *sd, int on)
2925 {
2926 if (sd->invert_led)
2927 on = !on;
2928
2929 switch (sd->bridge) {
2930 /* OV511 has no LED control */
2931 case BRIDGE_OV511PLUS:
2932 reg_w(sd, R511_SYS_LED_CTL, on);
2933 break;
2934 case BRIDGE_OV518:
2935 case BRIDGE_OV518PLUS:
2936 reg_w_mask(sd, R518_GPIO_OUT, 0x02 * on, 0x02);
2937 break;
2938 case BRIDGE_OV519:
2939 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, on, 1);
2940 break;
2941 }
2942 }
2943
2944 static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2945 {
2946 struct sd *sd = (struct sd *) gspca_dev;
2947
2948 if (!sd->snapshot_needs_reset)
2949 return;
2950
2951 /* Note it is important that we clear sd->snapshot_needs_reset,
2952 before actually clearing the snapshot state in the bridge
2953 otherwise we might race with the pkt_scan interrupt handler */
2954 sd->snapshot_needs_reset = 0;
2955
2956 switch (sd->bridge) {
2957 case BRIDGE_OV511:
2958 case BRIDGE_OV511PLUS:
2959 reg_w(sd, R51x_SYS_SNAP, 0x02);
2960 reg_w(sd, R51x_SYS_SNAP, 0x00);
2961 break;
2962 case BRIDGE_OV518:
2963 case BRIDGE_OV518PLUS:
2964 reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2965 reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2966 break;
2967 case BRIDGE_OV519:
2968 reg_w(sd, R51x_SYS_RESET, 0x40);
2969 reg_w(sd, R51x_SYS_RESET, 0x00);
2970 break;
2971 }
2972 }
2973
2974 static void ov51x_upload_quan_tables(struct sd *sd)
2975 {
2976 const unsigned char yQuanTable511[] = {
2977 0, 1, 1, 2, 2, 3, 3, 4,
2978 1, 1, 1, 2, 2, 3, 4, 4,
2979 1, 1, 2, 2, 3, 4, 4, 4,
2980 2, 2, 2, 3, 4, 4, 4, 4,
2981 2, 2, 3, 4, 4, 5, 5, 5,
2982 3, 3, 4, 4, 5, 5, 5, 5,
2983 3, 4, 4, 4, 5, 5, 5, 5,
2984 4, 4, 4, 4, 5, 5, 5, 5
2985 };
2986
2987 const unsigned char uvQuanTable511[] = {
2988 0, 2, 2, 3, 4, 4, 4, 4,
2989 2, 2, 2, 4, 4, 4, 4, 4,
2990 2, 2, 3, 4, 4, 4, 4, 4,
2991 3, 4, 4, 4, 4, 4, 4, 4,
2992 4, 4, 4, 4, 4, 4, 4, 4,
2993 4, 4, 4, 4, 4, 4, 4, 4,
2994 4, 4, 4, 4, 4, 4, 4, 4,
2995 4, 4, 4, 4, 4, 4, 4, 4
2996 };
2997
2998 /* OV518 quantization tables are 8x4 (instead of 8x8) */
2999 const unsigned char yQuanTable518[] = {
3000 5, 4, 5, 6, 6, 7, 7, 7,
3001 5, 5, 5, 5, 6, 7, 7, 7,
3002 6, 6, 6, 6, 7, 7, 7, 8,
3003 7, 7, 6, 7, 7, 7, 8, 8
3004 };
3005 const unsigned char uvQuanTable518[] = {
3006 6, 6, 6, 7, 7, 7, 7, 7,
3007 6, 6, 6, 7, 7, 7, 7, 7,
3008 6, 6, 6, 7, 7, 7, 7, 8,
3009 7, 7, 7, 7, 7, 7, 8, 8
3010 };
3011
3012 const unsigned char *pYTable, *pUVTable;
3013 unsigned char val0, val1;
3014 int i, size, reg = R51x_COMP_LUT_BEGIN;
3015
3016 PDEBUG(D_PROBE, "Uploading quantization tables");
3017
3018 if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
3019 pYTable = yQuanTable511;
3020 pUVTable = uvQuanTable511;
3021 size = 32;
3022 } else {
3023 pYTable = yQuanTable518;
3024 pUVTable = uvQuanTable518;
3025 size = 16;
3026 }
3027
3028 for (i = 0; i < size; i++) {
3029 val0 = *pYTable++;
3030 val1 = *pYTable++;
3031 val0 &= 0x0f;
3032 val1 &= 0x0f;
3033 val0 |= val1 << 4;
3034 reg_w(sd, reg, val0);
3035
3036 val0 = *pUVTable++;
3037 val1 = *pUVTable++;
3038 val0 &= 0x0f;
3039 val1 &= 0x0f;
3040 val0 |= val1 << 4;
3041 reg_w(sd, reg + size, val0);
3042
3043 reg++;
3044 }
3045 }
3046
3047 /* This initializes the OV511/OV511+ and the sensor */
3048 static void ov511_configure(struct gspca_dev *gspca_dev)
3049 {
3050 struct sd *sd = (struct sd *) gspca_dev;
3051
3052 /* For 511 and 511+ */
3053 const struct ov_regvals init_511[] = {
3054 { R51x_SYS_RESET, 0x7f },
3055 { R51x_SYS_INIT, 0x01 },
3056 { R51x_SYS_RESET, 0x7f },
3057 { R51x_SYS_INIT, 0x01 },
3058 { R51x_SYS_RESET, 0x3f },
3059 { R51x_SYS_INIT, 0x01 },
3060 { R51x_SYS_RESET, 0x3d },
3061 };
3062
3063 const struct ov_regvals norm_511[] = {
3064 { R511_DRAM_FLOW_CTL, 0x01 },
3065 { R51x_SYS_SNAP, 0x00 },
3066 { R51x_SYS_SNAP, 0x02 },
3067 { R51x_SYS_SNAP, 0x00 },
3068 { R511_FIFO_OPTS, 0x1f },
3069 { R511_COMP_EN, 0x00 },
3070 { R511_COMP_LUT_EN, 0x03 },
3071 };
3072
3073 const struct ov_regvals norm_511_p[] = {
3074 { R511_DRAM_FLOW_CTL, 0xff },
3075 { R51x_SYS_SNAP, 0x00 },
3076 { R51x_SYS_SNAP, 0x02 },
3077 { R51x_SYS_SNAP, 0x00 },
3078 { R511_FIFO_OPTS, 0xff },
3079 { R511_COMP_EN, 0x00 },
3080 { R511_COMP_LUT_EN, 0x03 },
3081 };
3082
3083 const struct ov_regvals compress_511[] = {
3084 { 0x70, 0x1f },
3085 { 0x71, 0x05 },
3086 { 0x72, 0x06 },
3087 { 0x73, 0x06 },
3088 { 0x74, 0x14 },
3089 { 0x75, 0x03 },
3090 { 0x76, 0x04 },
3091 { 0x77, 0x04 },
3092 };
3093
3094 PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
3095
3096 write_regvals(sd, init_511, ARRAY_SIZE(init_511));
3097
3098 switch (sd->bridge) {
3099 case BRIDGE_OV511:
3100 write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
3101 break;
3102 case BRIDGE_OV511PLUS:
3103 write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
3104 break;
3105 }
3106
3107 /* Init compression */
3108 write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
3109
3110 ov51x_upload_quan_tables(sd);
3111 }
3112
3113 /* This initializes the OV518/OV518+ and the sensor */
3114 static void ov518_configure(struct gspca_dev *gspca_dev)
3115 {
3116 struct sd *sd = (struct sd *) gspca_dev;
3117
3118 /* For 518 and 518+ */
3119 const struct ov_regvals init_518[] = {
3120 { R51x_SYS_RESET, 0x40 },
3121 { R51x_SYS_INIT, 0xe1 },
3122 { R51x_SYS_RESET, 0x3e },
3123 { R51x_SYS_INIT, 0xe1 },
3124 { R51x_SYS_RESET, 0x00 },
3125 { R51x_SYS_INIT, 0xe1 },
3126 { 0x46, 0x00 },
3127 { 0x5d, 0x03 },
3128 };
3129
3130 const struct ov_regvals norm_518[] = {
3131 { R51x_SYS_SNAP, 0x02 }, /* Reset */
3132 { R51x_SYS_SNAP, 0x01 }, /* Enable */
3133 { 0x31, 0x0f },
3134 { 0x5d, 0x03 },
3135 { 0x24, 0x9f },
3136 { 0x25, 0x90 },
3137 { 0x20, 0x00 },
3138 { 0x51, 0x04 },
3139 { 0x71, 0x19 },
3140 { 0x2f, 0x80 },
3141 };
3142
3143 const struct ov_regvals norm_518_p[] = {
3144 { R51x_SYS_SNAP, 0x02 }, /* Reset */
3145 { R51x_SYS_SNAP, 0x01 }, /* Enable */
3146 { 0x31, 0x0f },
3147 { 0x5d, 0x03 },
3148 { 0x24, 0x9f },
3149 { 0x25, 0x90 },
3150 { 0x20, 0x60 },
3151 { 0x51, 0x02 },
3152 { 0x71, 0x19 },
3153 { 0x40, 0xff },
3154 { 0x41, 0x42 },
3155 { 0x46, 0x00 },
3156 { 0x33, 0x04 },
3157 { 0x21, 0x19 },
3158 { 0x3f, 0x10 },
3159 { 0x2f, 0x80 },
3160 };
3161
3162 /* First 5 bits of custom ID reg are a revision ID on OV518 */
3163 PDEBUG(D_PROBE, "Device revision %d",
3164 0x1f & reg_r(sd, R51x_SYS_CUST_ID));
3165
3166 write_regvals(sd, init_518, ARRAY_SIZE(init_518));
3167
3168 /* Set LED GPIO pin to output mode */
3169 reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
3170
3171 switch (sd->bridge) {
3172 case BRIDGE_OV518:
3173 write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
3174 break;
3175 case BRIDGE_OV518PLUS:
3176 write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
3177 break;
3178 }
3179
3180 ov51x_upload_quan_tables(sd);
3181
3182 reg_w(sd, 0x2f, 0x80);
3183 }
3184
3185 static void ov519_configure(struct sd *sd)
3186 {
3187 static const struct ov_regvals init_519[] = {
3188 { 0x5a, 0x6d }, /* EnableSystem */
3189 { 0x53, 0x9b }, /* don't enable the microcontroller */
3190 { OV519_R54_EN_CLK1, 0xff }, /* set bit2 to enable jpeg */
3191 { 0x5d, 0x03 },
3192 { 0x49, 0x01 },
3193 { 0x48, 0x00 },
3194 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
3195 * detection will fail. This deserves further investigation. */
3196 { OV519_GPIO_IO_CTRL0, 0xee },
3197 { OV519_R51_RESET1, 0x0f },
3198 { OV519_R51_RESET1, 0x00 },
3199 { 0x22, 0x00 },
3200 /* windows reads 0x55 at this point*/
3201 };
3202
3203 write_regvals(sd, init_519, ARRAY_SIZE(init_519));
3204 }
3205
3206 static void ovfx2_configure(struct sd *sd)
3207 {
3208 static const struct ov_regvals init_fx2[] = {
3209 { 0x00, 0x60 },
3210 { 0x02, 0x01 },
3211 { 0x0f, 0x1d },
3212 { 0xe9, 0x82 },
3213 { 0xea, 0xc7 },
3214 { 0xeb, 0x10 },
3215 { 0xec, 0xf6 },
3216 };
3217
3218 sd->stopped = 1;
3219
3220 write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
3221 }
3222
3223 /* set the mode */
3224 /* This function works for ov7660 only */
3225 static void ov519_set_mode(struct sd *sd)
3226 {
3227 static const struct ov_regvals bridge_ov7660[2][10] = {
3228 {{0x10, 0x14}, {0x11, 0x1e}, {0x12, 0x00}, {0x13, 0x00},
3229 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3230 {0x25, 0x01}, {0x26, 0x00}},
3231 {{0x10, 0x28}, {0x11, 0x3c}, {0x12, 0x00}, {0x13, 0x00},
3232 {0x14, 0x00}, {0x15, 0x00}, {0x16, 0x00}, {0x20, 0x0c},
3233 {0x25, 0x03}, {0x26, 0x00}}
3234 };
3235 static const struct ov_i2c_regvals sensor_ov7660[2][3] = {
3236 {{0x12, 0x00}, {0x24, 0x00}, {0x0c, 0x0c}},
3237 {{0x12, 0x00}, {0x04, 0x00}, {0x0c, 0x00}}
3238 };
3239 static const struct ov_i2c_regvals sensor_ov7660_2[] = {
3240 {OV7670_R17_HSTART, 0x13},
3241 {OV7670_R18_HSTOP, 0x01},
3242 {OV7670_R32_HREF, 0x92},
3243 {OV7670_R19_VSTART, 0x02},
3244 {OV7670_R1A_VSTOP, 0x7a},
3245 {OV7670_R03_VREF, 0x00},
3246 /* {0x33, 0x00}, */
3247 /* {0x34, 0x07}, */
3248 /* {0x36, 0x00}, */
3249 /* {0x6b, 0x0a}, */
3250 };
3251
3252 write_regvals(sd, bridge_ov7660[sd->gspca_dev.curr_mode],
3253 ARRAY_SIZE(bridge_ov7660[0]));
3254 write_i2c_regvals(sd, sensor_ov7660[sd->gspca_dev.curr_mode],
3255 ARRAY_SIZE(sensor_ov7660[0]));
3256 write_i2c_regvals(sd, sensor_ov7660_2,
3257 ARRAY_SIZE(sensor_ov7660_2));
3258 }
3259
3260 /* set the frame rate */
3261 /* This function works for sensors ov7640, ov7648 ov7660 and ov7670 only */
3262 static void ov519_set_fr(struct sd *sd)
3263 {
3264 int fr;
3265 u8 clock;
3266 /* frame rate table with indices:
3267 * - mode = 0: 320x240, 1: 640x480
3268 * - fr rate = 0: 30, 1: 25, 2: 20, 3: 15, 4: 10, 5: 5
3269 * - reg = 0: bridge a4, 1: bridge 23, 2: sensor 11 (clock)
3270 */
3271 static const u8 fr_tb[2][6][3] = {
3272 {{0x04, 0xff, 0x00},
3273 {0x04, 0x1f, 0x00},
3274 {0x04, 0x1b, 0x00},
3275 {0x04, 0x15, 0x00},
3276 {0x04, 0x09, 0x00},
3277 {0x04, 0x01, 0x00}},
3278 {{0x0c, 0xff, 0x00},
3279 {0x0c, 0x1f, 0x00},
3280 {0x0c, 0x1b, 0x00},
3281 {0x04, 0xff, 0x01},
3282 {0x04, 0x1f, 0x01},
3283 {0x04, 0x1b, 0x01}},
3284 };
3285
3286 if (frame_rate > 0)
3287 sd->frame_rate = frame_rate;
3288 if (sd->frame_rate >= 30)
3289 fr = 0;
3290 else if (sd->frame_rate >= 25)
3291 fr = 1;
3292 else if (sd->frame_rate >= 20)
3293 fr = 2;
3294 else if (sd->frame_rate >= 15)
3295 fr = 3;
3296 else if (sd->frame_rate >= 10)
3297 fr = 4;
3298 else
3299 fr = 5;
3300 reg_w(sd, 0xa4, fr_tb[sd->gspca_dev.curr_mode][fr][0]);
3301 reg_w(sd, 0x23, fr_tb[sd->gspca_dev.curr_mode][fr][1]);
3302 clock = fr_tb[sd->gspca_dev.curr_mode][fr][2];
3303 if (sd->sensor == SEN_OV7660)
3304 clock |= 0x80; /* enable double clock */
3305 ov518_i2c_w(sd, OV7670_R11_CLKRC, clock);
3306 }
3307
3308 static void setautogain(struct gspca_dev *gspca_dev)
3309 {
3310 struct sd *sd = (struct sd *) gspca_dev;
3311
3312 i2c_w_mask(sd, 0x13, sd->ctrls[AUTOGAIN].val ? 0x05 : 0x00, 0x05);
3313 }
3314
3315 /* this function is called at probe time */
3316 static int sd_config(struct gspca_dev *gspca_dev,
3317 const struct usb_device_id *id)
3318 {
3319 struct sd *sd = (struct sd *) gspca_dev;
3320 struct cam *cam = &gspca_dev->cam;
3321
3322 sd->bridge = id->driver_info & BRIDGE_MASK;
3323 sd->invert_led = (id->driver_info & BRIDGE_INVERT_LED) != 0;
3324
3325 switch (sd->bridge) {
3326 case BRIDGE_OV511:
3327 case BRIDGE_OV511PLUS:
3328 cam->cam_mode = ov511_vga_mode;
3329 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3330 break;
3331 case BRIDGE_OV518:
3332 case BRIDGE_OV518PLUS:
3333 cam->cam_mode = ov518_vga_mode;
3334 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3335 break;
3336 case BRIDGE_OV519:
3337 cam->cam_mode = ov519_vga_mode;
3338 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3339 break;
3340 case BRIDGE_OVFX2:
3341 cam->cam_mode = ov519_vga_mode;
3342 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3343 cam->bulk_size = OVFX2_BULK_SIZE;
3344 cam->bulk_nurbs = MAX_NURBS;
3345 cam->bulk = 1;
3346 break;
3347 case BRIDGE_W9968CF:
3348 cam->cam_mode = w9968cf_vga_mode;
3349 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3350 cam->reverse_alts = 1;
3351 break;
3352 }
3353
3354 gspca_dev->cam.ctrls = sd->ctrls;
3355 sd->quality = QUALITY_DEF;
3356 sd->frame_rate = 15;
3357
3358 return 0;
3359 }
3360
3361 /* this function is called at probe and resume time */
3362 static int sd_init(struct gspca_dev *gspca_dev)
3363 {
3364 struct sd *sd = (struct sd *) gspca_dev;
3365 struct cam *cam = &gspca_dev->cam;
3366
3367 switch (sd->bridge) {
3368 case BRIDGE_OV511:
3369 case BRIDGE_OV511PLUS:
3370 ov511_configure(gspca_dev);
3371 break;
3372 case BRIDGE_OV518:
3373 case BRIDGE_OV518PLUS:
3374 ov518_configure(gspca_dev);
3375 break;
3376 case BRIDGE_OV519:
3377 ov519_configure(sd);
3378 break;
3379 case BRIDGE_OVFX2:
3380 ovfx2_configure(sd);
3381 break;
3382 case BRIDGE_W9968CF:
3383 w9968cf_configure(sd);
3384 break;
3385 }
3386
3387 /* The OV519 must be more aggressive about sensor detection since
3388 * I2C write will never fail if the sensor is not present. We have
3389 * to try to initialize the sensor to detect its presence */
3390 sd->sensor = -1;
3391
3392 /* Test for 76xx */
3393 if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3394 ov7xx0_configure(sd);
3395
3396 /* Test for 6xx0 */
3397 } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3398 ov6xx0_configure(sd);
3399
3400 /* Test for 8xx0 */
3401 } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3402 ov8xx0_configure(sd);
3403
3404 /* Test for 3xxx / 2xxx */
3405 } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3406 ov_hires_configure(sd);
3407 } else {
3408 err("Can't determine sensor slave IDs");
3409 goto error;
3410 }
3411
3412 if (sd->sensor < 0)
3413 goto error;
3414
3415 ov51x_led_control(sd, 0); /* turn LED off */
3416
3417 switch (sd->bridge) {
3418 case BRIDGE_OV511:
3419 case BRIDGE_OV511PLUS:
3420 if (sd->sif) {
3421 cam->cam_mode = ov511_sif_mode;
3422 cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3423 }
3424 break;
3425 case BRIDGE_OV518:
3426 case BRIDGE_OV518PLUS:
3427 if (sd->sif) {
3428 cam->cam_mode = ov518_sif_mode;
3429 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3430 }
3431 break;
3432 case BRIDGE_OV519:
3433 if (sd->sif) {
3434 cam->cam_mode = ov519_sif_mode;
3435 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3436 }
3437 break;
3438 case BRIDGE_OVFX2:
3439 switch (sd->sensor) {
3440 case SEN_OV2610:
3441 case SEN_OV2610AE:
3442 cam->cam_mode = ovfx2_ov2610_mode;
3443 cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3444 break;
3445 case SEN_OV3610:
3446 cam->cam_mode = ovfx2_ov3610_mode;
3447 cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3448 break;
3449 case SEN_OV9600:
3450 cam->cam_mode = ovfx2_ov9600_mode;
3451 cam->nmodes = ARRAY_SIZE(ovfx2_ov9600_mode);
3452 break;
3453 default:
3454 if (sd->sif) {
3455 cam->cam_mode = ov519_sif_mode;
3456 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3457 }
3458 break;
3459 }
3460 break;
3461 case BRIDGE_W9968CF:
3462 if (sd->sif)
3463 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode) - 1;
3464
3465 /* w9968cf needs initialisation once the sensor is known */
3466 w9968cf_init(sd);
3467 break;
3468 }
3469
3470 gspca_dev->ctrl_dis = ctrl_dis[sd->sensor];
3471
3472 /* initialize the sensor */
3473 switch (sd->sensor) {
3474 case SEN_OV2610:
3475 write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610));
3476
3477 /* Enable autogain, autoexpo, awb, bandfilter */
3478 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3479 break;
3480 case SEN_OV2610AE:
3481 write_i2c_regvals(sd, norm_2610ae, ARRAY_SIZE(norm_2610ae));
3482
3483 /* enable autoexpo */
3484 i2c_w_mask(sd, 0x13, 0x05, 0x05);
3485 break;
3486 case SEN_OV3610:
3487 write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b));
3488
3489 /* Enable autogain, autoexpo, awb, bandfilter */
3490 i2c_w_mask(sd, 0x13, 0x27, 0x27);
3491 break;
3492 case SEN_OV6620:
3493 write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20));
3494 break;
3495 case SEN_OV6630:
3496 case SEN_OV66308AF:
3497 sd->ctrls[CONTRAST].def = 200;
3498 /* The default is too low for the ov6630 */
3499 write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30));
3500 break;
3501 default:
3502 /* case SEN_OV7610: */
3503 /* case SEN_OV76BE: */
3504 write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610));
3505 i2c_w_mask(sd, 0x0e, 0x00, 0x40);
3506 break;
3507 case SEN_OV7620:
3508 case SEN_OV7620AE:
3509 write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620));
3510 break;
3511 case SEN_OV7640:
3512 case SEN_OV7648:
3513 write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640));
3514 break;
3515 case SEN_OV7660:
3516 i2c_w(sd, OV7670_R12_COM7, OV7670_COM7_RESET);
3517 msleep(14);
3518 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
3519 write_regvals(sd, init_519_ov7660,
3520 ARRAY_SIZE(init_519_ov7660));
3521 write_i2c_regvals(sd, norm_7660, ARRAY_SIZE(norm_7660));
3522 sd->gspca_dev.curr_mode = 1; /* 640x480 */
3523 ov519_set_mode(sd);
3524 ov519_set_fr(sd);
3525 sd->ctrls[COLORS].max = 4; /* 0..4 */
3526 sd->ctrls[COLORS].val =
3527 sd->ctrls[COLORS].def = 2;
3528 setcolors(gspca_dev);
3529 sd->ctrls[CONTRAST].max = 6; /* 0..6 */
3530 sd->ctrls[CONTRAST].val =
3531 sd->ctrls[CONTRAST].def = 3;
3532 setcontrast(gspca_dev);
3533 sd->ctrls[BRIGHTNESS].max = 6; /* 0..6 */
3534 sd->ctrls[BRIGHTNESS].val =
3535 sd->ctrls[BRIGHTNESS].def = 3;
3536 setbrightness(gspca_dev);
3537 sd_reset_snapshot(gspca_dev);
3538 ov51x_restart(sd);
3539 ov51x_stop(sd); /* not in win traces */
3540 ov51x_led_control(sd, 0);
3541 break;
3542 case SEN_OV7670:
3543 sd->ctrls[FREQ].max = 3; /* auto */
3544 sd->ctrls[FREQ].def = 3;
3545 write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670));
3546 break;
3547 case SEN_OV8610:
3548 write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610));
3549 break;
3550 case SEN_OV9600:
3551 write_i2c_regvals(sd, norm_9600, ARRAY_SIZE(norm_9600));
3552
3553 /* enable autoexpo */
3554 /* i2c_w_mask(sd, 0x13, 0x05, 0x05); */
3555 break;
3556 }
3557 return gspca_dev->usb_err;
3558 error:
3559 PDEBUG(D_ERR, "OV519 Config failed");
3560 return -EINVAL;
3561 }
3562
3563 /* function called at start time before URB creation */
3564 static int sd_isoc_init(struct gspca_dev *gspca_dev)
3565 {
3566 struct sd *sd = (struct sd *) gspca_dev;
3567
3568 switch (sd->bridge) {
3569 case BRIDGE_OVFX2:
3570 if (gspca_dev->width != 800)
3571 gspca_dev->cam.bulk_size = OVFX2_BULK_SIZE;
3572 else
3573 gspca_dev->cam.bulk_size = 7 * 4096;
3574 break;
3575 }
3576 return 0;
3577 }
3578
3579 /* Set up the OV511/OV511+ with the given image parameters.
3580 *
3581 * Do not put any sensor-specific code in here (including I2C I/O functions)
3582 */
3583 static void ov511_mode_init_regs(struct sd *sd)
3584 {
3585 int hsegs, vsegs, packet_size, fps, needed;
3586 int interlaced = 0;
3587 struct usb_host_interface *alt;
3588 struct usb_interface *intf;
3589
3590 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3591 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3592 if (!alt) {
3593 err("Couldn't get altsetting");
3594 sd->gspca_dev.usb_err = -EIO;
3595 return;
3596 }
3597
3598 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3599 reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3600
3601 reg_w(sd, R511_CAM_UV_EN, 0x01);
3602 reg_w(sd, R511_SNAP_UV_EN, 0x01);
3603 reg_w(sd, R511_SNAP_OPTS, 0x03);
3604
3605 /* Here I'm assuming that snapshot size == image size.
3606 * I hope that's always true. --claudio
3607 */
3608 hsegs = (sd->gspca_dev.width >> 3) - 1;
3609 vsegs = (sd->gspca_dev.height >> 3) - 1;
3610
3611 reg_w(sd, R511_CAM_PXCNT, hsegs);
3612 reg_w(sd, R511_CAM_LNCNT, vsegs);
3613 reg_w(sd, R511_CAM_PXDIV, 0x00);
3614 reg_w(sd, R511_CAM_LNDIV, 0x00);
3615
3616 /* YUV420, low pass filter on */
3617 reg_w(sd, R511_CAM_OPTS, 0x03);
3618
3619 /* Snapshot additions */
3620 reg_w(sd, R511_SNAP_PXCNT, hsegs);
3621 reg_w(sd, R511_SNAP_LNCNT, vsegs);
3622 reg_w(sd, R511_SNAP_PXDIV, 0x00);
3623 reg_w(sd, R511_SNAP_LNDIV, 0x00);
3624
3625 /******** Set the framerate ********/
3626 if (frame_rate > 0)
3627 sd->frame_rate = frame_rate;
3628
3629 switch (sd->sensor) {
3630 case SEN_OV6620:
3631 /* No framerate control, doesn't like higher rates yet */
3632 sd->clockdiv = 3;
3633 break;
3634
3635 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3636 for more sensors we need to do this for them too */
3637 case SEN_OV7620:
3638 case SEN_OV7620AE:
3639 case SEN_OV7640:
3640 case SEN_OV7648:
3641 case SEN_OV76BE:
3642 if (sd->gspca_dev.width == 320)
3643 interlaced = 1;
3644 /* Fall through */
3645 case SEN_OV6630:
3646 case SEN_OV7610:
3647 case SEN_OV7670:
3648 switch (sd->frame_rate) {
3649 case 30:
3650 case 25:
3651 /* Not enough bandwidth to do 640x480 @ 30 fps */
3652 if (sd->gspca_dev.width != 640) {
3653 sd->clockdiv = 0;
3654 break;
3655 }
3656 /* Fall through for 640x480 case */
3657 default:
3658 /* case 20: */
3659 /* case 15: */
3660 sd->clockdiv = 1;
3661 break;
3662 case 10:
3663 sd->clockdiv = 2;
3664 break;
3665 case 5:
3666 sd->clockdiv = 5;
3667 break;
3668 }
3669 if (interlaced) {
3670 sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3671 /* Higher then 10 does not work */
3672 if (sd->clockdiv > 10)
3673 sd->clockdiv = 10;
3674 }
3675 break;
3676
3677 case SEN_OV8610:
3678 /* No framerate control ?? */
3679 sd->clockdiv = 0;
3680 break;
3681 }
3682
3683 /* Check if we have enough bandwidth to disable compression */
3684 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3685 needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
3686 /* 1400 is a conservative estimate of the max nr of isoc packets/sec */
3687 if (needed > 1400 * packet_size) {
3688 /* Enable Y and UV quantization and compression */
3689 reg_w(sd, R511_COMP_EN, 0x07);
3690 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3691 } else {
3692 reg_w(sd, R511_COMP_EN, 0x06);
3693 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3694 }
3695
3696 reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3697 reg_w(sd, R51x_SYS_RESET, 0);
3698 }
3699
3700 /* Sets up the OV518/OV518+ with the given image parameters
3701 *
3702 * OV518 needs a completely different approach, until we can figure out what
3703 * the individual registers do. Also, only 15 FPS is supported now.
3704 *
3705 * Do not put any sensor-specific code in here (including I2C I/O functions)
3706 */
3707 static void ov518_mode_init_regs(struct sd *sd)
3708 {
3709 int hsegs, vsegs, packet_size;
3710 struct usb_host_interface *alt;
3711 struct usb_interface *intf;
3712
3713 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3714 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3715 if (!alt) {
3716 err("Couldn't get altsetting");
3717 sd->gspca_dev.usb_err = -EIO;
3718 return;
3719 }
3720
3721 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3722 ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3723
3724 /******** Set the mode ********/
3725 reg_w(sd, 0x2b, 0);
3726 reg_w(sd, 0x2c, 0);
3727 reg_w(sd, 0x2d, 0);
3728 reg_w(sd, 0x2e, 0);
3729 reg_w(sd, 0x3b, 0);
3730 reg_w(sd, 0x3c, 0);
3731 reg_w(sd, 0x3d, 0);
3732 reg_w(sd, 0x3e, 0);
3733
3734 if (sd->bridge == BRIDGE_OV518) {
3735 /* Set 8-bit (YVYU) input format */
3736 reg_w_mask(sd, 0x20, 0x08, 0x08);
3737
3738 /* Set 12-bit (4:2:0) output format */
3739 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3740 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3741 } else {
3742 reg_w(sd, 0x28, 0x80);
3743 reg_w(sd, 0x38, 0x80);
3744 }
3745
3746 hsegs = sd->gspca_dev.width / 16;
3747 vsegs = sd->gspca_dev.height / 4;
3748
3749 reg_w(sd, 0x29, hsegs);
3750 reg_w(sd, 0x2a, vsegs);
3751
3752 reg_w(sd, 0x39, hsegs);
3753 reg_w(sd, 0x3a, vsegs);
3754
3755 /* Windows driver does this here; who knows why */
3756 reg_w(sd, 0x2f, 0x80);
3757
3758 /******** Set the framerate ********/
3759 sd->clockdiv = 1;
3760
3761 /* Mode independent, but framerate dependent, regs */
3762 /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3763 reg_w(sd, 0x51, 0x04);
3764 reg_w(sd, 0x22, 0x18);
3765 reg_w(sd, 0x23, 0xff);
3766
3767 if (sd->bridge == BRIDGE_OV518PLUS) {
3768 switch (sd->sensor) {
3769 case SEN_OV7620AE:
3770 if (sd->gspca_dev.width == 320) {
3771 reg_w(sd, 0x20, 0x00);
3772 reg_w(sd, 0x21, 0x19);
3773 } else {
3774 reg_w(sd, 0x20, 0x60);
3775 reg_w(sd, 0x21, 0x1f);
3776 }
3777 break;
3778 case SEN_OV7620:
3779 reg_w(sd, 0x20, 0x00);
3780 reg_w(sd, 0x21, 0x19);
3781 break;
3782 default:
3783 reg_w(sd, 0x21, 0x19);
3784 }
3785 } else
3786 reg_w(sd, 0x71, 0x17); /* Compression-related? */
3787
3788 /* FIXME: Sensor-specific */
3789 /* Bit 5 is what matters here. Of course, it is "reserved" */
3790 i2c_w(sd, 0x54, 0x23);
3791
3792 reg_w(sd, 0x2f, 0x80);
3793
3794 if (sd->bridge == BRIDGE_OV518PLUS) {
3795 reg_w(sd, 0x24, 0x94);
3796 reg_w(sd, 0x25, 0x90);
3797 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3798 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
3799 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
3800 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
3801 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
3802 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
3803 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
3804 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
3805 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
3806 } else {
3807 reg_w(sd, 0x24, 0x9f);
3808 reg_w(sd, 0x25, 0x90);
3809 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3810 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
3811 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
3812 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
3813 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
3814 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
3815 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
3816 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
3817 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
3818 }
3819
3820 reg_w(sd, 0x2f, 0x80);
3821 }
3822
3823 /* Sets up the OV519 with the given image parameters
3824 *
3825 * OV519 needs a completely different approach, until we can figure out what
3826 * the individual registers do.
3827 *
3828 * Do not put any sensor-specific code in here (including I2C I/O functions)
3829 */
3830 static void ov519_mode_init_regs(struct sd *sd)
3831 {
3832 static const struct ov_regvals mode_init_519_ov7670[] = {
3833 { 0x5d, 0x03 }, /* Turn off suspend mode */
3834 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3835 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3836 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3837 { 0xa3, 0x18 },
3838 { 0xa4, 0x04 },
3839 { 0xa5, 0x28 },
3840 { 0x37, 0x00 }, /* SetUsbInit */
3841 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3842 /* Enable both fields, YUV Input, disable defect comp (why?) */
3843 { 0x20, 0x0c },
3844 { 0x21, 0x38 },
3845 { 0x22, 0x1d },
3846 { 0x17, 0x50 }, /* undocumented */
3847 { 0x37, 0x00 }, /* undocumented */
3848 { 0x40, 0xff }, /* I2C timeout counter */
3849 { 0x46, 0x00 }, /* I2C clock prescaler */
3850 { 0x59, 0x04 }, /* new from windrv 090403 */
3851 { 0xff, 0x00 }, /* undocumented */
3852 /* windows reads 0x55 at this point, why? */
3853 };
3854
3855 static const struct ov_regvals mode_init_519[] = {
3856 { 0x5d, 0x03 }, /* Turn off suspend mode */
3857 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3858 { OV519_R54_EN_CLK1, 0x0f }, /* bit2 (jpeg enable) */
3859 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3860 { 0xa3, 0x18 },
3861 { 0xa4, 0x04 },
3862 { 0xa5, 0x28 },
3863 { 0x37, 0x00 }, /* SetUsbInit */
3864 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3865 /* Enable both fields, YUV Input, disable defect comp (why?) */
3866 { 0x22, 0x1d },
3867 { 0x17, 0x50 }, /* undocumented */
3868 { 0x37, 0x00 }, /* undocumented */
3869 { 0x40, 0xff }, /* I2C timeout counter */
3870 { 0x46, 0x00 }, /* I2C clock prescaler */
3871 { 0x59, 0x04 }, /* new from windrv 090403 */
3872 { 0xff, 0x00 }, /* undocumented */
3873 /* windows reads 0x55 at this point, why? */
3874 };
3875
3876 /******** Set the mode ********/
3877 switch (sd->sensor) {
3878 default:
3879 write_regvals(sd, mode_init_519, ARRAY_SIZE(mode_init_519));
3880 if (sd->sensor == SEN_OV7640 ||
3881 sd->sensor == SEN_OV7648) {
3882 /* Select 8-bit input mode */
3883 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3884 }
3885 break;
3886 case SEN_OV7660:
3887 return; /* done by ov519_set_mode/fr() */
3888 case SEN_OV7670:
3889 write_regvals(sd, mode_init_519_ov7670,
3890 ARRAY_SIZE(mode_init_519_ov7670));
3891 break;
3892 }
3893
3894 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
3895 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
3896 if (sd->sensor == SEN_OV7670 &&
3897 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3898 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3899 else if (sd->sensor == SEN_OV7648 &&
3900 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3901 reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3902 else
3903 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3904 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
3905 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
3906 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
3907 reg_w(sd, OV519_R16_DIVIDER, 0x00);
3908 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
3909 reg_w(sd, 0x26, 0x00); /* Undocumented */
3910
3911 /******** Set the framerate ********/
3912 if (frame_rate > 0)
3913 sd->frame_rate = frame_rate;
3914
3915 /* FIXME: These are only valid at the max resolution. */
3916 sd->clockdiv = 0;
3917 switch (sd->sensor) {
3918 case SEN_OV7640:
3919 case SEN_OV7648:
3920 switch (sd->frame_rate) {
3921 default:
3922 /* case 30: */
3923 reg_w(sd, 0xa4, 0x0c);
3924 reg_w(sd, 0x23, 0xff);
3925 break;
3926 case 25:
3927 reg_w(sd, 0xa4, 0x0c);
3928 reg_w(sd, 0x23, 0x1f);
3929 break;
3930 case 20:
3931 reg_w(sd, 0xa4, 0x0c);
3932 reg_w(sd, 0x23, 0x1b);
3933 break;
3934 case 15:
3935 reg_w(sd, 0xa4, 0x04);
3936 reg_w(sd, 0x23, 0xff);
3937 sd->clockdiv = 1;
3938 break;
3939 case 10:
3940 reg_w(sd, 0xa4, 0x04);
3941 reg_w(sd, 0x23, 0x1f);
3942 sd->clockdiv = 1;
3943 break;
3944 case 5:
3945 reg_w(sd, 0xa4, 0x04);
3946 reg_w(sd, 0x23, 0x1b);
3947 sd->clockdiv = 1;
3948 break;
3949 }
3950 break;
3951 case SEN_OV8610:
3952 switch (sd->frame_rate) {
3953 default: /* 15 fps */
3954 /* case 15: */
3955 reg_w(sd, 0xa4, 0x06);
3956 reg_w(sd, 0x23, 0xff);
3957 break;
3958 case 10:
3959 reg_w(sd, 0xa4, 0x06);
3960 reg_w(sd, 0x23, 0x1f);
3961 break;
3962 case 5:
3963 reg_w(sd, 0xa4, 0x06);
3964 reg_w(sd, 0x23, 0x1b);
3965 break;
3966 }
3967 break;
3968 case SEN_OV7670: /* guesses, based on 7640 */
3969 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3970 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3971 reg_w(sd, 0xa4, 0x10);
3972 switch (sd->frame_rate) {
3973 case 30:
3974 reg_w(sd, 0x23, 0xff);
3975 break;
3976 case 20:
3977 reg_w(sd, 0x23, 0x1b);
3978 break;
3979 default:
3980 /* case 15: */
3981 reg_w(sd, 0x23, 0xff);
3982 sd->clockdiv = 1;
3983 break;
3984 }
3985 break;
3986 }
3987 }
3988
3989 static void mode_init_ov_sensor_regs(struct sd *sd)
3990 {
3991 struct gspca_dev *gspca_dev;
3992 int qvga, xstart, xend, ystart, yend;
3993 u8 v;
3994
3995 gspca_dev = &sd->gspca_dev;
3996 qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
3997
3998 /******** Mode (VGA/QVGA) and sensor specific regs ********/
3999 switch (sd->sensor) {
4000 case SEN_OV2610:
4001 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4002 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
4003 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
4004 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
4005 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
4006 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
4007 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
4008 return;
4009 case SEN_OV2610AE: {
4010 u8 v;
4011
4012 /* frame rates:
4013 * 10fps / 5 fps for 1600x1200
4014 * 40fps / 20fps for 800x600
4015 */
4016 v = 80;
4017 if (qvga) {
4018 if (sd->frame_rate < 25)
4019 v = 0x81;
4020 } else {
4021 if (sd->frame_rate < 10)
4022 v = 0x81;
4023 }
4024 i2c_w(sd, 0x11, v);
4025 i2c_w(sd, 0x12, qvga ? 0x60 : 0x20);
4026 return;
4027 }
4028 case SEN_OV3610:
4029 if (qvga) {
4030 xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
4031 ystart = (776 - gspca_dev->height) / 2;
4032 } else {
4033 xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
4034 ystart = (1544 - gspca_dev->height) / 2;
4035 }
4036 xend = xstart + gspca_dev->width;
4037 yend = ystart + gspca_dev->height;
4038 /* Writing to the COMH register resets the other windowing regs
4039 to their default values, so we must do this first. */
4040 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
4041 i2c_w_mask(sd, 0x32,
4042 (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
4043 0x3f);
4044 i2c_w_mask(sd, 0x03,
4045 (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
4046 0x0f);
4047 i2c_w(sd, 0x17, xstart >> 4);
4048 i2c_w(sd, 0x18, xend >> 4);
4049 i2c_w(sd, 0x19, ystart >> 3);
4050 i2c_w(sd, 0x1a, yend >> 3);
4051 return;
4052 case SEN_OV8610:
4053 /* For OV8610 qvga means qsvga */
4054 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
4055 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4056 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4057 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
4058 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
4059 break;
4060 case SEN_OV7610:
4061 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4062 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
4063 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4064 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4065 break;
4066 case SEN_OV7620:
4067 case SEN_OV7620AE:
4068 case SEN_OV76BE:
4069 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4070 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
4071 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
4072 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
4073 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
4074 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
4075 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
4076 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4077 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4078 if (sd->sensor == SEN_OV76BE)
4079 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
4080 break;
4081 case SEN_OV7640:
4082 case SEN_OV7648:
4083 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4084 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
4085 /* Setting this undocumented bit in qvga mode removes a very
4086 annoying vertical shaking of the image */
4087 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
4088 /* Unknown */
4089 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
4090 /* Allow higher automatic gain (to allow higher framerates) */
4091 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
4092 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
4093 break;
4094 case SEN_OV7670:
4095 /* set COM7_FMT_VGA or COM7_FMT_QVGA
4096 * do we need to set anything else?
4097 * HSTART etc are set in set_ov_sensor_window itself */
4098 i2c_w_mask(sd, OV7670_R12_COM7,
4099 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
4100 OV7670_COM7_FMT_MASK);
4101 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4102 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_AWB,
4103 OV7670_COM8_AWB);
4104 if (qvga) { /* QVGA from ov7670.c by
4105 * Jonathan Corbet */
4106 xstart = 164;
4107 xend = 28;
4108 ystart = 14;
4109 yend = 494;
4110 } else { /* VGA */
4111 xstart = 158;
4112 xend = 14;
4113 ystart = 10;
4114 yend = 490;
4115 }
4116 /* OV7670 hardware window registers are split across
4117 * multiple locations */
4118 i2c_w(sd, OV7670_R17_HSTART, xstart >> 3);
4119 i2c_w(sd, OV7670_R18_HSTOP, xend >> 3);
4120 v = i2c_r(sd, OV7670_R32_HREF);
4121 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
4122 msleep(10); /* need to sleep between read and write to
4123 * same reg! */
4124 i2c_w(sd, OV7670_R32_HREF, v);
4125
4126 i2c_w(sd, OV7670_R19_VSTART, ystart >> 2);
4127 i2c_w(sd, OV7670_R1A_VSTOP, yend >> 2);
4128 v = i2c_r(sd, OV7670_R03_VREF);
4129 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
4130 msleep(10); /* need to sleep between read and write to
4131 * same reg! */
4132 i2c_w(sd, OV7670_R03_VREF, v);
4133 break;
4134 case SEN_OV6620:
4135 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4136 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
4137 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4138 break;
4139 case SEN_OV6630:
4140 case SEN_OV66308AF:
4141 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
4142 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
4143 break;
4144 case SEN_OV9600: {
4145 const struct ov_i2c_regvals *vals;
4146 static const struct ov_i2c_regvals sxga_15[] = {
4147 {0x11, 0x80}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4148 };
4149 static const struct ov_i2c_regvals sxga_7_5[] = {
4150 {0x11, 0x81}, {0x14, 0x3e}, {0x24, 0x85}, {0x25, 0x75}
4151 };
4152 static const struct ov_i2c_regvals vga_30[] = {
4153 {0x11, 0x81}, {0x14, 0x7e}, {0x24, 0x70}, {0x25, 0x60}
4154 };
4155 static const struct ov_i2c_regvals vga_15[] = {
4156 {0x11, 0x83}, {0x14, 0x3e}, {0x24, 0x80}, {0x25, 0x70}
4157 };
4158
4159 /* frame rates:
4160 * 15fps / 7.5 fps for 1280x1024
4161 * 30fps / 15fps for 640x480
4162 */
4163 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0x40);
4164 if (qvga)
4165 vals = sd->frame_rate < 30 ? vga_15 : vga_30;
4166 else
4167 vals = sd->frame_rate < 15 ? sxga_7_5 : sxga_15;
4168 write_i2c_regvals(sd, vals, ARRAY_SIZE(sxga_15));
4169 return;
4170 }
4171 default:
4172 return;
4173 }
4174
4175 /******** Clock programming ********/
4176 i2c_w(sd, 0x11, sd->clockdiv);
4177 }
4178
4179 /* this function works for bridge ov519 and sensors ov7660 and ov7670 only */
4180 static void sethvflip(struct gspca_dev *gspca_dev)
4181 {
4182 struct sd *sd = (struct sd *) gspca_dev;
4183
4184 if (sd->gspca_dev.streaming)
4185 reg_w(sd, OV519_R51_RESET1, 0x0f); /* block stream */
4186 i2c_w_mask(sd, OV7670_R1E_MVFP,
4187 OV7670_MVFP_MIRROR * sd->ctrls[HFLIP].val
4188 | OV7670_MVFP_VFLIP * sd->ctrls[VFLIP].val,
4189 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
4190 if (sd->gspca_dev.streaming)
4191 reg_w(sd, OV519_R51_RESET1, 0x00); /* restart stream */
4192 }
4193
4194 static void set_ov_sensor_window(struct sd *sd)
4195 {
4196 struct gspca_dev *gspca_dev;
4197 int qvga, crop;
4198 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
4199
4200 /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
4201 switch (sd->sensor) {
4202 case SEN_OV2610:
4203 case SEN_OV2610AE:
4204 case SEN_OV3610:
4205 case SEN_OV7670:
4206 case SEN_OV9600:
4207 mode_init_ov_sensor_regs(sd);
4208 return;
4209 case SEN_OV7660:
4210 ov519_set_mode(sd);
4211 ov519_set_fr(sd);
4212 return;
4213 }
4214
4215 gspca_dev = &sd->gspca_dev;
4216 qvga = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 1;
4217 crop = gspca_dev->cam.cam_mode[gspca_dev->curr_mode].priv & 2;
4218
4219 /* The different sensor ICs handle setting up of window differently.
4220 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
4221 switch (sd->sensor) {
4222 case SEN_OV8610:
4223 hwsbase = 0x1e;
4224 hwebase = 0x1e;
4225 vwsbase = 0x02;
4226 vwebase = 0x02;
4227 break;
4228 case SEN_OV7610:
4229 case SEN_OV76BE:
4230 hwsbase = 0x38;
4231 hwebase = 0x3a;
4232 vwsbase = vwebase = 0x05;
4233 break;
4234 case SEN_OV6620:
4235 case SEN_OV6630:
4236 case SEN_OV66308AF:
4237 hwsbase = 0x38;
4238 hwebase = 0x3a;
4239 vwsbase = 0x05;
4240 vwebase = 0x06;
4241 if (sd->sensor == SEN_OV66308AF && qvga)
4242 /* HDG: this fixes U and V getting swapped */
4243 hwsbase++;
4244 if (crop) {
4245 hwsbase += 8;
4246 hwebase += 8;
4247 vwsbase += 11;
4248 vwebase += 11;
4249 }
4250 break;
4251 case SEN_OV7620:
4252 case SEN_OV7620AE:
4253 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
4254 hwebase = 0x2f;
4255 vwsbase = vwebase = 0x05;
4256 break;
4257 case SEN_OV7640:
4258 case SEN_OV7648:
4259 hwsbase = 0x1a;
4260 hwebase = 0x1a;
4261 vwsbase = vwebase = 0x03;
4262 break;
4263 default:
4264 return;
4265 }
4266
4267 switch (sd->sensor) {
4268 case SEN_OV6620:
4269 case SEN_OV6630:
4270 case SEN_OV66308AF:
4271 if (qvga) { /* QCIF */
4272 hwscale = 0;
4273 vwscale = 0;
4274 } else { /* CIF */
4275 hwscale = 1;
4276 vwscale = 1; /* The datasheet says 0;
4277 * it's wrong */
4278 }
4279 break;
4280 case SEN_OV8610:
4281 if (qvga) { /* QSVGA */
4282 hwscale = 1;
4283 vwscale = 1;
4284 } else { /* SVGA */
4285 hwscale = 2;
4286 vwscale = 2;
4287 }
4288 break;
4289 default: /* SEN_OV7xx0 */
4290 if (qvga) { /* QVGA */
4291 hwscale = 1;
4292 vwscale = 0;
4293 } else { /* VGA */
4294 hwscale = 2;
4295 vwscale = 1;
4296 }
4297 }
4298
4299 mode_init_ov_sensor_regs(sd);
4300
4301 i2c_w(sd, 0x17, hwsbase);
4302 i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
4303 i2c_w(sd, 0x19, vwsbase);
4304 i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
4305 }
4306
4307 /* -- start the camera -- */
4308 static int sd_start(struct gspca_dev *gspca_dev)
4309 {
4310 struct sd *sd = (struct sd *) gspca_dev;
4311
4312 /* Default for most bridges, allow bridge_mode_init_regs to override */
4313 sd->sensor_width = sd->gspca_dev.width;
4314 sd->sensor_height = sd->gspca_dev.height;
4315
4316 switch (sd->bridge) {
4317 case BRIDGE_OV511:
4318 case BRIDGE_OV511PLUS:
4319 ov511_mode_init_regs(sd);
4320 break;
4321 case BRIDGE_OV518:
4322 case BRIDGE_OV518PLUS:
4323 ov518_mode_init_regs(sd);
4324 break;
4325 case BRIDGE_OV519:
4326 ov519_mode_init_regs(sd);
4327 break;
4328 /* case BRIDGE_OVFX2: nothing to do */
4329 case BRIDGE_W9968CF:
4330 w9968cf_mode_init_regs(sd);
4331 break;
4332 }
4333
4334 set_ov_sensor_window(sd);
4335
4336 if (!(sd->gspca_dev.ctrl_dis & (1 << CONTRAST)))
4337 setcontrast(gspca_dev);
4338 if (!(sd->gspca_dev.ctrl_dis & (1 << BRIGHTNESS)))
4339 setbrightness(gspca_dev);
4340 if (!(sd->gspca_dev.ctrl_dis & (1 << EXPOSURE)))
4341 setexposure(gspca_dev);
4342 if (!(sd->gspca_dev.ctrl_dis & (1 << COLORS)))
4343 setcolors(gspca_dev);
4344 if (!(sd->gspca_dev.ctrl_dis & ((1 << HFLIP) | (1 << VFLIP))))
4345 sethvflip(gspca_dev);
4346 if (!(sd->gspca_dev.ctrl_dis & (1 << AUTOBRIGHT)))
4347 setautobright(gspca_dev);
4348 if (!(sd->gspca_dev.ctrl_dis & (1 << AUTOGAIN)))
4349 setautogain(gspca_dev);
4350 if (!(sd->gspca_dev.ctrl_dis & (1 << FREQ)))
4351 setfreq_i(sd);
4352
4353 /* Force clear snapshot state in case the snapshot button was
4354 pressed while we weren't streaming */
4355 sd->snapshot_needs_reset = 1;
4356 sd_reset_snapshot(gspca_dev);
4357
4358 sd->first_frame = 3;
4359
4360 ov51x_restart(sd);
4361 ov51x_led_control(sd, 1);
4362 return gspca_dev->usb_err;
4363 }
4364
4365 static void sd_stopN(struct gspca_dev *gspca_dev)
4366 {
4367 struct sd *sd = (struct sd *) gspca_dev;
4368
4369 ov51x_stop(sd);
4370 ov51x_led_control(sd, 0);
4371 }
4372
4373 static void sd_stop0(struct gspca_dev *gspca_dev)
4374 {
4375 struct sd *sd = (struct sd *) gspca_dev;
4376
4377 if (!sd->gspca_dev.present)
4378 return;
4379 if (sd->bridge == BRIDGE_W9968CF)
4380 w9968cf_stop0(sd);
4381
4382 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4383 /* If the last button state is pressed, release it now! */
4384 if (sd->snapshot_pressed) {
4385 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
4386 input_sync(gspca_dev->input_dev);
4387 sd->snapshot_pressed = 0;
4388 }
4389 #endif
4390 if (sd->bridge == BRIDGE_OV519)
4391 reg_w(sd, OV519_R57_SNAPSHOT, 0x23);
4392 }
4393
4394 static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
4395 {
4396 struct sd *sd = (struct sd *) gspca_dev;
4397
4398 if (sd->snapshot_pressed != state) {
4399 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4400 input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
4401 input_sync(gspca_dev->input_dev);
4402 #endif
4403 if (state)
4404 sd->snapshot_needs_reset = 1;
4405
4406 sd->snapshot_pressed = state;
4407 } else {
4408 /* On the ov511 / ov519 we need to reset the button state
4409 multiple times, as resetting does not work as long as the
4410 button stays pressed */
4411 switch (sd->bridge) {
4412 case BRIDGE_OV511:
4413 case BRIDGE_OV511PLUS:
4414 case BRIDGE_OV519:
4415 if (state)
4416 sd->snapshot_needs_reset = 1;
4417 break;
4418 }
4419 }
4420 }
4421
4422 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
4423 u8 *in, /* isoc packet */
4424 int len) /* iso packet length */
4425 {
4426 struct sd *sd = (struct sd *) gspca_dev;
4427
4428 /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
4429 * byte non-zero. The EOF packet has image width/height in the
4430 * 10th and 11th bytes. The 9th byte is given as follows:
4431 *
4432 * bit 7: EOF
4433 * 6: compression enabled
4434 * 5: 422/420/400 modes
4435 * 4: 422/420/400 modes
4436 * 3: 1
4437 * 2: snapshot button on
4438 * 1: snapshot frame
4439 * 0: even/odd field
4440 */
4441 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
4442 (in[8] & 0x08)) {
4443 ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
4444 if (in[8] & 0x80) {
4445 /* Frame end */
4446 if ((in[9] + 1) * 8 != gspca_dev->width ||
4447 (in[10] + 1) * 8 != gspca_dev->height) {
4448 PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
4449 " requested: %dx%d\n",
4450 (in[9] + 1) * 8, (in[10] + 1) * 8,
4451 gspca_dev->width, gspca_dev->height);
4452 gspca_dev->last_packet_type = DISCARD_PACKET;
4453 return;
4454 }
4455 /* Add 11 byte footer to frame, might be useful */
4456 gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4457 return;
4458 } else {
4459 /* Frame start */
4460 gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4461 sd->packet_nr = 0;
4462 }
4463 }
4464
4465 /* Ignore the packet number */
4466 len--;
4467
4468 /* intermediate packet */
4469 gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4470 }
4471
4472 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4473 u8 *data, /* isoc packet */
4474 int len) /* iso packet length */
4475 {
4476 struct sd *sd = (struct sd *) gspca_dev;
4477
4478 /* A false positive here is likely, until OVT gives me
4479 * the definitive SOF/EOF format */
4480 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4481 ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4482 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4483 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4484 sd->packet_nr = 0;
4485 }
4486
4487 if (gspca_dev->last_packet_type == DISCARD_PACKET)
4488 return;
4489
4490 /* Does this device use packet numbers ? */
4491 if (len & 7) {
4492 len--;
4493 if (sd->packet_nr == data[len])
4494 sd->packet_nr++;
4495 /* The last few packets of the frame (which are all 0's
4496 except that they may contain part of the footer), are
4497 numbered 0 */
4498 else if (sd->packet_nr == 0 || data[len]) {
4499 PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
4500 (int)data[len], (int)sd->packet_nr);
4501 gspca_dev->last_packet_type = DISCARD_PACKET;
4502 return;
4503 }
4504 }
4505
4506 /* intermediate packet */
4507 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4508 }
4509
4510 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4511 u8 *data, /* isoc packet */
4512 int len) /* iso packet length */
4513 {
4514 /* Header of ov519 is 16 bytes:
4515 * Byte Value Description
4516 * 0 0xff magic
4517 * 1 0xff magic
4518 * 2 0xff magic
4519 * 3 0xXX 0x50 = SOF, 0x51 = EOF
4520 * 9 0xXX 0x01 initial frame without data,
4521 * 0x00 standard frame with image
4522 * 14 Lo in EOF: length of image data / 8
4523 * 15 Hi
4524 */
4525
4526 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4527 switch (data[3]) {
4528 case 0x50: /* start of frame */
4529 /* Don't check the button state here, as the state
4530 usually (always ?) changes at EOF and checking it
4531 here leads to unnecessary snapshot state resets. */
4532 #define HDRSZ 16
4533 data += HDRSZ;
4534 len -= HDRSZ;
4535 #undef HDRSZ
4536 if (data[0] == 0xff || data[1] == 0xd8)
4537 gspca_frame_add(gspca_dev, FIRST_PACKET,
4538 data, len);
4539 else
4540 gspca_dev->last_packet_type = DISCARD_PACKET;
4541 return;
4542 case 0x51: /* end of frame */
4543 ov51x_handle_button(gspca_dev, data[11] & 1);
4544 if (data[9] != 0)
4545 gspca_dev->last_packet_type = DISCARD_PACKET;
4546 gspca_frame_add(gspca_dev, LAST_PACKET,
4547 NULL, 0);
4548 return;
4549 }
4550 }
4551
4552 /* intermediate packet */
4553 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4554 }
4555
4556 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4557 u8 *data, /* isoc packet */
4558 int len) /* iso packet length */
4559 {
4560 struct sd *sd = (struct sd *) gspca_dev;
4561
4562 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4563
4564 /* A short read signals EOF */
4565 if (len < gspca_dev->cam.bulk_size) {
4566 /* If the frame is short, and it is one of the first ones
4567 the sensor and bridge are still syncing, so drop it. */
4568 if (sd->first_frame) {
4569 sd->first_frame--;
4570 if (gspca_dev->image_len <
4571 sd->gspca_dev.width * sd->gspca_dev.height)
4572 gspca_dev->last_packet_type = DISCARD_PACKET;
4573 }
4574 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4575 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4576 }
4577 }
4578
4579 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4580 u8 *data, /* isoc packet */
4581 int len) /* iso packet length */
4582 {
4583 struct sd *sd = (struct sd *) gspca_dev;
4584
4585 switch (sd->bridge) {
4586 case BRIDGE_OV511:
4587 case BRIDGE_OV511PLUS:
4588 ov511_pkt_scan(gspca_dev, data, len);
4589 break;
4590 case BRIDGE_OV518:
4591 case BRIDGE_OV518PLUS:
4592 ov518_pkt_scan(gspca_dev, data, len);
4593 break;
4594 case BRIDGE_OV519:
4595 ov519_pkt_scan(gspca_dev, data, len);
4596 break;
4597 case BRIDGE_OVFX2:
4598 ovfx2_pkt_scan(gspca_dev, data, len);
4599 break;
4600 case BRIDGE_W9968CF:
4601 w9968cf_pkt_scan(gspca_dev, data, len);
4602 break;
4603 }
4604 }
4605
4606 /* -- management routines -- */
4607
4608 static void setbrightness(struct gspca_dev *gspca_dev)
4609 {
4610 struct sd *sd = (struct sd *) gspca_dev;
4611 int val;
4612 static const struct ov_i2c_regvals brit_7660[][7] = {
4613 {{0x0f, 0x6a}, {0x24, 0x40}, {0x25, 0x2b}, {0x26, 0x90},
4614 {0x27, 0xe0}, {0x28, 0xe0}, {0x2c, 0xe0}},
4615 {{0x0f, 0x6a}, {0x24, 0x50}, {0x25, 0x40}, {0x26, 0xa1},
4616 {0x27, 0xc0}, {0x28, 0xc0}, {0x2c, 0xc0}},
4617 {{0x0f, 0x6a}, {0x24, 0x68}, {0x25, 0x58}, {0x26, 0xc2},
4618 {0x27, 0xa0}, {0x28, 0xa0}, {0x2c, 0xa0}},
4619 {{0x0f, 0x6a}, {0x24, 0x70}, {0x25, 0x68}, {0x26, 0xd3},
4620 {0x27, 0x80}, {0x28, 0x80}, {0x2c, 0x80}},
4621 {{0x0f, 0x6a}, {0x24, 0x80}, {0x25, 0x70}, {0x26, 0xd3},
4622 {0x27, 0x20}, {0x28, 0x20}, {0x2c, 0x20}},
4623 {{0x0f, 0x6a}, {0x24, 0x88}, {0x25, 0x78}, {0x26, 0xd3},
4624 {0x27, 0x40}, {0x28, 0x40}, {0x2c, 0x40}},
4625 {{0x0f, 0x6a}, {0x24, 0x90}, {0x25, 0x80}, {0x26, 0xd4},
4626 {0x27, 0x60}, {0x28, 0x60}, {0x2c, 0x60}}
4627 };
4628
4629 val = sd->ctrls[BRIGHTNESS].val;
4630 switch (sd->sensor) {
4631 case SEN_OV8610:
4632 case SEN_OV7610:
4633 case SEN_OV76BE:
4634 case SEN_OV6620:
4635 case SEN_OV6630:
4636 case SEN_OV66308AF:
4637 case SEN_OV7640:
4638 case SEN_OV7648:
4639 i2c_w(sd, OV7610_REG_BRT, val);
4640 break;
4641 case SEN_OV7620:
4642 case SEN_OV7620AE:
4643 /* 7620 doesn't like manual changes when in auto mode */
4644 if (!sd->ctrls[AUTOBRIGHT].val)
4645 i2c_w(sd, OV7610_REG_BRT, val);
4646 break;
4647 case SEN_OV7660:
4648 write_i2c_regvals(sd, brit_7660[val],
4649 ARRAY_SIZE(brit_7660[0]));
4650 break;
4651 case SEN_OV7670:
4652 /*win trace
4653 * i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_AEC); */
4654 i2c_w(sd, OV7670_R55_BRIGHT, ov7670_abs_to_sm(val));
4655 break;
4656 }
4657 }
4658
4659 static void setcontrast(struct gspca_dev *gspca_dev)
4660 {
4661 struct sd *sd = (struct sd *) gspca_dev;
4662 int val;
4663 static const struct ov_i2c_regvals contrast_7660[][31] = {
4664 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0xa0},
4665 {0x70, 0x58}, {0x71, 0x38}, {0x72, 0x30}, {0x73, 0x30},
4666 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x24}, {0x77, 0x24},
4667 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x34},
4668 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x65},
4669 {0x80, 0x70}, {0x81, 0x77}, {0x82, 0x7d}, {0x83, 0x83},
4670 {0x84, 0x88}, {0x85, 0x8d}, {0x86, 0x96}, {0x87, 0x9f},
4671 {0x88, 0xb0}, {0x89, 0xc4}, {0x8a, 0xd9}},
4672 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf8}, {0x6f, 0x94},
4673 {0x70, 0x58}, {0x71, 0x40}, {0x72, 0x30}, {0x73, 0x30},
4674 {0x74, 0x30}, {0x75, 0x30}, {0x76, 0x2c}, {0x77, 0x24},
4675 {0x78, 0x22}, {0x79, 0x28}, {0x7a, 0x2a}, {0x7b, 0x31},
4676 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3d}, {0x7f, 0x62},
4677 {0x80, 0x6d}, {0x81, 0x75}, {0x82, 0x7b}, {0x83, 0x81},
4678 {0x84, 0x87}, {0x85, 0x8d}, {0x86, 0x98}, {0x87, 0xa1},
4679 {0x88, 0xb2}, {0x89, 0xc6}, {0x8a, 0xdb}},
4680 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x84},
4681 {0x70, 0x58}, {0x71, 0x48}, {0x72, 0x40}, {0x73, 0x40},
4682 {0x74, 0x28}, {0x75, 0x28}, {0x76, 0x28}, {0x77, 0x24},
4683 {0x78, 0x26}, {0x79, 0x28}, {0x7a, 0x28}, {0x7b, 0x34},
4684 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x5d},
4685 {0x80, 0x68}, {0x81, 0x71}, {0x82, 0x79}, {0x83, 0x81},
4686 {0x84, 0x86}, {0x85, 0x8b}, {0x86, 0x95}, {0x87, 0x9e},
4687 {0x88, 0xb1}, {0x89, 0xc5}, {0x8a, 0xd9}},
4688 {{0x6c, 0xf0}, {0x6d, 0xf0}, {0x6e, 0xf0}, {0x6f, 0x70},
4689 {0x70, 0x58}, {0x71, 0x58}, {0x72, 0x48}, {0x73, 0x48},
4690 {0x74, 0x38}, {0x75, 0x40}, {0x76, 0x34}, {0x77, 0x34},
4691 {0x78, 0x2e}, {0x79, 0x28}, {0x7a, 0x24}, {0x7b, 0x22},
4692 {0x7c, 0x0f}, {0x7d, 0x1e}, {0x7e, 0x3c}, {0x7f, 0x58},
4693 {0x80, 0x63}, {0x81, 0x6e}, {0x82, 0x77}, {0x83, 0x80},
4694 {0x84, 0x87}, {0x85, 0x8f}, {0x86, 0x9c}, {0x87, 0xa9},
4695 {0x88, 0xc0}, {0x89, 0xd4}, {0x8a, 0xe6}},
4696 {{0x6c, 0xa0}, {0x6d, 0xf0}, {0x6e, 0x90}, {0x6f, 0x80},
4697 {0x70, 0x70}, {0x71, 0x80}, {0x72, 0x60}, {0x73, 0x60},
4698 {0x74, 0x58}, {0x75, 0x60}, {0x76, 0x4c}, {0x77, 0x38},
4699 {0x78, 0x38}, {0x79, 0x2a}, {0x7a, 0x20}, {0x7b, 0x0e},
4700 {0x7c, 0x0a}, {0x7d, 0x14}, {0x7e, 0x26}, {0x7f, 0x46},
4701 {0x80, 0x54}, {0x81, 0x64}, {0x82, 0x70}, {0x83, 0x7c},
4702 {0x84, 0x87}, {0x85, 0x93}, {0x86, 0xa6}, {0x87, 0xb4},
4703 {0x88, 0xd0}, {0x89, 0xe5}, {0x8a, 0xf5}},
4704 {{0x6c, 0x60}, {0x6d, 0x80}, {0x6e, 0x60}, {0x6f, 0x80},
4705 {0x70, 0x80}, {0x71, 0x80}, {0x72, 0x88}, {0x73, 0x30},
4706 {0x74, 0x70}, {0x75, 0x68}, {0x76, 0x64}, {0x77, 0x50},
4707 {0x78, 0x3c}, {0x79, 0x22}, {0x7a, 0x10}, {0x7b, 0x08},
4708 {0x7c, 0x06}, {0x7d, 0x0e}, {0x7e, 0x1a}, {0x7f, 0x3a},
4709 {0x80, 0x4a}, {0x81, 0x5a}, {0x82, 0x6b}, {0x83, 0x7b},
4710 {0x84, 0x89}, {0x85, 0x96}, {0x86, 0xaf}, {0x87, 0xc3},
4711 {0x88, 0xe1}, {0x89, 0xf2}, {0x8a, 0xfa}},
4712 {{0x6c, 0x20}, {0x6d, 0x40}, {0x6e, 0x20}, {0x6f, 0x60},
4713 {0x70, 0x88}, {0x71, 0xc8}, {0x72, 0xc0}, {0x73, 0xb8},
4714 {0x74, 0xa8}, {0x75, 0xb8}, {0x76, 0x80}, {0x77, 0x5c},
4715 {0x78, 0x26}, {0x79, 0x10}, {0x7a, 0x08}, {0x7b, 0x04},
4716 {0x7c, 0x02}, {0x7d, 0x06}, {0x7e, 0x0a}, {0x7f, 0x22},
4717 {0x80, 0x33}, {0x81, 0x4c}, {0x82, 0x64}, {0x83, 0x7b},
4718 {0x84, 0x90}, {0x85, 0xa7}, {0x86, 0xc7}, {0x87, 0xde},
4719 {0x88, 0xf1}, {0x89, 0xf9}, {0x8a, 0xfd}},
4720 };
4721
4722 val = sd->ctrls[CONTRAST].val;
4723 switch (sd->sensor) {
4724 case SEN_OV7610:
4725 case SEN_OV6620:
4726 i2c_w(sd, OV7610_REG_CNT, val);
4727 break;
4728 case SEN_OV6630:
4729 case SEN_OV66308AF:
4730 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4731 break;
4732 case SEN_OV8610: {
4733 static const u8 ctab[] = {
4734 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4735 };
4736
4737 /* Use Y gamma control instead. Bit 0 enables it. */
4738 i2c_w(sd, 0x64, ctab[val >> 5]);
4739 break;
4740 }
4741 case SEN_OV7620:
4742 case SEN_OV7620AE: {
4743 static const u8 ctab[] = {
4744 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4745 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4746 };
4747
4748 /* Use Y gamma control instead. Bit 0 enables it. */
4749 i2c_w(sd, 0x64, ctab[val >> 4]);
4750 break;
4751 }
4752 case SEN_OV7660:
4753 write_i2c_regvals(sd, contrast_7660[val],
4754 ARRAY_SIZE(contrast_7660[0]));
4755 break;
4756 case SEN_OV7670:
4757 /* check that this isn't just the same as ov7610 */
4758 i2c_w(sd, OV7670_R56_CONTRAS, val >> 1);
4759 break;
4760 }
4761 }
4762
4763 static void setexposure(struct gspca_dev *gspca_dev)
4764 {
4765 struct sd *sd = (struct sd *) gspca_dev;
4766
4767 if (!sd->ctrls[AUTOGAIN].val)
4768 i2c_w(sd, 0x10, sd->ctrls[EXPOSURE].val);
4769 }
4770
4771 static void setcolors(struct gspca_dev *gspca_dev)
4772 {
4773 struct sd *sd = (struct sd *) gspca_dev;
4774 int val;
4775 static const struct ov_i2c_regvals colors_7660[][6] = {
4776 {{0x4f, 0x28}, {0x50, 0x2a}, {0x51, 0x02}, {0x52, 0x0a},
4777 {0x53, 0x19}, {0x54, 0x23}},
4778 {{0x4f, 0x47}, {0x50, 0x4a}, {0x51, 0x03}, {0x52, 0x11},
4779 {0x53, 0x2c}, {0x54, 0x3e}},
4780 {{0x4f, 0x66}, {0x50, 0x6b}, {0x51, 0x05}, {0x52, 0x19},
4781 {0x53, 0x40}, {0x54, 0x59}},
4782 {{0x4f, 0x84}, {0x50, 0x8b}, {0x51, 0x06}, {0x52, 0x20},
4783 {0x53, 0x53}, {0x54, 0x73}},
4784 {{0x4f, 0xa3}, {0x50, 0xab}, {0x51, 0x08}, {0x52, 0x28},
4785 {0x53, 0x66}, {0x54, 0x8e}},
4786 };
4787
4788 val = sd->ctrls[COLORS].val;
4789 switch (sd->sensor) {
4790 case SEN_OV8610:
4791 case SEN_OV7610:
4792 case SEN_OV76BE:
4793 case SEN_OV6620:
4794 case SEN_OV6630:
4795 case SEN_OV66308AF:
4796 i2c_w(sd, OV7610_REG_SAT, val);
4797 break;
4798 case SEN_OV7620:
4799 case SEN_OV7620AE:
4800 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4801 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4802 if (rc < 0)
4803 goto out; */
4804 i2c_w(sd, OV7610_REG_SAT, val);
4805 break;
4806 case SEN_OV7640:
4807 case SEN_OV7648:
4808 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4809 break;
4810 case SEN_OV7660:
4811 write_i2c_regvals(sd, colors_7660[val],
4812 ARRAY_SIZE(colors_7660[0]));
4813 break;
4814 case SEN_OV7670:
4815 /* supported later once I work out how to do it
4816 * transparently fail now! */
4817 /* set REG_COM13 values for UV sat auto mode */
4818 break;
4819 }
4820 }
4821
4822 static void setautobright(struct gspca_dev *gspca_dev)
4823 {
4824 struct sd *sd = (struct sd *) gspca_dev;
4825
4826 i2c_w_mask(sd, 0x2d, sd->ctrls[AUTOBRIGHT].val ? 0x10 : 0x00, 0x10);
4827 }
4828
4829 static int sd_setautogain(struct gspca_dev *gspca_dev, __s32 val)
4830 {
4831 struct sd *sd = (struct sd *) gspca_dev;
4832
4833 sd->ctrls[AUTOGAIN].val = val;
4834 if (val) {
4835 gspca_dev->ctrl_inac |= (1 << EXPOSURE);
4836 } else {
4837 gspca_dev->ctrl_inac &= ~(1 << EXPOSURE);
4838 sd->ctrls[EXPOSURE].val = i2c_r(sd, 0x10);
4839 }
4840 if (gspca_dev->streaming)
4841 setautogain(gspca_dev);
4842 return gspca_dev->usb_err;
4843 }
4844
4845 static void setfreq_i(struct sd *sd)
4846 {
4847 if (sd->sensor == SEN_OV7660
4848 || sd->sensor == SEN_OV7670) {
4849 switch (sd->ctrls[FREQ].val) {
4850 case 0: /* Banding filter disabled */
4851 i2c_w_mask(sd, OV7670_R13_COM8, 0, OV7670_COM8_BFILT);
4852 break;
4853 case 1: /* 50 hz */
4854 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4855 OV7670_COM8_BFILT);
4856 i2c_w_mask(sd, OV7670_R3B_COM11, 0x08, 0x18);
4857 break;
4858 case 2: /* 60 hz */
4859 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4860 OV7670_COM8_BFILT);
4861 i2c_w_mask(sd, OV7670_R3B_COM11, 0x00, 0x18);
4862 break;
4863 case 3: /* Auto hz - ov7670 only */
4864 i2c_w_mask(sd, OV7670_R13_COM8, OV7670_COM8_BFILT,
4865 OV7670_COM8_BFILT);
4866 i2c_w_mask(sd, OV7670_R3B_COM11, OV7670_COM11_HZAUTO,
4867 0x18);
4868 break;
4869 }
4870 } else {
4871 switch (sd->ctrls[FREQ].val) {
4872 case 0: /* Banding filter disabled */
4873 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4874 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4875 break;
4876 case 1: /* 50 hz (filter on and framerate adj) */
4877 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4878 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4879 /* 20 fps -> 16.667 fps */
4880 if (sd->sensor == SEN_OV6620 ||
4881 sd->sensor == SEN_OV6630 ||
4882 sd->sensor == SEN_OV66308AF)
4883 i2c_w(sd, 0x2b, 0x5e);
4884 else
4885 i2c_w(sd, 0x2b, 0xac);
4886 break;
4887 case 2: /* 60 hz (filter on, ...) */
4888 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4889 if (sd->sensor == SEN_OV6620 ||
4890 sd->sensor == SEN_OV6630 ||
4891 sd->sensor == SEN_OV66308AF) {
4892 /* 20 fps -> 15 fps */
4893 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4894 i2c_w(sd, 0x2b, 0xa8);
4895 } else {
4896 /* no framerate adj. */
4897 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4898 }
4899 break;
4900 }
4901 }
4902 }
4903 static void setfreq(struct gspca_dev *gspca_dev)
4904 {
4905 struct sd *sd = (struct sd *) gspca_dev;
4906
4907 setfreq_i(sd);
4908
4909 /* Ugly but necessary */
4910 if (sd->bridge == BRIDGE_W9968CF)
4911 w9968cf_set_crop_window(sd);
4912 }
4913
4914 static int sd_querymenu(struct gspca_dev *gspca_dev,
4915 struct v4l2_querymenu *menu)
4916 {
4917 struct sd *sd = (struct sd *) gspca_dev;
4918
4919 switch (menu->id) {
4920 case V4L2_CID_POWER_LINE_FREQUENCY:
4921 switch (menu->index) {
4922 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
4923 strcpy((char *) menu->name, "NoFliker");
4924 return 0;
4925 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
4926 strcpy((char *) menu->name, "50 Hz");
4927 return 0;
4928 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
4929 strcpy((char *) menu->name, "60 Hz");
4930 return 0;
4931 case 3:
4932 if (sd->sensor != SEN_OV7670)
4933 return -EINVAL;
4934
4935 strcpy((char *) menu->name, "Automatic");
4936 return 0;
4937 }
4938 break;
4939 }
4940 return -EINVAL;
4941 }
4942
4943 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4944 struct v4l2_jpegcompression *jcomp)
4945 {
4946 struct sd *sd = (struct sd *) gspca_dev;
4947
4948 if (sd->bridge != BRIDGE_W9968CF)
4949 return -EINVAL;
4950
4951 memset(jcomp, 0, sizeof *jcomp);
4952 jcomp->quality = sd->quality;
4953 jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4954 V4L2_JPEG_MARKER_DRI;
4955 return 0;
4956 }
4957
4958 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4959 struct v4l2_jpegcompression *jcomp)
4960 {
4961 struct sd *sd = (struct sd *) gspca_dev;
4962
4963 if (sd->bridge != BRIDGE_W9968CF)
4964 return -EINVAL;
4965
4966 if (gspca_dev->streaming)
4967 return -EBUSY;
4968
4969 if (jcomp->quality < QUALITY_MIN)
4970 sd->quality = QUALITY_MIN;
4971 else if (jcomp->quality > QUALITY_MAX)
4972 sd->quality = QUALITY_MAX;
4973 else
4974 sd->quality = jcomp->quality;
4975
4976 /* Return resulting jcomp params to app */
4977 sd_get_jcomp(gspca_dev, jcomp);
4978
4979 return 0;
4980 }
4981
4982 /* sub-driver description */
4983 static const struct sd_desc sd_desc = {
4984 .name = MODULE_NAME,
4985 .ctrls = sd_ctrls,
4986 .nctrls = ARRAY_SIZE(sd_ctrls),
4987 .config = sd_config,
4988 .init = sd_init,
4989 .isoc_init = sd_isoc_init,
4990 .start = sd_start,
4991 .stopN = sd_stopN,
4992 .stop0 = sd_stop0,
4993 .pkt_scan = sd_pkt_scan,
4994 .dq_callback = sd_reset_snapshot,
4995 .querymenu = sd_querymenu,
4996 .get_jcomp = sd_get_jcomp,
4997 .set_jcomp = sd_set_jcomp,
4998 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4999 .other_input = 1,
5000 #endif
5001 };
5002
5003 /* -- module initialisation -- */
5004 static const struct usb_device_id device_table[] = {
5005 {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
5006 {USB_DEVICE(0x041e, 0x4052),
5007 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5008 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
5009 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
5010 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
5011 {USB_DEVICE(0x041e, 0x4064), .driver_info = BRIDGE_OV519 },
5012 {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
5013 {USB_DEVICE(0x041e, 0x4068), .driver_info = BRIDGE_OV519 },
5014 {USB_DEVICE(0x045e, 0x028c),
5015 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5016 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
5017 {USB_DEVICE(0x054c, 0x0155), .driver_info = BRIDGE_OV519 },
5018 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
5019 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
5020 {USB_DEVICE(0x05a9, 0x0519),
5021 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5022 {USB_DEVICE(0x05a9, 0x0530),
5023 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
5024 {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
5025 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
5026 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
5027 {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
5028 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
5029 {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
5030 {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
5031 {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
5032 {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
5033 {USB_DEVICE(0x8020, 0xef04), .driver_info = BRIDGE_OVFX2 },
5034 {}
5035 };
5036
5037 MODULE_DEVICE_TABLE(usb, device_table);
5038
5039 /* -- device connect -- */
5040 static int sd_probe(struct usb_interface *intf,
5041 const struct usb_device_id *id)
5042 {
5043 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
5044 THIS_MODULE);
5045 }
5046
5047 static struct usb_driver sd_driver = {
5048 .name = MODULE_NAME,
5049 .id_table = device_table,
5050 .probe = sd_probe,
5051 .disconnect = gspca_disconnect,
5052 #ifdef CONFIG_PM
5053 .suspend = gspca_suspend,
5054 .resume = gspca_resume,
5055 #endif
5056 };
5057
5058 /* -- module insert / remove -- */
5059 static int __init sd_mod_init(void)
5060 {
5061 return usb_register(&sd_driver);
5062 }
5063 static void __exit sd_mod_exit(void)
5064 {
5065 usb_deregister(&sd_driver);
5066 }
5067
5068 module_init(sd_mod_init);
5069 module_exit(sd_mod_exit);
5070
5071 module_param(frame_rate, int, 0644);
5072 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");
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