Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[linux-btrfs-devel.git] / drivers / media / video / marvell-ccic / mcam-core.c
blob83c14514cd52c5db2fce764c420506ed02c687a2
1 /*
2 * The Marvell camera core. This device appears in a number of settings,
3 * so it needs platform-specific support outside of the core.
5 * Copyright 2011 Jonathan Corbet corbet@lwn.net
6 */
7 #include <linux/kernel.h>
8 #include <linux/module.h>
9 #include <linux/fs.h>
10 #include <linux/mm.h>
11 #include <linux/i2c.h>
12 #include <linux/interrupt.h>
13 #include <linux/spinlock.h>
14 #include <linux/slab.h>
15 #include <linux/device.h>
16 #include <linux/wait.h>
17 #include <linux/list.h>
18 #include <linux/dma-mapping.h>
19 #include <linux/delay.h>
20 #include <linux/vmalloc.h>
21 #include <linux/io.h>
22 #include <linux/videodev2.h>
23 #include <media/v4l2-device.h>
24 #include <media/v4l2-ioctl.h>
25 #include <media/v4l2-chip-ident.h>
26 #include <media/ov7670.h>
27 #include <media/videobuf2-vmalloc.h>
28 #include <media/videobuf2-dma-contig.h>
29 #include <media/videobuf2-dma-sg.h>
31 #include "mcam-core.h"
34 * Basic frame stats - to be deleted shortly
36 static int frames;
37 static int singles;
38 static int delivered;
40 #ifdef MCAM_MODE_VMALLOC
42 * Internal DMA buffer management. Since the controller cannot do S/G I/O,
43 * we must have physically contiguous buffers to bring frames into.
44 * These parameters control how many buffers we use, whether we
45 * allocate them at load time (better chance of success, but nails down
46 * memory) or when somebody tries to use the camera (riskier), and,
47 * for load-time allocation, how big they should be.
49 * The controller can cycle through three buffers. We could use
50 * more by flipping pointers around, but it probably makes little
51 * sense.
54 static int alloc_bufs_at_read;
55 module_param(alloc_bufs_at_read, bool, 0444);
56 MODULE_PARM_DESC(alloc_bufs_at_read,
57 "Non-zero value causes DMA buffers to be allocated when the "
58 "video capture device is read, rather than at module load "
59 "time. This saves memory, but decreases the chances of "
60 "successfully getting those buffers. This parameter is "
61 "only used in the vmalloc buffer mode");
63 static int n_dma_bufs = 3;
64 module_param(n_dma_bufs, uint, 0644);
65 MODULE_PARM_DESC(n_dma_bufs,
66 "The number of DMA buffers to allocate. Can be either two "
67 "(saves memory, makes timing tighter) or three.");
69 static int dma_buf_size = VGA_WIDTH * VGA_HEIGHT * 2; /* Worst case */
70 module_param(dma_buf_size, uint, 0444);
71 MODULE_PARM_DESC(dma_buf_size,
72 "The size of the allocated DMA buffers. If actual operating "
73 "parameters require larger buffers, an attempt to reallocate "
74 "will be made.");
75 #else /* MCAM_MODE_VMALLOC */
76 static const int alloc_bufs_at_read = 0;
77 static const int n_dma_bufs = 3; /* Used by S/G_PARM */
78 #endif /* MCAM_MODE_VMALLOC */
80 static int flip;
81 module_param(flip, bool, 0444);
82 MODULE_PARM_DESC(flip,
83 "If set, the sensor will be instructed to flip the image "
84 "vertically.");
86 static int buffer_mode = -1;
87 module_param(buffer_mode, int, 0444);
88 MODULE_PARM_DESC(buffer_mode,
89 "Set the buffer mode to be used; default is to go with what "
90 "the platform driver asks for. Set to 0 for vmalloc, 1 for "
91 "DMA contiguous.");
94 * Status flags. Always manipulated with bit operations.
96 #define CF_BUF0_VALID 0 /* Buffers valid - first three */
97 #define CF_BUF1_VALID 1
98 #define CF_BUF2_VALID 2
99 #define CF_DMA_ACTIVE 3 /* A frame is incoming */
100 #define CF_CONFIG_NEEDED 4 /* Must configure hardware */
101 #define CF_SINGLE_BUFFER 5 /* Running with a single buffer */
102 #define CF_SG_RESTART 6 /* SG restart needed */
104 #define sensor_call(cam, o, f, args...) \
105 v4l2_subdev_call(cam->sensor, o, f, ##args)
107 static struct mcam_format_struct {
108 __u8 *desc;
109 __u32 pixelformat;
110 int bpp; /* Bytes per pixel */
111 enum v4l2_mbus_pixelcode mbus_code;
112 } mcam_formats[] = {
114 .desc = "YUYV 4:2:2",
115 .pixelformat = V4L2_PIX_FMT_YUYV,
116 .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
117 .bpp = 2,
120 .desc = "RGB 444",
121 .pixelformat = V4L2_PIX_FMT_RGB444,
122 .mbus_code = V4L2_MBUS_FMT_RGB444_2X8_PADHI_LE,
123 .bpp = 2,
126 .desc = "RGB 565",
127 .pixelformat = V4L2_PIX_FMT_RGB565,
128 .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_LE,
129 .bpp = 2,
132 .desc = "Raw RGB Bayer",
133 .pixelformat = V4L2_PIX_FMT_SBGGR8,
134 .mbus_code = V4L2_MBUS_FMT_SBGGR8_1X8,
135 .bpp = 1
138 #define N_MCAM_FMTS ARRAY_SIZE(mcam_formats)
140 static struct mcam_format_struct *mcam_find_format(u32 pixelformat)
142 unsigned i;
144 for (i = 0; i < N_MCAM_FMTS; i++)
145 if (mcam_formats[i].pixelformat == pixelformat)
146 return mcam_formats + i;
147 /* Not found? Then return the first format. */
148 return mcam_formats;
152 * The default format we use until somebody says otherwise.
154 static const struct v4l2_pix_format mcam_def_pix_format = {
155 .width = VGA_WIDTH,
156 .height = VGA_HEIGHT,
157 .pixelformat = V4L2_PIX_FMT_YUYV,
158 .field = V4L2_FIELD_NONE,
159 .bytesperline = VGA_WIDTH*2,
160 .sizeimage = VGA_WIDTH*VGA_HEIGHT*2,
163 static const enum v4l2_mbus_pixelcode mcam_def_mbus_code =
164 V4L2_MBUS_FMT_YUYV8_2X8;
168 * The two-word DMA descriptor format used by the Armada 610 and like. There
169 * Is a three-word format as well (set C1_DESC_3WORD) where the third
170 * word is a pointer to the next descriptor, but we don't use it. Two-word
171 * descriptors have to be contiguous in memory.
173 struct mcam_dma_desc {
174 u32 dma_addr;
175 u32 segment_len;
179 * Our buffer type for working with videobuf2. Note that the vb2
180 * developers have decreed that struct vb2_buffer must be at the
181 * beginning of this structure.
183 struct mcam_vb_buffer {
184 struct vb2_buffer vb_buf;
185 struct list_head queue;
186 struct mcam_dma_desc *dma_desc; /* Descriptor virtual address */
187 dma_addr_t dma_desc_pa; /* Descriptor physical address */
188 int dma_desc_nent; /* Number of mapped descriptors */
191 static inline struct mcam_vb_buffer *vb_to_mvb(struct vb2_buffer *vb)
193 return container_of(vb, struct mcam_vb_buffer, vb_buf);
197 * Hand a completed buffer back to user space.
199 static void mcam_buffer_done(struct mcam_camera *cam, int frame,
200 struct vb2_buffer *vbuf)
202 vbuf->v4l2_buf.bytesused = cam->pix_format.sizeimage;
203 vbuf->v4l2_buf.sequence = cam->buf_seq[frame];
204 vb2_set_plane_payload(vbuf, 0, cam->pix_format.sizeimage);
205 vb2_buffer_done(vbuf, VB2_BUF_STATE_DONE);
211 * Debugging and related.
213 #define cam_err(cam, fmt, arg...) \
214 dev_err((cam)->dev, fmt, ##arg);
215 #define cam_warn(cam, fmt, arg...) \
216 dev_warn((cam)->dev, fmt, ##arg);
217 #define cam_dbg(cam, fmt, arg...) \
218 dev_dbg((cam)->dev, fmt, ##arg);
222 * Flag manipulation helpers
224 static void mcam_reset_buffers(struct mcam_camera *cam)
226 int i;
228 cam->next_buf = -1;
229 for (i = 0; i < cam->nbufs; i++)
230 clear_bit(i, &cam->flags);
233 static inline int mcam_needs_config(struct mcam_camera *cam)
235 return test_bit(CF_CONFIG_NEEDED, &cam->flags);
238 static void mcam_set_config_needed(struct mcam_camera *cam, int needed)
240 if (needed)
241 set_bit(CF_CONFIG_NEEDED, &cam->flags);
242 else
243 clear_bit(CF_CONFIG_NEEDED, &cam->flags);
246 /* ------------------------------------------------------------------- */
248 * Make the controller start grabbing images. Everything must
249 * be set up before doing this.
251 static void mcam_ctlr_start(struct mcam_camera *cam)
253 /* set_bit performs a read, so no other barrier should be
254 needed here */
255 mcam_reg_set_bit(cam, REG_CTRL0, C0_ENABLE);
258 static void mcam_ctlr_stop(struct mcam_camera *cam)
260 mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
263 /* ------------------------------------------------------------------- */
265 #ifdef MCAM_MODE_VMALLOC
267 * Code specific to the vmalloc buffer mode.
271 * Allocate in-kernel DMA buffers for vmalloc mode.
273 static int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime)
275 int i;
277 mcam_set_config_needed(cam, 1);
278 if (loadtime)
279 cam->dma_buf_size = dma_buf_size;
280 else
281 cam->dma_buf_size = cam->pix_format.sizeimage;
282 if (n_dma_bufs > 3)
283 n_dma_bufs = 3;
285 cam->nbufs = 0;
286 for (i = 0; i < n_dma_bufs; i++) {
287 cam->dma_bufs[i] = dma_alloc_coherent(cam->dev,
288 cam->dma_buf_size, cam->dma_handles + i,
289 GFP_KERNEL);
290 if (cam->dma_bufs[i] == NULL) {
291 cam_warn(cam, "Failed to allocate DMA buffer\n");
292 break;
294 (cam->nbufs)++;
297 switch (cam->nbufs) {
298 case 1:
299 dma_free_coherent(cam->dev, cam->dma_buf_size,
300 cam->dma_bufs[0], cam->dma_handles[0]);
301 cam->nbufs = 0;
302 case 0:
303 cam_err(cam, "Insufficient DMA buffers, cannot operate\n");
304 return -ENOMEM;
306 case 2:
307 if (n_dma_bufs > 2)
308 cam_warn(cam, "Will limp along with only 2 buffers\n");
309 break;
311 return 0;
314 static void mcam_free_dma_bufs(struct mcam_camera *cam)
316 int i;
318 for (i = 0; i < cam->nbufs; i++) {
319 dma_free_coherent(cam->dev, cam->dma_buf_size,
320 cam->dma_bufs[i], cam->dma_handles[i]);
321 cam->dma_bufs[i] = NULL;
323 cam->nbufs = 0;
328 * Set up DMA buffers when operating in vmalloc mode
330 static void mcam_ctlr_dma_vmalloc(struct mcam_camera *cam)
333 * Store the first two Y buffers (we aren't supporting
334 * planar formats for now, so no UV bufs). Then either
335 * set the third if it exists, or tell the controller
336 * to just use two.
338 mcam_reg_write(cam, REG_Y0BAR, cam->dma_handles[0]);
339 mcam_reg_write(cam, REG_Y1BAR, cam->dma_handles[1]);
340 if (cam->nbufs > 2) {
341 mcam_reg_write(cam, REG_Y2BAR, cam->dma_handles[2]);
342 mcam_reg_clear_bit(cam, REG_CTRL1, C1_TWOBUFS);
343 } else
344 mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
345 if (cam->chip_id == V4L2_IDENT_CAFE)
346 mcam_reg_write(cam, REG_UBAR, 0); /* 32 bits only */
350 * Copy data out to user space in the vmalloc case
352 static void mcam_frame_tasklet(unsigned long data)
354 struct mcam_camera *cam = (struct mcam_camera *) data;
355 int i;
356 unsigned long flags;
357 struct mcam_vb_buffer *buf;
359 spin_lock_irqsave(&cam->dev_lock, flags);
360 for (i = 0; i < cam->nbufs; i++) {
361 int bufno = cam->next_buf;
363 if (cam->state != S_STREAMING || bufno < 0)
364 break; /* I/O got stopped */
365 if (++(cam->next_buf) >= cam->nbufs)
366 cam->next_buf = 0;
367 if (!test_bit(bufno, &cam->flags))
368 continue;
369 if (list_empty(&cam->buffers)) {
370 singles++;
371 break; /* Leave it valid, hope for better later */
373 delivered++;
374 clear_bit(bufno, &cam->flags);
375 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer,
376 queue);
377 list_del_init(&buf->queue);
379 * Drop the lock during the big copy. This *should* be safe...
381 spin_unlock_irqrestore(&cam->dev_lock, flags);
382 memcpy(vb2_plane_vaddr(&buf->vb_buf, 0), cam->dma_bufs[bufno],
383 cam->pix_format.sizeimage);
384 mcam_buffer_done(cam, bufno, &buf->vb_buf);
385 spin_lock_irqsave(&cam->dev_lock, flags);
387 spin_unlock_irqrestore(&cam->dev_lock, flags);
392 * Make sure our allocated buffers are up to the task.
394 static int mcam_check_dma_buffers(struct mcam_camera *cam)
396 if (cam->nbufs > 0 && cam->dma_buf_size < cam->pix_format.sizeimage)
397 mcam_free_dma_bufs(cam);
398 if (cam->nbufs == 0)
399 return mcam_alloc_dma_bufs(cam, 0);
400 return 0;
403 static void mcam_vmalloc_done(struct mcam_camera *cam, int frame)
405 tasklet_schedule(&cam->s_tasklet);
408 #else /* MCAM_MODE_VMALLOC */
410 static inline int mcam_alloc_dma_bufs(struct mcam_camera *cam, int loadtime)
412 return 0;
415 static inline void mcam_free_dma_bufs(struct mcam_camera *cam)
417 return;
420 static inline int mcam_check_dma_buffers(struct mcam_camera *cam)
422 return 0;
427 #endif /* MCAM_MODE_VMALLOC */
430 #ifdef MCAM_MODE_DMA_CONTIG
431 /* ---------------------------------------------------------------------- */
433 * DMA-contiguous code.
436 * Set up a contiguous buffer for the given frame. Here also is where
437 * the underrun strategy is set: if there is no buffer available, reuse
438 * the buffer from the other BAR and set the CF_SINGLE_BUFFER flag to
439 * keep the interrupt handler from giving that buffer back to user
440 * space. In this way, we always have a buffer to DMA to and don't
441 * have to try to play games stopping and restarting the controller.
443 static void mcam_set_contig_buffer(struct mcam_camera *cam, int frame)
445 struct mcam_vb_buffer *buf;
447 * If there are no available buffers, go into single mode
449 if (list_empty(&cam->buffers)) {
450 buf = cam->vb_bufs[frame ^ 0x1];
451 cam->vb_bufs[frame] = buf;
452 mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
453 vb2_dma_contig_plane_paddr(&buf->vb_buf, 0));
454 set_bit(CF_SINGLE_BUFFER, &cam->flags);
455 singles++;
456 return;
459 * OK, we have a buffer we can use.
461 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
462 list_del_init(&buf->queue);
463 mcam_reg_write(cam, frame == 0 ? REG_Y0BAR : REG_Y1BAR,
464 vb2_dma_contig_plane_paddr(&buf->vb_buf, 0));
465 cam->vb_bufs[frame] = buf;
466 clear_bit(CF_SINGLE_BUFFER, &cam->flags);
470 * Initial B_DMA_contig setup.
472 static void mcam_ctlr_dma_contig(struct mcam_camera *cam)
474 mcam_reg_set_bit(cam, REG_CTRL1, C1_TWOBUFS);
475 cam->nbufs = 2;
476 mcam_set_contig_buffer(cam, 0);
477 mcam_set_contig_buffer(cam, 1);
481 * Frame completion handling.
483 static void mcam_dma_contig_done(struct mcam_camera *cam, int frame)
485 struct mcam_vb_buffer *buf = cam->vb_bufs[frame];
487 if (!test_bit(CF_SINGLE_BUFFER, &cam->flags)) {
488 delivered++;
489 mcam_buffer_done(cam, frame, &buf->vb_buf);
491 mcam_set_contig_buffer(cam, frame);
494 #endif /* MCAM_MODE_DMA_CONTIG */
496 #ifdef MCAM_MODE_DMA_SG
497 /* ---------------------------------------------------------------------- */
499 * Scatter/gather-specific code.
503 * Set up the next buffer for S/G I/O; caller should be sure that
504 * the controller is stopped and a buffer is available.
506 static void mcam_sg_next_buffer(struct mcam_camera *cam)
508 struct mcam_vb_buffer *buf;
510 buf = list_first_entry(&cam->buffers, struct mcam_vb_buffer, queue);
511 list_del_init(&buf->queue);
512 mcam_reg_write(cam, REG_DMA_DESC_Y, buf->dma_desc_pa);
513 mcam_reg_write(cam, REG_DESC_LEN_Y,
514 buf->dma_desc_nent*sizeof(struct mcam_dma_desc));
515 mcam_reg_write(cam, REG_DESC_LEN_U, 0);
516 mcam_reg_write(cam, REG_DESC_LEN_V, 0);
517 cam->vb_bufs[0] = buf;
521 * Initial B_DMA_sg setup
523 static void mcam_ctlr_dma_sg(struct mcam_camera *cam)
525 mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_3WORD);
526 mcam_sg_next_buffer(cam);
527 mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA);
528 cam->nbufs = 3;
533 * Frame completion with S/G is trickier. We can't muck with
534 * a descriptor chain on the fly, since the controller buffers it
535 * internally. So we have to actually stop and restart; Marvell
536 * says this is the way to do it.
538 * Of course, stopping is easier said than done; experience shows
539 * that the controller can start a frame *after* C0_ENABLE has been
540 * cleared. So when running in S/G mode, the controller is "stopped"
541 * on receipt of the start-of-frame interrupt. That means we can
542 * safely change the DMA descriptor array here and restart things
543 * (assuming there's another buffer waiting to go).
545 static void mcam_dma_sg_done(struct mcam_camera *cam, int frame)
547 struct mcam_vb_buffer *buf = cam->vb_bufs[0];
550 * Very Bad Not Good Things happen if you don't clear
551 * C1_DESC_ENA before making any descriptor changes.
553 mcam_reg_clear_bit(cam, REG_CTRL1, C1_DESC_ENA);
555 * If we have another buffer available, put it in and
556 * restart the engine.
558 if (!list_empty(&cam->buffers)) {
559 mcam_sg_next_buffer(cam);
560 mcam_reg_set_bit(cam, REG_CTRL1, C1_DESC_ENA);
561 mcam_ctlr_start(cam);
563 * Otherwise set CF_SG_RESTART and the controller will
564 * be restarted once another buffer shows up.
566 } else {
567 set_bit(CF_SG_RESTART, &cam->flags);
568 singles++;
571 * Now we can give the completed frame back to user space.
573 delivered++;
574 mcam_buffer_done(cam, frame, &buf->vb_buf);
579 * Scatter/gather mode requires stopping the controller between
580 * frames so we can put in a new DMA descriptor array. If no new
581 * buffer exists at frame completion, the controller is left stopped;
582 * this function is charged with gettig things going again.
584 static void mcam_sg_restart(struct mcam_camera *cam)
586 mcam_ctlr_dma_sg(cam);
587 mcam_ctlr_start(cam);
588 clear_bit(CF_SG_RESTART, &cam->flags);
591 #else /* MCAM_MODE_DMA_SG */
593 static inline void mcam_sg_restart(struct mcam_camera *cam)
595 return;
598 #endif /* MCAM_MODE_DMA_SG */
600 /* ---------------------------------------------------------------------- */
602 * Buffer-mode-independent controller code.
606 * Image format setup
608 static void mcam_ctlr_image(struct mcam_camera *cam)
610 int imgsz;
611 struct v4l2_pix_format *fmt = &cam->pix_format;
613 imgsz = ((fmt->height << IMGSZ_V_SHIFT) & IMGSZ_V_MASK) |
614 (fmt->bytesperline & IMGSZ_H_MASK);
615 mcam_reg_write(cam, REG_IMGSIZE, imgsz);
616 mcam_reg_write(cam, REG_IMGOFFSET, 0);
617 /* YPITCH just drops the last two bits */
618 mcam_reg_write_mask(cam, REG_IMGPITCH, fmt->bytesperline,
619 IMGP_YP_MASK);
621 * Tell the controller about the image format we are using.
623 switch (cam->pix_format.pixelformat) {
624 case V4L2_PIX_FMT_YUYV:
625 mcam_reg_write_mask(cam, REG_CTRL0,
626 C0_DF_YUV|C0_YUV_PACKED|C0_YUVE_YUYV,
627 C0_DF_MASK);
628 break;
630 case V4L2_PIX_FMT_RGB444:
631 mcam_reg_write_mask(cam, REG_CTRL0,
632 C0_DF_RGB|C0_RGBF_444|C0_RGB4_XRGB,
633 C0_DF_MASK);
634 /* Alpha value? */
635 break;
637 case V4L2_PIX_FMT_RGB565:
638 mcam_reg_write_mask(cam, REG_CTRL0,
639 C0_DF_RGB|C0_RGBF_565|C0_RGB5_BGGR,
640 C0_DF_MASK);
641 break;
643 default:
644 cam_err(cam, "Unknown format %x\n", cam->pix_format.pixelformat);
645 break;
648 * Make sure it knows we want to use hsync/vsync.
650 mcam_reg_write_mask(cam, REG_CTRL0, C0_SIF_HVSYNC,
651 C0_SIFM_MASK);
656 * Configure the controller for operation; caller holds the
657 * device mutex.
659 static int mcam_ctlr_configure(struct mcam_camera *cam)
661 unsigned long flags;
663 spin_lock_irqsave(&cam->dev_lock, flags);
664 cam->dma_setup(cam);
665 mcam_ctlr_image(cam);
666 mcam_set_config_needed(cam, 0);
667 clear_bit(CF_SG_RESTART, &cam->flags);
668 spin_unlock_irqrestore(&cam->dev_lock, flags);
669 return 0;
672 static void mcam_ctlr_irq_enable(struct mcam_camera *cam)
675 * Clear any pending interrupts, since we do not
676 * expect to have I/O active prior to enabling.
678 mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS);
679 mcam_reg_set_bit(cam, REG_IRQMASK, FRAMEIRQS);
682 static void mcam_ctlr_irq_disable(struct mcam_camera *cam)
684 mcam_reg_clear_bit(cam, REG_IRQMASK, FRAMEIRQS);
689 static void mcam_ctlr_init(struct mcam_camera *cam)
691 unsigned long flags;
693 spin_lock_irqsave(&cam->dev_lock, flags);
695 * Make sure it's not powered down.
697 mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
699 * Turn off the enable bit. It sure should be off anyway,
700 * but it's good to be sure.
702 mcam_reg_clear_bit(cam, REG_CTRL0, C0_ENABLE);
704 * Clock the sensor appropriately. Controller clock should
705 * be 48MHz, sensor "typical" value is half that.
707 mcam_reg_write_mask(cam, REG_CLKCTRL, 2, CLK_DIV_MASK);
708 spin_unlock_irqrestore(&cam->dev_lock, flags);
713 * Stop the controller, and don't return until we're really sure that no
714 * further DMA is going on.
716 static void mcam_ctlr_stop_dma(struct mcam_camera *cam)
718 unsigned long flags;
721 * Theory: stop the camera controller (whether it is operating
722 * or not). Delay briefly just in case we race with the SOF
723 * interrupt, then wait until no DMA is active.
725 spin_lock_irqsave(&cam->dev_lock, flags);
726 clear_bit(CF_SG_RESTART, &cam->flags);
727 mcam_ctlr_stop(cam);
728 cam->state = S_IDLE;
729 spin_unlock_irqrestore(&cam->dev_lock, flags);
730 msleep(40);
731 if (test_bit(CF_DMA_ACTIVE, &cam->flags))
732 cam_err(cam, "Timeout waiting for DMA to end\n");
733 /* This would be bad news - what now? */
734 spin_lock_irqsave(&cam->dev_lock, flags);
735 mcam_ctlr_irq_disable(cam);
736 spin_unlock_irqrestore(&cam->dev_lock, flags);
740 * Power up and down.
742 static void mcam_ctlr_power_up(struct mcam_camera *cam)
744 unsigned long flags;
746 spin_lock_irqsave(&cam->dev_lock, flags);
747 cam->plat_power_up(cam);
748 mcam_reg_clear_bit(cam, REG_CTRL1, C1_PWRDWN);
749 spin_unlock_irqrestore(&cam->dev_lock, flags);
750 msleep(5); /* Just to be sure */
753 static void mcam_ctlr_power_down(struct mcam_camera *cam)
755 unsigned long flags;
757 spin_lock_irqsave(&cam->dev_lock, flags);
759 * School of hard knocks department: be sure we do any register
760 * twiddling on the controller *before* calling the platform
761 * power down routine.
763 mcam_reg_set_bit(cam, REG_CTRL1, C1_PWRDWN);
764 cam->plat_power_down(cam);
765 spin_unlock_irqrestore(&cam->dev_lock, flags);
768 /* -------------------------------------------------------------------- */
770 * Communications with the sensor.
773 static int __mcam_cam_reset(struct mcam_camera *cam)
775 return sensor_call(cam, core, reset, 0);
779 * We have found the sensor on the i2c. Let's try to have a
780 * conversation.
782 static int mcam_cam_init(struct mcam_camera *cam)
784 struct v4l2_dbg_chip_ident chip;
785 int ret;
787 mutex_lock(&cam->s_mutex);
788 if (cam->state != S_NOTREADY)
789 cam_warn(cam, "Cam init with device in funky state %d",
790 cam->state);
791 ret = __mcam_cam_reset(cam);
792 if (ret)
793 goto out;
794 chip.ident = V4L2_IDENT_NONE;
795 chip.match.type = V4L2_CHIP_MATCH_I2C_ADDR;
796 chip.match.addr = cam->sensor_addr;
797 ret = sensor_call(cam, core, g_chip_ident, &chip);
798 if (ret)
799 goto out;
800 cam->sensor_type = chip.ident;
801 if (cam->sensor_type != V4L2_IDENT_OV7670) {
802 cam_err(cam, "Unsupported sensor type 0x%x", cam->sensor_type);
803 ret = -EINVAL;
804 goto out;
806 /* Get/set parameters? */
807 ret = 0;
808 cam->state = S_IDLE;
809 out:
810 mcam_ctlr_power_down(cam);
811 mutex_unlock(&cam->s_mutex);
812 return ret;
816 * Configure the sensor to match the parameters we have. Caller should
817 * hold s_mutex
819 static int mcam_cam_set_flip(struct mcam_camera *cam)
821 struct v4l2_control ctrl;
823 memset(&ctrl, 0, sizeof(ctrl));
824 ctrl.id = V4L2_CID_VFLIP;
825 ctrl.value = flip;
826 return sensor_call(cam, core, s_ctrl, &ctrl);
830 static int mcam_cam_configure(struct mcam_camera *cam)
832 struct v4l2_mbus_framefmt mbus_fmt;
833 int ret;
835 v4l2_fill_mbus_format(&mbus_fmt, &cam->pix_format, cam->mbus_code);
836 ret = sensor_call(cam, core, init, 0);
837 if (ret == 0)
838 ret = sensor_call(cam, video, s_mbus_fmt, &mbus_fmt);
840 * OV7670 does weird things if flip is set *before* format...
842 ret += mcam_cam_set_flip(cam);
843 return ret;
847 * Get everything ready, and start grabbing frames.
849 static int mcam_read_setup(struct mcam_camera *cam)
851 int ret;
852 unsigned long flags;
855 * Configuration. If we still don't have DMA buffers,
856 * make one last, desperate attempt.
858 if (cam->buffer_mode == B_vmalloc && cam->nbufs == 0 &&
859 mcam_alloc_dma_bufs(cam, 0))
860 return -ENOMEM;
862 if (mcam_needs_config(cam)) {
863 mcam_cam_configure(cam);
864 ret = mcam_ctlr_configure(cam);
865 if (ret)
866 return ret;
870 * Turn it loose.
872 spin_lock_irqsave(&cam->dev_lock, flags);
873 mcam_reset_buffers(cam);
874 mcam_ctlr_irq_enable(cam);
875 cam->state = S_STREAMING;
876 mcam_ctlr_start(cam);
877 spin_unlock_irqrestore(&cam->dev_lock, flags);
878 return 0;
881 /* ----------------------------------------------------------------------- */
883 * Videobuf2 interface code.
886 static int mcam_vb_queue_setup(struct vb2_queue *vq, unsigned int *nbufs,
887 unsigned int *num_planes, unsigned long sizes[],
888 void *alloc_ctxs[])
890 struct mcam_camera *cam = vb2_get_drv_priv(vq);
891 int minbufs = (cam->buffer_mode == B_DMA_contig) ? 3 : 2;
893 sizes[0] = cam->pix_format.sizeimage;
894 *num_planes = 1; /* Someday we have to support planar formats... */
895 if (*nbufs < minbufs)
896 *nbufs = minbufs;
897 if (cam->buffer_mode == B_DMA_contig)
898 alloc_ctxs[0] = cam->vb_alloc_ctx;
899 return 0;
903 static void mcam_vb_buf_queue(struct vb2_buffer *vb)
905 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
906 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
907 unsigned long flags;
908 int start;
910 spin_lock_irqsave(&cam->dev_lock, flags);
911 start = (cam->state == S_BUFWAIT) && !list_empty(&cam->buffers);
912 list_add(&mvb->queue, &cam->buffers);
913 if (test_bit(CF_SG_RESTART, &cam->flags))
914 mcam_sg_restart(cam);
915 spin_unlock_irqrestore(&cam->dev_lock, flags);
916 if (start)
917 mcam_read_setup(cam);
922 * vb2 uses these to release the mutex when waiting in dqbuf. I'm
923 * not actually sure we need to do this (I'm not sure that vb2_dqbuf() needs
924 * to be called with the mutex held), but better safe than sorry.
926 static void mcam_vb_wait_prepare(struct vb2_queue *vq)
928 struct mcam_camera *cam = vb2_get_drv_priv(vq);
930 mutex_unlock(&cam->s_mutex);
933 static void mcam_vb_wait_finish(struct vb2_queue *vq)
935 struct mcam_camera *cam = vb2_get_drv_priv(vq);
937 mutex_lock(&cam->s_mutex);
941 * These need to be called with the mutex held from vb2
943 static int mcam_vb_start_streaming(struct vb2_queue *vq)
945 struct mcam_camera *cam = vb2_get_drv_priv(vq);
947 if (cam->state != S_IDLE)
948 return -EINVAL;
949 cam->sequence = 0;
951 * Videobuf2 sneakily hoards all the buffers and won't
952 * give them to us until *after* streaming starts. But
953 * we can't actually start streaming until we have a
954 * destination. So go into a wait state and hope they
955 * give us buffers soon.
957 if (cam->buffer_mode != B_vmalloc && list_empty(&cam->buffers)) {
958 cam->state = S_BUFWAIT;
959 return 0;
961 return mcam_read_setup(cam);
964 static int mcam_vb_stop_streaming(struct vb2_queue *vq)
966 struct mcam_camera *cam = vb2_get_drv_priv(vq);
967 unsigned long flags;
969 if (cam->state == S_BUFWAIT) {
970 /* They never gave us buffers */
971 cam->state = S_IDLE;
972 return 0;
974 if (cam->state != S_STREAMING)
975 return -EINVAL;
976 mcam_ctlr_stop_dma(cam);
978 * VB2 reclaims the buffers, so we need to forget
979 * about them.
981 spin_lock_irqsave(&cam->dev_lock, flags);
982 INIT_LIST_HEAD(&cam->buffers);
983 spin_unlock_irqrestore(&cam->dev_lock, flags);
984 return 0;
988 static const struct vb2_ops mcam_vb2_ops = {
989 .queue_setup = mcam_vb_queue_setup,
990 .buf_queue = mcam_vb_buf_queue,
991 .start_streaming = mcam_vb_start_streaming,
992 .stop_streaming = mcam_vb_stop_streaming,
993 .wait_prepare = mcam_vb_wait_prepare,
994 .wait_finish = mcam_vb_wait_finish,
998 #ifdef MCAM_MODE_DMA_SG
1000 * Scatter/gather mode uses all of the above functions plus a
1001 * few extras to deal with DMA mapping.
1003 static int mcam_vb_sg_buf_init(struct vb2_buffer *vb)
1005 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
1006 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1007 int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1;
1009 mvb->dma_desc = dma_alloc_coherent(cam->dev,
1010 ndesc * sizeof(struct mcam_dma_desc),
1011 &mvb->dma_desc_pa, GFP_KERNEL);
1012 if (mvb->dma_desc == NULL) {
1013 cam_err(cam, "Unable to get DMA descriptor array\n");
1014 return -ENOMEM;
1016 return 0;
1019 static int mcam_vb_sg_buf_prepare(struct vb2_buffer *vb)
1021 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
1022 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1023 struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0);
1024 struct mcam_dma_desc *desc = mvb->dma_desc;
1025 struct scatterlist *sg;
1026 int i;
1028 mvb->dma_desc_nent = dma_map_sg(cam->dev, sgd->sglist, sgd->num_pages,
1029 DMA_FROM_DEVICE);
1030 if (mvb->dma_desc_nent <= 0)
1031 return -EIO; /* Not sure what's right here */
1032 for_each_sg(sgd->sglist, sg, mvb->dma_desc_nent, i) {
1033 desc->dma_addr = sg_dma_address(sg);
1034 desc->segment_len = sg_dma_len(sg);
1035 desc++;
1037 return 0;
1040 static int mcam_vb_sg_buf_finish(struct vb2_buffer *vb)
1042 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1043 struct vb2_dma_sg_desc *sgd = vb2_dma_sg_plane_desc(vb, 0);
1045 dma_unmap_sg(cam->dev, sgd->sglist, sgd->num_pages, DMA_FROM_DEVICE);
1046 return 0;
1049 static void mcam_vb_sg_buf_cleanup(struct vb2_buffer *vb)
1051 struct mcam_camera *cam = vb2_get_drv_priv(vb->vb2_queue);
1052 struct mcam_vb_buffer *mvb = vb_to_mvb(vb);
1053 int ndesc = cam->pix_format.sizeimage/PAGE_SIZE + 1;
1055 dma_free_coherent(cam->dev, ndesc * sizeof(struct mcam_dma_desc),
1056 mvb->dma_desc, mvb->dma_desc_pa);
1060 static const struct vb2_ops mcam_vb2_sg_ops = {
1061 .queue_setup = mcam_vb_queue_setup,
1062 .buf_init = mcam_vb_sg_buf_init,
1063 .buf_prepare = mcam_vb_sg_buf_prepare,
1064 .buf_queue = mcam_vb_buf_queue,
1065 .buf_finish = mcam_vb_sg_buf_finish,
1066 .buf_cleanup = mcam_vb_sg_buf_cleanup,
1067 .start_streaming = mcam_vb_start_streaming,
1068 .stop_streaming = mcam_vb_stop_streaming,
1069 .wait_prepare = mcam_vb_wait_prepare,
1070 .wait_finish = mcam_vb_wait_finish,
1073 #endif /* MCAM_MODE_DMA_SG */
1075 static int mcam_setup_vb2(struct mcam_camera *cam)
1077 struct vb2_queue *vq = &cam->vb_queue;
1079 memset(vq, 0, sizeof(*vq));
1080 vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1081 vq->drv_priv = cam;
1082 INIT_LIST_HEAD(&cam->buffers);
1083 switch (cam->buffer_mode) {
1084 case B_DMA_contig:
1085 #ifdef MCAM_MODE_DMA_CONTIG
1086 vq->ops = &mcam_vb2_ops;
1087 vq->mem_ops = &vb2_dma_contig_memops;
1088 cam->vb_alloc_ctx = vb2_dma_contig_init_ctx(cam->dev);
1089 vq->io_modes = VB2_MMAP | VB2_USERPTR;
1090 cam->dma_setup = mcam_ctlr_dma_contig;
1091 cam->frame_complete = mcam_dma_contig_done;
1092 #endif
1093 break;
1094 case B_DMA_sg:
1095 #ifdef MCAM_MODE_DMA_SG
1096 vq->ops = &mcam_vb2_sg_ops;
1097 vq->mem_ops = &vb2_dma_sg_memops;
1098 vq->io_modes = VB2_MMAP | VB2_USERPTR;
1099 cam->dma_setup = mcam_ctlr_dma_sg;
1100 cam->frame_complete = mcam_dma_sg_done;
1101 #endif
1102 break;
1103 case B_vmalloc:
1104 #ifdef MCAM_MODE_VMALLOC
1105 tasklet_init(&cam->s_tasklet, mcam_frame_tasklet,
1106 (unsigned long) cam);
1107 vq->ops = &mcam_vb2_ops;
1108 vq->mem_ops = &vb2_vmalloc_memops;
1109 vq->buf_struct_size = sizeof(struct mcam_vb_buffer);
1110 vq->io_modes = VB2_MMAP;
1111 cam->dma_setup = mcam_ctlr_dma_vmalloc;
1112 cam->frame_complete = mcam_vmalloc_done;
1113 #endif
1114 break;
1116 return vb2_queue_init(vq);
1119 static void mcam_cleanup_vb2(struct mcam_camera *cam)
1121 vb2_queue_release(&cam->vb_queue);
1122 #ifdef MCAM_MODE_DMA_CONTIG
1123 if (cam->buffer_mode == B_DMA_contig)
1124 vb2_dma_contig_cleanup_ctx(cam->vb_alloc_ctx);
1125 #endif
1129 /* ---------------------------------------------------------------------- */
1131 * The long list of V4L2 ioctl() operations.
1134 static int mcam_vidioc_streamon(struct file *filp, void *priv,
1135 enum v4l2_buf_type type)
1137 struct mcam_camera *cam = filp->private_data;
1138 int ret;
1140 mutex_lock(&cam->s_mutex);
1141 ret = vb2_streamon(&cam->vb_queue, type);
1142 mutex_unlock(&cam->s_mutex);
1143 return ret;
1147 static int mcam_vidioc_streamoff(struct file *filp, void *priv,
1148 enum v4l2_buf_type type)
1150 struct mcam_camera *cam = filp->private_data;
1151 int ret;
1153 mutex_lock(&cam->s_mutex);
1154 ret = vb2_streamoff(&cam->vb_queue, type);
1155 mutex_unlock(&cam->s_mutex);
1156 return ret;
1160 static int mcam_vidioc_reqbufs(struct file *filp, void *priv,
1161 struct v4l2_requestbuffers *req)
1163 struct mcam_camera *cam = filp->private_data;
1164 int ret;
1166 mutex_lock(&cam->s_mutex);
1167 ret = vb2_reqbufs(&cam->vb_queue, req);
1168 mutex_unlock(&cam->s_mutex);
1169 return ret;
1173 static int mcam_vidioc_querybuf(struct file *filp, void *priv,
1174 struct v4l2_buffer *buf)
1176 struct mcam_camera *cam = filp->private_data;
1177 int ret;
1179 mutex_lock(&cam->s_mutex);
1180 ret = vb2_querybuf(&cam->vb_queue, buf);
1181 mutex_unlock(&cam->s_mutex);
1182 return ret;
1185 static int mcam_vidioc_qbuf(struct file *filp, void *priv,
1186 struct v4l2_buffer *buf)
1188 struct mcam_camera *cam = filp->private_data;
1189 int ret;
1191 mutex_lock(&cam->s_mutex);
1192 ret = vb2_qbuf(&cam->vb_queue, buf);
1193 mutex_unlock(&cam->s_mutex);
1194 return ret;
1197 static int mcam_vidioc_dqbuf(struct file *filp, void *priv,
1198 struct v4l2_buffer *buf)
1200 struct mcam_camera *cam = filp->private_data;
1201 int ret;
1203 mutex_lock(&cam->s_mutex);
1204 ret = vb2_dqbuf(&cam->vb_queue, buf, filp->f_flags & O_NONBLOCK);
1205 mutex_unlock(&cam->s_mutex);
1206 return ret;
1211 static int mcam_vidioc_queryctrl(struct file *filp, void *priv,
1212 struct v4l2_queryctrl *qc)
1214 struct mcam_camera *cam = priv;
1215 int ret;
1217 mutex_lock(&cam->s_mutex);
1218 ret = sensor_call(cam, core, queryctrl, qc);
1219 mutex_unlock(&cam->s_mutex);
1220 return ret;
1224 static int mcam_vidioc_g_ctrl(struct file *filp, void *priv,
1225 struct v4l2_control *ctrl)
1227 struct mcam_camera *cam = priv;
1228 int ret;
1230 mutex_lock(&cam->s_mutex);
1231 ret = sensor_call(cam, core, g_ctrl, ctrl);
1232 mutex_unlock(&cam->s_mutex);
1233 return ret;
1237 static int mcam_vidioc_s_ctrl(struct file *filp, void *priv,
1238 struct v4l2_control *ctrl)
1240 struct mcam_camera *cam = priv;
1241 int ret;
1243 mutex_lock(&cam->s_mutex);
1244 ret = sensor_call(cam, core, s_ctrl, ctrl);
1245 mutex_unlock(&cam->s_mutex);
1246 return ret;
1250 static int mcam_vidioc_querycap(struct file *file, void *priv,
1251 struct v4l2_capability *cap)
1253 strcpy(cap->driver, "marvell_ccic");
1254 strcpy(cap->card, "marvell_ccic");
1255 cap->version = 1;
1256 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE |
1257 V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
1258 return 0;
1262 static int mcam_vidioc_enum_fmt_vid_cap(struct file *filp,
1263 void *priv, struct v4l2_fmtdesc *fmt)
1265 if (fmt->index >= N_MCAM_FMTS)
1266 return -EINVAL;
1267 strlcpy(fmt->description, mcam_formats[fmt->index].desc,
1268 sizeof(fmt->description));
1269 fmt->pixelformat = mcam_formats[fmt->index].pixelformat;
1270 return 0;
1273 static int mcam_vidioc_try_fmt_vid_cap(struct file *filp, void *priv,
1274 struct v4l2_format *fmt)
1276 struct mcam_camera *cam = priv;
1277 struct mcam_format_struct *f;
1278 struct v4l2_pix_format *pix = &fmt->fmt.pix;
1279 struct v4l2_mbus_framefmt mbus_fmt;
1280 int ret;
1282 f = mcam_find_format(pix->pixelformat);
1283 pix->pixelformat = f->pixelformat;
1284 v4l2_fill_mbus_format(&mbus_fmt, pix, f->mbus_code);
1285 mutex_lock(&cam->s_mutex);
1286 ret = sensor_call(cam, video, try_mbus_fmt, &mbus_fmt);
1287 mutex_unlock(&cam->s_mutex);
1288 v4l2_fill_pix_format(pix, &mbus_fmt);
1289 pix->bytesperline = pix->width * f->bpp;
1290 pix->sizeimage = pix->height * pix->bytesperline;
1291 return ret;
1294 static int mcam_vidioc_s_fmt_vid_cap(struct file *filp, void *priv,
1295 struct v4l2_format *fmt)
1297 struct mcam_camera *cam = priv;
1298 struct mcam_format_struct *f;
1299 int ret;
1302 * Can't do anything if the device is not idle
1303 * Also can't if there are streaming buffers in place.
1305 if (cam->state != S_IDLE || cam->vb_queue.num_buffers > 0)
1306 return -EBUSY;
1308 f = mcam_find_format(fmt->fmt.pix.pixelformat);
1311 * See if the formatting works in principle.
1313 ret = mcam_vidioc_try_fmt_vid_cap(filp, priv, fmt);
1314 if (ret)
1315 return ret;
1317 * Now we start to change things for real, so let's do it
1318 * under lock.
1320 mutex_lock(&cam->s_mutex);
1321 cam->pix_format = fmt->fmt.pix;
1322 cam->mbus_code = f->mbus_code;
1325 * Make sure we have appropriate DMA buffers.
1327 if (cam->buffer_mode == B_vmalloc) {
1328 ret = mcam_check_dma_buffers(cam);
1329 if (ret)
1330 goto out;
1332 mcam_set_config_needed(cam, 1);
1333 ret = 0;
1334 out:
1335 mutex_unlock(&cam->s_mutex);
1336 return ret;
1340 * Return our stored notion of how the camera is/should be configured.
1341 * The V4l2 spec wants us to be smarter, and actually get this from
1342 * the camera (and not mess with it at open time). Someday.
1344 static int mcam_vidioc_g_fmt_vid_cap(struct file *filp, void *priv,
1345 struct v4l2_format *f)
1347 struct mcam_camera *cam = priv;
1349 f->fmt.pix = cam->pix_format;
1350 return 0;
1354 * We only have one input - the sensor - so minimize the nonsense here.
1356 static int mcam_vidioc_enum_input(struct file *filp, void *priv,
1357 struct v4l2_input *input)
1359 if (input->index != 0)
1360 return -EINVAL;
1362 input->type = V4L2_INPUT_TYPE_CAMERA;
1363 input->std = V4L2_STD_ALL; /* Not sure what should go here */
1364 strcpy(input->name, "Camera");
1365 return 0;
1368 static int mcam_vidioc_g_input(struct file *filp, void *priv, unsigned int *i)
1370 *i = 0;
1371 return 0;
1374 static int mcam_vidioc_s_input(struct file *filp, void *priv, unsigned int i)
1376 if (i != 0)
1377 return -EINVAL;
1378 return 0;
1381 /* from vivi.c */
1382 static int mcam_vidioc_s_std(struct file *filp, void *priv, v4l2_std_id *a)
1384 return 0;
1388 * G/S_PARM. Most of this is done by the sensor, but we are
1389 * the level which controls the number of read buffers.
1391 static int mcam_vidioc_g_parm(struct file *filp, void *priv,
1392 struct v4l2_streamparm *parms)
1394 struct mcam_camera *cam = priv;
1395 int ret;
1397 mutex_lock(&cam->s_mutex);
1398 ret = sensor_call(cam, video, g_parm, parms);
1399 mutex_unlock(&cam->s_mutex);
1400 parms->parm.capture.readbuffers = n_dma_bufs;
1401 return ret;
1404 static int mcam_vidioc_s_parm(struct file *filp, void *priv,
1405 struct v4l2_streamparm *parms)
1407 struct mcam_camera *cam = priv;
1408 int ret;
1410 mutex_lock(&cam->s_mutex);
1411 ret = sensor_call(cam, video, s_parm, parms);
1412 mutex_unlock(&cam->s_mutex);
1413 parms->parm.capture.readbuffers = n_dma_bufs;
1414 return ret;
1417 static int mcam_vidioc_g_chip_ident(struct file *file, void *priv,
1418 struct v4l2_dbg_chip_ident *chip)
1420 struct mcam_camera *cam = priv;
1422 chip->ident = V4L2_IDENT_NONE;
1423 chip->revision = 0;
1424 if (v4l2_chip_match_host(&chip->match)) {
1425 chip->ident = cam->chip_id;
1426 return 0;
1428 return sensor_call(cam, core, g_chip_ident, chip);
1431 static int mcam_vidioc_enum_framesizes(struct file *filp, void *priv,
1432 struct v4l2_frmsizeenum *sizes)
1434 struct mcam_camera *cam = priv;
1435 int ret;
1437 mutex_lock(&cam->s_mutex);
1438 ret = sensor_call(cam, video, enum_framesizes, sizes);
1439 mutex_unlock(&cam->s_mutex);
1440 return ret;
1443 static int mcam_vidioc_enum_frameintervals(struct file *filp, void *priv,
1444 struct v4l2_frmivalenum *interval)
1446 struct mcam_camera *cam = priv;
1447 int ret;
1449 mutex_lock(&cam->s_mutex);
1450 ret = sensor_call(cam, video, enum_frameintervals, interval);
1451 mutex_unlock(&cam->s_mutex);
1452 return ret;
1455 #ifdef CONFIG_VIDEO_ADV_DEBUG
1456 static int mcam_vidioc_g_register(struct file *file, void *priv,
1457 struct v4l2_dbg_register *reg)
1459 struct mcam_camera *cam = priv;
1461 if (v4l2_chip_match_host(&reg->match)) {
1462 reg->val = mcam_reg_read(cam, reg->reg);
1463 reg->size = 4;
1464 return 0;
1466 return sensor_call(cam, core, g_register, reg);
1469 static int mcam_vidioc_s_register(struct file *file, void *priv,
1470 struct v4l2_dbg_register *reg)
1472 struct mcam_camera *cam = priv;
1474 if (v4l2_chip_match_host(&reg->match)) {
1475 mcam_reg_write(cam, reg->reg, reg->val);
1476 return 0;
1478 return sensor_call(cam, core, s_register, reg);
1480 #endif
1482 static const struct v4l2_ioctl_ops mcam_v4l_ioctl_ops = {
1483 .vidioc_querycap = mcam_vidioc_querycap,
1484 .vidioc_enum_fmt_vid_cap = mcam_vidioc_enum_fmt_vid_cap,
1485 .vidioc_try_fmt_vid_cap = mcam_vidioc_try_fmt_vid_cap,
1486 .vidioc_s_fmt_vid_cap = mcam_vidioc_s_fmt_vid_cap,
1487 .vidioc_g_fmt_vid_cap = mcam_vidioc_g_fmt_vid_cap,
1488 .vidioc_enum_input = mcam_vidioc_enum_input,
1489 .vidioc_g_input = mcam_vidioc_g_input,
1490 .vidioc_s_input = mcam_vidioc_s_input,
1491 .vidioc_s_std = mcam_vidioc_s_std,
1492 .vidioc_reqbufs = mcam_vidioc_reqbufs,
1493 .vidioc_querybuf = mcam_vidioc_querybuf,
1494 .vidioc_qbuf = mcam_vidioc_qbuf,
1495 .vidioc_dqbuf = mcam_vidioc_dqbuf,
1496 .vidioc_streamon = mcam_vidioc_streamon,
1497 .vidioc_streamoff = mcam_vidioc_streamoff,
1498 .vidioc_queryctrl = mcam_vidioc_queryctrl,
1499 .vidioc_g_ctrl = mcam_vidioc_g_ctrl,
1500 .vidioc_s_ctrl = mcam_vidioc_s_ctrl,
1501 .vidioc_g_parm = mcam_vidioc_g_parm,
1502 .vidioc_s_parm = mcam_vidioc_s_parm,
1503 .vidioc_enum_framesizes = mcam_vidioc_enum_framesizes,
1504 .vidioc_enum_frameintervals = mcam_vidioc_enum_frameintervals,
1505 .vidioc_g_chip_ident = mcam_vidioc_g_chip_ident,
1506 #ifdef CONFIG_VIDEO_ADV_DEBUG
1507 .vidioc_g_register = mcam_vidioc_g_register,
1508 .vidioc_s_register = mcam_vidioc_s_register,
1509 #endif
1512 /* ---------------------------------------------------------------------- */
1514 * Our various file operations.
1516 static int mcam_v4l_open(struct file *filp)
1518 struct mcam_camera *cam = video_drvdata(filp);
1519 int ret = 0;
1521 filp->private_data = cam;
1523 frames = singles = delivered = 0;
1524 mutex_lock(&cam->s_mutex);
1525 if (cam->users == 0) {
1526 ret = mcam_setup_vb2(cam);
1527 if (ret)
1528 goto out;
1529 mcam_ctlr_power_up(cam);
1530 __mcam_cam_reset(cam);
1531 mcam_set_config_needed(cam, 1);
1533 (cam->users)++;
1534 out:
1535 mutex_unlock(&cam->s_mutex);
1536 return ret;
1540 static int mcam_v4l_release(struct file *filp)
1542 struct mcam_camera *cam = filp->private_data;
1544 cam_err(cam, "Release, %d frames, %d singles, %d delivered\n", frames,
1545 singles, delivered);
1546 mutex_lock(&cam->s_mutex);
1547 (cam->users)--;
1548 if (filp == cam->owner) {
1549 mcam_ctlr_stop_dma(cam);
1550 cam->owner = NULL;
1552 if (cam->users == 0) {
1553 mcam_cleanup_vb2(cam);
1554 mcam_ctlr_power_down(cam);
1555 if (cam->buffer_mode == B_vmalloc && alloc_bufs_at_read)
1556 mcam_free_dma_bufs(cam);
1558 mutex_unlock(&cam->s_mutex);
1559 return 0;
1562 static ssize_t mcam_v4l_read(struct file *filp,
1563 char __user *buffer, size_t len, loff_t *pos)
1565 struct mcam_camera *cam = filp->private_data;
1566 int ret;
1568 mutex_lock(&cam->s_mutex);
1569 ret = vb2_read(&cam->vb_queue, buffer, len, pos,
1570 filp->f_flags & O_NONBLOCK);
1571 mutex_unlock(&cam->s_mutex);
1572 return ret;
1577 static unsigned int mcam_v4l_poll(struct file *filp,
1578 struct poll_table_struct *pt)
1580 struct mcam_camera *cam = filp->private_data;
1581 int ret;
1583 mutex_lock(&cam->s_mutex);
1584 ret = vb2_poll(&cam->vb_queue, filp, pt);
1585 mutex_unlock(&cam->s_mutex);
1586 return ret;
1590 static int mcam_v4l_mmap(struct file *filp, struct vm_area_struct *vma)
1592 struct mcam_camera *cam = filp->private_data;
1593 int ret;
1595 mutex_lock(&cam->s_mutex);
1596 ret = vb2_mmap(&cam->vb_queue, vma);
1597 mutex_unlock(&cam->s_mutex);
1598 return ret;
1603 static const struct v4l2_file_operations mcam_v4l_fops = {
1604 .owner = THIS_MODULE,
1605 .open = mcam_v4l_open,
1606 .release = mcam_v4l_release,
1607 .read = mcam_v4l_read,
1608 .poll = mcam_v4l_poll,
1609 .mmap = mcam_v4l_mmap,
1610 .unlocked_ioctl = video_ioctl2,
1615 * This template device holds all of those v4l2 methods; we
1616 * clone it for specific real devices.
1618 static struct video_device mcam_v4l_template = {
1619 .name = "mcam",
1620 .tvnorms = V4L2_STD_NTSC_M,
1621 .current_norm = V4L2_STD_NTSC_M, /* make mplayer happy */
1623 .fops = &mcam_v4l_fops,
1624 .ioctl_ops = &mcam_v4l_ioctl_ops,
1625 .release = video_device_release_empty,
1628 /* ---------------------------------------------------------------------- */
1630 * Interrupt handler stuff
1632 static void mcam_frame_complete(struct mcam_camera *cam, int frame)
1635 * Basic frame housekeeping.
1637 set_bit(frame, &cam->flags);
1638 clear_bit(CF_DMA_ACTIVE, &cam->flags);
1639 cam->next_buf = frame;
1640 cam->buf_seq[frame] = ++(cam->sequence);
1641 frames++;
1643 * "This should never happen"
1645 if (cam->state != S_STREAMING)
1646 return;
1648 * Process the frame and set up the next one.
1650 cam->frame_complete(cam, frame);
1655 * The interrupt handler; this needs to be called from the
1656 * platform irq handler with the lock held.
1658 int mccic_irq(struct mcam_camera *cam, unsigned int irqs)
1660 unsigned int frame, handled = 0;
1662 mcam_reg_write(cam, REG_IRQSTAT, FRAMEIRQS); /* Clear'em all */
1664 * Handle any frame completions. There really should
1665 * not be more than one of these, or we have fallen
1666 * far behind.
1668 * When running in S/G mode, the frame number lacks any
1669 * real meaning - there's only one descriptor array - but
1670 * the controller still picks a different one to signal
1671 * each time.
1673 for (frame = 0; frame < cam->nbufs; frame++)
1674 if (irqs & (IRQ_EOF0 << frame)) {
1675 mcam_frame_complete(cam, frame);
1676 handled = 1;
1679 * If a frame starts, note that we have DMA active. This
1680 * code assumes that we won't get multiple frame interrupts
1681 * at once; may want to rethink that.
1683 if (irqs & (IRQ_SOF0 | IRQ_SOF1 | IRQ_SOF2)) {
1684 set_bit(CF_DMA_ACTIVE, &cam->flags);
1685 handled = 1;
1686 if (cam->buffer_mode == B_DMA_sg)
1687 mcam_ctlr_stop(cam);
1689 return handled;
1692 /* ---------------------------------------------------------------------- */
1694 * Registration and such.
1696 static struct ov7670_config sensor_cfg = {
1698 * Exclude QCIF mode, because it only captures a tiny portion
1699 * of the sensor FOV
1701 .min_width = 320,
1702 .min_height = 240,
1706 int mccic_register(struct mcam_camera *cam)
1708 struct i2c_board_info ov7670_info = {
1709 .type = "ov7670",
1710 .addr = 0x42 >> 1,
1711 .platform_data = &sensor_cfg,
1713 int ret;
1716 * Validate the requested buffer mode.
1718 if (buffer_mode >= 0)
1719 cam->buffer_mode = buffer_mode;
1720 if (cam->buffer_mode == B_DMA_sg &&
1721 cam->chip_id == V4L2_IDENT_CAFE) {
1722 printk(KERN_ERR "marvell-cam: Cafe can't do S/G I/O, "
1723 "attempting vmalloc mode instead\n");
1724 cam->buffer_mode = B_vmalloc;
1726 if (!mcam_buffer_mode_supported(cam->buffer_mode)) {
1727 printk(KERN_ERR "marvell-cam: buffer mode %d unsupported\n",
1728 cam->buffer_mode);
1729 return -EINVAL;
1732 * Register with V4L
1734 ret = v4l2_device_register(cam->dev, &cam->v4l2_dev);
1735 if (ret)
1736 return ret;
1738 mutex_init(&cam->s_mutex);
1739 cam->state = S_NOTREADY;
1740 mcam_set_config_needed(cam, 1);
1741 cam->pix_format = mcam_def_pix_format;
1742 cam->mbus_code = mcam_def_mbus_code;
1743 INIT_LIST_HEAD(&cam->buffers);
1744 mcam_ctlr_init(cam);
1747 * Try to find the sensor.
1749 sensor_cfg.clock_speed = cam->clock_speed;
1750 sensor_cfg.use_smbus = cam->use_smbus;
1751 cam->sensor_addr = ov7670_info.addr;
1752 cam->sensor = v4l2_i2c_new_subdev_board(&cam->v4l2_dev,
1753 cam->i2c_adapter, &ov7670_info, NULL);
1754 if (cam->sensor == NULL) {
1755 ret = -ENODEV;
1756 goto out_unregister;
1759 ret = mcam_cam_init(cam);
1760 if (ret)
1761 goto out_unregister;
1763 * Get the v4l2 setup done.
1765 mutex_lock(&cam->s_mutex);
1766 cam->vdev = mcam_v4l_template;
1767 cam->vdev.debug = 0;
1768 cam->vdev.v4l2_dev = &cam->v4l2_dev;
1769 ret = video_register_device(&cam->vdev, VFL_TYPE_GRABBER, -1);
1770 if (ret)
1771 goto out;
1772 video_set_drvdata(&cam->vdev, cam);
1775 * If so requested, try to get our DMA buffers now.
1777 if (cam->buffer_mode == B_vmalloc && !alloc_bufs_at_read) {
1778 if (mcam_alloc_dma_bufs(cam, 1))
1779 cam_warn(cam, "Unable to alloc DMA buffers at load"
1780 " will try again later.");
1783 out:
1784 mutex_unlock(&cam->s_mutex);
1785 return ret;
1786 out_unregister:
1787 v4l2_device_unregister(&cam->v4l2_dev);
1788 return ret;
1792 void mccic_shutdown(struct mcam_camera *cam)
1795 * If we have no users (and we really, really should have no
1796 * users) the device will already be powered down. Trying to
1797 * take it down again will wedge the machine, which is frowned
1798 * upon.
1800 if (cam->users > 0) {
1801 cam_warn(cam, "Removing a device with users!\n");
1802 mcam_ctlr_power_down(cam);
1804 vb2_queue_release(&cam->vb_queue);
1805 if (cam->buffer_mode == B_vmalloc)
1806 mcam_free_dma_bufs(cam);
1807 video_unregister_device(&cam->vdev);
1808 v4l2_device_unregister(&cam->v4l2_dev);
1812 * Power management
1814 #ifdef CONFIG_PM
1816 void mccic_suspend(struct mcam_camera *cam)
1818 enum mcam_state cstate = cam->state;
1820 mcam_ctlr_stop_dma(cam);
1821 mcam_ctlr_power_down(cam);
1822 cam->state = cstate;
1825 int mccic_resume(struct mcam_camera *cam)
1827 int ret = 0;
1829 mutex_lock(&cam->s_mutex);
1830 if (cam->users > 0) {
1831 mcam_ctlr_power_up(cam);
1832 __mcam_cam_reset(cam);
1833 } else {
1834 mcam_ctlr_power_down(cam);
1836 mutex_unlock(&cam->s_mutex);
1838 set_bit(CF_CONFIG_NEEDED, &cam->flags);
1839 if (cam->state == S_STREAMING)
1840 ret = mcam_read_setup(cam);
1841 return ret;
1843 #endif /* CONFIG_PM */