2 * NVEC: NVIDIA compliant embedded controller interface
4 * Copyright (C) 2011 The AC100 Kernel Team <ac100@lists.lauchpad.net>
6 * Authors: Pierre-Hugues Husson <phhusson@free.fr>
7 * Ilya Petrov <ilya.muromec@gmail.com>
8 * Marc Dietrich <marvin24@gmx.de>
9 * Julian Andres Klode <jak@jak-linux.org>
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/atomic.h>
22 #include <linux/clk.h>
23 #include <linux/completion.h>
24 #include <linux/delay.h>
25 #include <linux/err.h>
26 #include <linux/gpio.h>
27 #include <linux/interrupt.h>
29 #include <linux/irq.h>
30 #include <linux/list.h>
31 #include <linux/mfd/core.h>
32 #include <linux/mutex.h>
33 #include <linux/notifier.h>
34 #include <linux/platform_device.h>
35 #include <linux/slab.h>
36 #include <linux/spinlock.h>
37 #include <linux/workqueue.h>
40 #include <mach/iomap.h>
45 #define I2C_CNFG_PACKET_MODE_EN (1<<10)
46 #define I2C_CNFG_NEW_MASTER_SFM (1<<11)
47 #define I2C_CNFG_DEBOUNCE_CNT_SHIFT 12
49 #define I2C_SL_CNFG 0x20
50 #define I2C_SL_NEWL (1<<2)
51 #define I2C_SL_NACK (1<<1)
52 #define I2C_SL_RESP (1<<0)
53 #define I2C_SL_IRQ (1<<3)
54 #define END_TRANS (1<<4)
58 #define I2C_SL_RCVD 0x24
59 #define I2C_SL_STATUS 0x28
60 #define I2C_SL_ADDR1 0x2c
61 #define I2C_SL_ADDR2 0x30
62 #define I2C_SL_DELAY_COUNT 0x3c
65 * enum nvec_msg_category - Message categories for nvec_msg_alloc()
66 * @NVEC_MSG_RX: The message is an incoming message (from EC)
67 * @NVEC_MSG_TX: The message is an outgoing message (to EC)
69 enum nvec_msg_category
{
74 static const unsigned char EC_DISABLE_EVENT_REPORTING
[3] = "\x04\x00\x00";
75 static const unsigned char EC_ENABLE_EVENT_REPORTING
[3] = "\x04\x00\x01";
76 static const unsigned char EC_GET_FIRMWARE_VERSION
[2] = "\x07\x15";
78 static struct nvec_chip
*nvec_power_handle
;
80 static struct mfd_cell nvec_devices
[] = {
104 * nvec_register_notifier - Register a notifier with nvec
105 * @nvec: A &struct nvec_chip
106 * @nb: The notifier block to register
108 * Registers a notifier with @nvec. The notifier will be added to an atomic
109 * notifier chain that is called for all received messages except those that
110 * correspond to a request initiated by nvec_write_sync().
112 int nvec_register_notifier(struct nvec_chip
*nvec
, struct notifier_block
*nb
,
115 return atomic_notifier_chain_register(&nvec
->notifier_list
, nb
);
117 EXPORT_SYMBOL_GPL(nvec_register_notifier
);
120 * nvec_status_notifier - The final notifier
122 * Prints a message about control events not handled in the notifier
125 static int nvec_status_notifier(struct notifier_block
*nb
,
126 unsigned long event_type
, void *data
)
128 unsigned char *msg
= (unsigned char *)data
;
130 if (event_type
!= NVEC_CNTL
)
133 printk(KERN_WARNING
"unhandled msg type %ld\n", event_type
);
134 print_hex_dump(KERN_WARNING
, "payload: ", DUMP_PREFIX_NONE
, 16, 1,
135 msg
, msg
[1] + 2, true);
142 * @nvec: A &struct nvec_chip
143 * @category: Pool category, see &enum nvec_msg_category
145 * Allocate a single &struct nvec_msg object from the message pool of
146 * @nvec. The result shall be passed to nvec_msg_free() if no longer
149 * Outgoing messages are placed in the upper 75% of the pool, keeping the
150 * lower 25% available for RX buffers only. The reason is to prevent a
151 * situation where all buffers are full and a message is thus endlessly
152 * retried because the response could never be processed.
154 static struct nvec_msg
*nvec_msg_alloc(struct nvec_chip
*nvec
,
155 enum nvec_msg_category category
)
157 int i
= (category
== NVEC_MSG_TX
) ? (NVEC_POOL_SIZE
/ 4) : 0;
159 for (; i
< NVEC_POOL_SIZE
; i
++) {
160 if (atomic_xchg(&nvec
->msg_pool
[i
].used
, 1) == 0) {
161 dev_vdbg(nvec
->dev
, "INFO: Allocate %i\n", i
);
162 return &nvec
->msg_pool
[i
];
166 dev_err(nvec
->dev
, "could not allocate %s buffer\n",
167 (category
== NVEC_MSG_TX
) ? "TX" : "RX");
174 * @nvec: A &struct nvec_chip
175 * @msg: A message (must be allocated by nvec_msg_alloc() and belong to @nvec)
177 * Free the given message
179 inline void nvec_msg_free(struct nvec_chip
*nvec
, struct nvec_msg
*msg
)
181 if (msg
!= &nvec
->tx_scratch
)
182 dev_vdbg(nvec
->dev
, "INFO: Free %ti\n", msg
- nvec
->msg_pool
);
183 atomic_set(&msg
->used
, 0);
185 EXPORT_SYMBOL_GPL(nvec_msg_free
);
188 * nvec_msg_is_event - Return %true if @msg is an event
191 static bool nvec_msg_is_event(struct nvec_msg
*msg
)
193 return msg
->data
[0] >> 7;
197 * nvec_msg_size - Get the size of a message
198 * @msg: The message to get the size for
200 * This only works for received messages, not for outgoing messages.
202 static size_t nvec_msg_size(struct nvec_msg
*msg
)
204 bool is_event
= nvec_msg_is_event(msg
);
205 int event_length
= (msg
->data
[0] & 0x60) >> 5;
207 /* for variable size, payload size in byte 1 + count (1) + cmd (1) */
208 if (!is_event
|| event_length
== NVEC_VAR_SIZE
)
209 return (msg
->pos
|| msg
->size
) ? (msg
->data
[1] + 2) : 0;
210 else if (event_length
== NVEC_2BYTES
)
212 else if (event_length
== NVEC_3BYTES
)
219 * nvec_gpio_set_value - Set the GPIO value
220 * @nvec: A &struct nvec_chip
221 * @value: The value to write (0 or 1)
223 * Like gpio_set_value(), but generating debugging information
225 static void nvec_gpio_set_value(struct nvec_chip
*nvec
, int value
)
227 dev_dbg(nvec
->dev
, "GPIO changed from %u to %u\n",
228 gpio_get_value(nvec
->gpio
), value
);
229 gpio_set_value(nvec
->gpio
, value
);
233 * nvec_write_async - Asynchronously write a message to NVEC
234 * @nvec: An nvec_chip instance
235 * @data: The message data, starting with the request type
236 * @size: The size of @data
238 * Queue a single message to be transferred to the embedded controller
239 * and return immediately.
241 * Returns: 0 on success, a negative error code on failure. If a failure
242 * occured, the nvec driver may print an error.
244 int nvec_write_async(struct nvec_chip
*nvec
, const unsigned char *data
,
247 struct nvec_msg
*msg
;
250 msg
= nvec_msg_alloc(nvec
, NVEC_MSG_TX
);
256 memcpy(msg
->data
+ 1, data
, size
);
257 msg
->size
= size
+ 1;
259 spin_lock_irqsave(&nvec
->tx_lock
, flags
);
260 list_add_tail(&msg
->node
, &nvec
->tx_data
);
261 spin_unlock_irqrestore(&nvec
->tx_lock
, flags
);
263 queue_work(nvec
->wq
, &nvec
->tx_work
);
267 EXPORT_SYMBOL(nvec_write_async
);
270 * nvec_write_sync - Write a message to nvec and read the response
271 * @nvec: An &struct nvec_chip
272 * @data: The data to write
273 * @size: The size of @data
275 * This is similar to nvec_write_async(), but waits for the
276 * request to be answered before returning. This function
277 * uses a mutex and can thus not be called from e.g.
278 * interrupt handlers.
280 * Returns: A pointer to the response message on success,
281 * %NULL on failure. Free with nvec_msg_free() once no longer
284 struct nvec_msg
*nvec_write_sync(struct nvec_chip
*nvec
,
285 const unsigned char *data
, short size
)
287 struct nvec_msg
*msg
;
289 mutex_lock(&nvec
->sync_write_mutex
);
291 nvec
->sync_write_pending
= (data
[1] << 8) + data
[0];
293 if (nvec_write_async(nvec
, data
, size
) < 0)
296 dev_dbg(nvec
->dev
, "nvec_sync_write: 0x%04x\n",
297 nvec
->sync_write_pending
);
298 if (!(wait_for_completion_timeout(&nvec
->sync_write
,
299 msecs_to_jiffies(2000)))) {
300 dev_warn(nvec
->dev
, "timeout waiting for sync write to complete\n");
301 mutex_unlock(&nvec
->sync_write_mutex
);
305 dev_dbg(nvec
->dev
, "nvec_sync_write: pong!\n");
307 msg
= nvec
->last_sync_msg
;
309 mutex_unlock(&nvec
->sync_write_mutex
);
313 EXPORT_SYMBOL(nvec_write_sync
);
316 * nvec_request_master - Process outgoing messages
317 * @work: A &struct work_struct (the tx_worker member of &struct nvec_chip)
319 * Processes all outgoing requests by sending the request and awaiting the
320 * response, then continuing with the next request. Once a request has a
321 * matching response, it will be freed and removed from the list.
323 static void nvec_request_master(struct work_struct
*work
)
325 struct nvec_chip
*nvec
= container_of(work
, struct nvec_chip
, tx_work
);
328 struct nvec_msg
*msg
;
330 spin_lock_irqsave(&nvec
->tx_lock
, flags
);
331 while (!list_empty(&nvec
->tx_data
)) {
332 msg
= list_first_entry(&nvec
->tx_data
, struct nvec_msg
, node
);
333 spin_unlock_irqrestore(&nvec
->tx_lock
, flags
);
334 nvec_gpio_set_value(nvec
, 0);
335 err
= wait_for_completion_interruptible_timeout(
336 &nvec
->ec_transfer
, msecs_to_jiffies(5000));
339 dev_warn(nvec
->dev
, "timeout waiting for ec transfer\n");
340 nvec_gpio_set_value(nvec
, 1);
344 spin_lock_irqsave(&nvec
->tx_lock
, flags
);
347 list_del_init(&msg
->node
);
348 nvec_msg_free(nvec
, msg
);
351 spin_unlock_irqrestore(&nvec
->tx_lock
, flags
);
355 * parse_msg - Print some information and call the notifiers on an RX message
356 * @nvec: A &struct nvec_chip
357 * @msg: A message received by @nvec
359 * Paarse some pieces of the message and then call the chain of notifiers
360 * registered via nvec_register_notifier.
362 static int parse_msg(struct nvec_chip
*nvec
, struct nvec_msg
*msg
)
364 if ((msg
->data
[0] & 1 << 7) == 0 && msg
->data
[3]) {
365 dev_err(nvec
->dev
, "ec responded %02x %02x %02x %02x\n",
366 msg
->data
[0], msg
->data
[1], msg
->data
[2], msg
->data
[3]);
370 if ((msg
->data
[0] >> 7) == 1 && (msg
->data
[0] & 0x0f) == 5)
371 print_hex_dump(KERN_WARNING
, "ec system event ",
372 DUMP_PREFIX_NONE
, 16, 1, msg
->data
,
373 msg
->data
[1] + 2, true);
375 atomic_notifier_call_chain(&nvec
->notifier_list
, msg
->data
[0] & 0x8f,
382 * nvec_dispatch - Process messages received from the EC
383 * @work: A &struct work_struct (the tx_worker member of &struct nvec_chip)
385 * Process messages previously received from the EC and put into the RX
386 * queue of the &struct nvec_chip instance associated with @work.
388 static void nvec_dispatch(struct work_struct
*work
)
390 struct nvec_chip
*nvec
= container_of(work
, struct nvec_chip
, rx_work
);
392 struct nvec_msg
*msg
;
394 spin_lock_irqsave(&nvec
->rx_lock
, flags
);
395 while (!list_empty(&nvec
->rx_data
)) {
396 msg
= list_first_entry(&nvec
->rx_data
, struct nvec_msg
, node
);
397 list_del_init(&msg
->node
);
398 spin_unlock_irqrestore(&nvec
->rx_lock
, flags
);
400 if (nvec
->sync_write_pending
==
401 (msg
->data
[2] << 8) + msg
->data
[0]) {
402 dev_dbg(nvec
->dev
, "sync write completed!\n");
403 nvec
->sync_write_pending
= 0;
404 nvec
->last_sync_msg
= msg
;
405 complete(&nvec
->sync_write
);
407 parse_msg(nvec
, msg
);
408 nvec_msg_free(nvec
, msg
);
410 spin_lock_irqsave(&nvec
->rx_lock
, flags
);
412 spin_unlock_irqrestore(&nvec
->rx_lock
, flags
);
416 * nvec_tx_completed - Complete the current transfer
417 * @nvec: A &struct nvec_chip
419 * This is called when we have received an END_TRANS on a TX transfer.
421 static void nvec_tx_completed(struct nvec_chip
*nvec
)
423 /* We got an END_TRANS, let's skip this, maybe there's an event */
424 if (nvec
->tx
->pos
!= nvec
->tx
->size
) {
425 dev_err(nvec
->dev
, "premature END_TRANS, resending\n");
427 nvec_gpio_set_value(nvec
, 0);
434 * nvec_rx_completed - Complete the current transfer
435 * @nvec: A &struct nvec_chip
437 * This is called when we have received an END_TRANS on a RX transfer.
439 static void nvec_rx_completed(struct nvec_chip
*nvec
)
441 if (nvec
->rx
->pos
!= nvec_msg_size(nvec
->rx
)) {
442 dev_err(nvec
->dev
, "RX incomplete: Expected %u bytes, got %u\n",
443 (uint
) nvec_msg_size(nvec
->rx
),
444 (uint
) nvec
->rx
->pos
);
446 nvec_msg_free(nvec
, nvec
->rx
);
449 /* Battery quirk - Often incomplete, and likes to crash */
450 if (nvec
->rx
->data
[0] == NVEC_BAT
)
451 complete(&nvec
->ec_transfer
);
456 spin_lock(&nvec
->rx_lock
);
458 /* add the received data to the work list
459 and move the ring buffer pointer to the next entry */
460 list_add_tail(&nvec
->rx
->node
, &nvec
->rx_data
);
462 spin_unlock(&nvec
->rx_lock
);
466 if (!nvec_msg_is_event(nvec
->rx
))
467 complete(&nvec
->ec_transfer
);
469 queue_work(nvec
->wq
, &nvec
->rx_work
);
473 * nvec_invalid_flags - Send an error message about invalid flags and jump
474 * @nvec: The nvec device
475 * @status: The status flags
476 * @reset: Whether we shall jump to state 0.
478 static void nvec_invalid_flags(struct nvec_chip
*nvec
, unsigned int status
,
481 dev_err(nvec
->dev
, "unexpected status flags 0x%02x during state %i\n",
482 status
, nvec
->state
);
488 * nvec_tx_set - Set the message to transfer (nvec->tx)
489 * @nvec: A &struct nvec_chip
491 * Gets the first entry from the tx_data list of @nvec and sets the
492 * tx member to it. If the tx_data list is empty, this uses the
493 * tx_scratch message to send a no operation message.
495 static void nvec_tx_set(struct nvec_chip
*nvec
)
497 spin_lock(&nvec
->tx_lock
);
498 if (list_empty(&nvec
->tx_data
)) {
499 dev_err(nvec
->dev
, "empty tx - sending no-op\n");
500 memcpy(nvec
->tx_scratch
.data
, "\x02\x07\x02", 3);
501 nvec
->tx_scratch
.size
= 3;
502 nvec
->tx_scratch
.pos
= 0;
503 nvec
->tx
= &nvec
->tx_scratch
;
504 list_add_tail(&nvec
->tx
->node
, &nvec
->tx_data
);
506 nvec
->tx
= list_first_entry(&nvec
->tx_data
, struct nvec_msg
,
510 spin_unlock(&nvec
->tx_lock
);
512 dev_dbg(nvec
->dev
, "Sending message of length %u, command 0x%x\n",
513 (uint
)nvec
->tx
->size
, nvec
->tx
->data
[1]);
517 * nvec_interrupt - Interrupt handler
519 * @dev: The nvec device
521 * Interrupt handler that fills our RX buffers and empties our TX
522 * buffers. This uses a finite state machine with ridiculous amounts
523 * of error checking, in order to be fairly reliable.
525 static irqreturn_t
nvec_interrupt(int irq
, void *dev
)
527 unsigned long status
;
528 unsigned int received
= 0;
529 unsigned char to_send
= 0xff;
530 const unsigned long irq_mask
= I2C_SL_IRQ
| END_TRANS
| RCVD
| RNW
;
531 struct nvec_chip
*nvec
= dev
;
532 unsigned int state
= nvec
->state
;
534 status
= readl(nvec
->base
+ I2C_SL_STATUS
);
536 /* Filter out some errors */
537 if ((status
& irq_mask
) == 0 && (status
& ~irq_mask
) != 0) {
538 dev_err(nvec
->dev
, "unexpected irq mask %lx\n", status
);
541 if ((status
& I2C_SL_IRQ
) == 0) {
542 dev_err(nvec
->dev
, "Spurious IRQ\n");
546 /* The EC did not request a read, so it send us something, read it */
547 if ((status
& RNW
) == 0) {
548 received
= readl(nvec
->base
+ I2C_SL_RCVD
);
550 writel(0, nvec
->base
+ I2C_SL_RCVD
);
553 if (status
== (I2C_SL_IRQ
| RCVD
))
556 switch (nvec
->state
) {
557 case 0: /* Verify that its a transfer start, the rest later */
558 if (status
!= (I2C_SL_IRQ
| RCVD
))
559 nvec_invalid_flags(nvec
, status
, false);
561 case 1: /* command byte */
562 if (status
!= I2C_SL_IRQ
) {
563 nvec_invalid_flags(nvec
, status
, true);
565 nvec
->rx
= nvec_msg_alloc(nvec
, NVEC_MSG_RX
);
566 /* Should not happen in a normal world */
567 if (unlikely(nvec
->rx
== NULL
)) {
571 nvec
->rx
->data
[0] = received
;
576 case 2: /* first byte after command */
577 if (status
== (I2C_SL_IRQ
| RNW
| RCVD
)) {
579 if (nvec
->rx
->data
[0] != 0x01) {
581 "Read without prior read command\n");
585 nvec_msg_free(nvec
, nvec
->rx
);
588 BUG_ON(nvec
->tx
->size
< 1);
589 to_send
= nvec
->tx
->data
[0];
591 } else if (status
== (I2C_SL_IRQ
)) {
592 BUG_ON(nvec
->rx
== NULL
);
593 nvec
->rx
->data
[1] = received
;
597 nvec_invalid_flags(nvec
, status
, true);
600 case 3: /* EC does a block read, we transmit data */
601 if (status
& END_TRANS
) {
602 nvec_tx_completed(nvec
);
603 } else if ((status
& RNW
) == 0 || (status
& RCVD
)) {
604 nvec_invalid_flags(nvec
, status
, true);
605 } else if (nvec
->tx
&& nvec
->tx
->pos
< nvec
->tx
->size
) {
606 to_send
= nvec
->tx
->data
[nvec
->tx
->pos
++];
608 dev_err(nvec
->dev
, "tx buffer underflow on %p (%u > %u)\n",
610 (uint
) (nvec
->tx
? nvec
->tx
->pos
: 0),
611 (uint
) (nvec
->tx
? nvec
->tx
->size
: 0));
615 case 4: /* EC does some write, we read the data */
616 if ((status
& (END_TRANS
| RNW
)) == END_TRANS
)
617 nvec_rx_completed(nvec
);
618 else if (status
& (RNW
| RCVD
))
619 nvec_invalid_flags(nvec
, status
, true);
620 else if (nvec
->rx
&& nvec
->rx
->pos
< NVEC_MSG_SIZE
)
621 nvec
->rx
->data
[nvec
->rx
->pos
++] = received
;
624 "RX buffer overflow on %p: "
625 "Trying to write byte %u of %u\n",
626 nvec
->rx
, nvec
->rx
->pos
, NVEC_MSG_SIZE
);
632 /* If we are told that a new transfer starts, verify it */
633 if ((status
& (RCVD
| RNW
)) == RCVD
) {
634 if (received
!= nvec
->i2c_addr
)
636 "received address 0x%02x, expected 0x%02x\n",
637 received
, nvec
->i2c_addr
);
641 /* Send data if requested, but not on end of transmission */
642 if ((status
& (RNW
| END_TRANS
)) == RNW
)
643 writel(to_send
, nvec
->base
+ I2C_SL_RCVD
);
645 /* If we have send the first byte */
646 if (status
== (I2C_SL_IRQ
| RNW
| RCVD
))
647 nvec_gpio_set_value(nvec
, 1);
650 "Handled: %s 0x%02x, %s 0x%02x in state %u [%s%s%s]\n",
651 (status
& RNW
) == 0 ? "received" : "R=",
653 (status
& (RNW
| END_TRANS
)) ? "sent" : "S=",
656 status
& END_TRANS
? " END_TRANS" : "",
657 status
& RCVD
? " RCVD" : "",
658 status
& RNW
? " RNW" : "");
662 * TODO: A correct fix needs to be found for this.
664 * We experience less incomplete messages with this delay than without
665 * it, but we don't know why. Help is appreciated.
672 static void tegra_init_i2c_slave(struct nvec_chip
*nvec
)
676 clk_enable(nvec
->i2c_clk
);
678 tegra_periph_reset_assert(nvec
->i2c_clk
);
680 tegra_periph_reset_deassert(nvec
->i2c_clk
);
682 val
= I2C_CNFG_NEW_MASTER_SFM
| I2C_CNFG_PACKET_MODE_EN
|
683 (0x2 << I2C_CNFG_DEBOUNCE_CNT_SHIFT
);
684 writel(val
, nvec
->base
+ I2C_CNFG
);
686 clk_set_rate(nvec
->i2c_clk
, 8 * 80000);
688 writel(I2C_SL_NEWL
, nvec
->base
+ I2C_SL_CNFG
);
689 writel(0x1E, nvec
->base
+ I2C_SL_DELAY_COUNT
);
691 writel(nvec
->i2c_addr
>>1, nvec
->base
+ I2C_SL_ADDR1
);
692 writel(0, nvec
->base
+ I2C_SL_ADDR2
);
694 enable_irq(nvec
->irq
);
696 clk_disable(nvec
->i2c_clk
);
699 static void nvec_disable_i2c_slave(struct nvec_chip
*nvec
)
701 disable_irq(nvec
->irq
);
702 writel(I2C_SL_NEWL
| I2C_SL_NACK
, nvec
->base
+ I2C_SL_CNFG
);
703 clk_disable(nvec
->i2c_clk
);
706 static void nvec_power_off(void)
708 nvec_write_async(nvec_power_handle
, EC_DISABLE_EVENT_REPORTING
, 3);
709 nvec_write_async(nvec_power_handle
, "\x04\x01", 2);
712 static int __devinit
tegra_nvec_probe(struct platform_device
*pdev
)
716 struct nvec_platform_data
*pdata
= pdev
->dev
.platform_data
;
717 struct nvec_chip
*nvec
;
718 struct nvec_msg
*msg
;
719 struct resource
*res
;
720 struct resource
*iomem
;
723 nvec
= kzalloc(sizeof(struct nvec_chip
), GFP_KERNEL
);
725 dev_err(&pdev
->dev
, "failed to reserve memory\n");
728 platform_set_drvdata(pdev
, nvec
);
729 nvec
->dev
= &pdev
->dev
;
730 nvec
->gpio
= pdata
->gpio
;
731 nvec
->i2c_addr
= pdata
->i2c_addr
;
733 res
= platform_get_resource(pdev
, IORESOURCE_MEM
, 0);
735 dev_err(&pdev
->dev
, "no mem resource?\n");
739 iomem
= request_mem_region(res
->start
, resource_size(res
), pdev
->name
);
741 dev_err(&pdev
->dev
, "I2C region already claimed\n");
745 base
= ioremap(iomem
->start
, resource_size(iomem
));
747 dev_err(&pdev
->dev
, "Can't ioremap I2C region\n");
751 res
= platform_get_resource(pdev
, IORESOURCE_IRQ
, 0);
753 dev_err(&pdev
->dev
, "no irq resource?\n");
758 i2c_clk
= clk_get_sys("tegra-i2c.2", NULL
);
759 if (IS_ERR(i2c_clk
)) {
760 dev_err(nvec
->dev
, "failed to get controller clock\n");
765 nvec
->irq
= res
->start
;
766 nvec
->i2c_clk
= i2c_clk
;
767 nvec
->rx
= &nvec
->msg_pool
[0];
769 /* Set the gpio to low when we've got something to say */
770 err
= gpio_request(nvec
->gpio
, "nvec gpio");
772 dev_err(nvec
->dev
, "couldn't request gpio\n");
774 ATOMIC_INIT_NOTIFIER_HEAD(&nvec
->notifier_list
);
776 init_completion(&nvec
->sync_write
);
777 init_completion(&nvec
->ec_transfer
);
778 mutex_init(&nvec
->sync_write_mutex
);
779 spin_lock_init(&nvec
->tx_lock
);
780 spin_lock_init(&nvec
->rx_lock
);
781 INIT_LIST_HEAD(&nvec
->rx_data
);
782 INIT_LIST_HEAD(&nvec
->tx_data
);
783 INIT_WORK(&nvec
->rx_work
, nvec_dispatch
);
784 INIT_WORK(&nvec
->tx_work
, nvec_request_master
);
785 nvec
->wq
= alloc_workqueue("nvec", WQ_NON_REENTRANT
, 2);
787 err
= request_irq(nvec
->irq
, nvec_interrupt
, 0, "nvec", nvec
);
789 dev_err(nvec
->dev
, "couldn't request irq\n");
792 disable_irq(nvec
->irq
);
794 tegra_init_i2c_slave(nvec
);
798 gpio_direction_output(nvec
->gpio
, 1);
799 gpio_set_value(nvec
->gpio
, 1);
801 /* enable event reporting */
802 nvec_write_async(nvec
, EC_ENABLE_EVENT_REPORTING
,
803 sizeof(EC_ENABLE_EVENT_REPORTING
));
805 nvec
->nvec_status_notifier
.notifier_call
= nvec_status_notifier
;
806 nvec_register_notifier(nvec
, &nvec
->nvec_status_notifier
, 0);
808 nvec_power_handle
= nvec
;
809 pm_power_off
= nvec_power_off
;
811 /* Get Firmware Version */
812 msg
= nvec_write_sync(nvec
, EC_GET_FIRMWARE_VERSION
,
813 sizeof(EC_GET_FIRMWARE_VERSION
));
816 dev_warn(nvec
->dev
, "ec firmware version %02x.%02x.%02x / %02x\n",
817 msg
->data
[4], msg
->data
[5], msg
->data
[6], msg
->data
[7]);
819 nvec_msg_free(nvec
, msg
);
822 ret
= mfd_add_devices(nvec
->dev
, -1, nvec_devices
,
823 ARRAY_SIZE(nvec_devices
), base
, 0);
825 dev_err(nvec
->dev
, "error adding subdevices\n");
827 /* unmute speakers? */
828 nvec_write_async(nvec
, "\x0d\x10\x59\x95", 4);
830 /* enable lid switch event */
831 nvec_write_async(nvec
, "\x01\x01\x01\x00\x00\x02\x00", 7);
833 /* enable power button event */
834 nvec_write_async(nvec
, "\x01\x01\x01\x00\x00\x80\x00", 7);
845 static int __devexit
tegra_nvec_remove(struct platform_device
*pdev
)
847 struct nvec_chip
*nvec
= platform_get_drvdata(pdev
);
849 nvec_write_async(nvec
, EC_DISABLE_EVENT_REPORTING
, 3);
850 mfd_remove_devices(nvec
->dev
);
851 free_irq(nvec
->irq
, &nvec_interrupt
);
853 gpio_free(nvec
->gpio
);
854 destroy_workqueue(nvec
->wq
);
862 static int tegra_nvec_suspend(struct platform_device
*pdev
, pm_message_t state
)
864 struct nvec_chip
*nvec
= platform_get_drvdata(pdev
);
865 struct nvec_msg
*msg
;
867 dev_dbg(nvec
->dev
, "suspending\n");
869 /* keep these sync or you'll break suspend */
870 msg
= nvec_write_sync(nvec
, EC_DISABLE_EVENT_REPORTING
, 3);
871 nvec_msg_free(nvec
, msg
);
872 msg
= nvec_write_sync(nvec
, "\x04\x02", 2);
873 nvec_msg_free(nvec
, msg
);
875 nvec_disable_i2c_slave(nvec
);
880 static int tegra_nvec_resume(struct platform_device
*pdev
)
882 struct nvec_chip
*nvec
= platform_get_drvdata(pdev
);
884 dev_dbg(nvec
->dev
, "resuming\n");
885 tegra_init_i2c_slave(nvec
);
886 nvec_write_async(nvec
, EC_ENABLE_EVENT_REPORTING
, 3);
892 #define tegra_nvec_suspend NULL
893 #define tegra_nvec_resume NULL
896 static struct platform_driver nvec_device_driver
= {
897 .probe
= tegra_nvec_probe
,
898 .remove
= __devexit_p(tegra_nvec_remove
),
899 .suspend
= tegra_nvec_suspend
,
900 .resume
= tegra_nvec_resume
,
903 .owner
= THIS_MODULE
,
907 static int __init
tegra_nvec_init(void)
909 return platform_driver_register(&nvec_device_driver
);
912 module_init(tegra_nvec_init
);
914 MODULE_ALIAS("platform:nvec");
915 MODULE_DESCRIPTION("NVIDIA compliant embedded controller interface");
916 MODULE_AUTHOR("Marc Dietrich <marvin24@gmx.de>");
917 MODULE_LICENSE("GPL");