Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
[linux-btrfs-devel.git] / drivers / staging / rtl8192e / rtl819x_Qos.h
blob5ecd556f079776fa87a10c628c4fc59931aeee71
1 /******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
4 * This program is distributed in the hope that it will be useful, but WITHOUT
5 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
6 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
7 * more details.
9 * You should have received a copy of the GNU General Public License along with
10 * this program; if not, write to the Free Software Foundation, Inc.,
11 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
13 * The full GNU General Public License is included in this distribution in the
14 * file called LICENSE.
16 * Contact Information:
17 * wlanfae <wlanfae@realtek.com>
18 ******************************************************************************/
19 #ifndef __INC_QOS_TYPE_H
20 #define __INC_QOS_TYPE_H
22 #include "rtllib_endianfree.h"
24 #define BIT0 0x00000001
25 #define BIT1 0x00000002
26 #define BIT2 0x00000004
27 #define BIT3 0x00000008
28 #define BIT4 0x00000010
29 #define BIT5 0x00000020
30 #define BIT6 0x00000040
31 #define BIT7 0x00000080
32 #define BIT8 0x00000100
33 #define BIT9 0x00000200
34 #define BIT10 0x00000400
35 #define BIT11 0x00000800
36 #define BIT12 0x00001000
37 #define BIT13 0x00002000
38 #define BIT14 0x00004000
39 #define BIT15 0x00008000
40 #define BIT16 0x00010000
41 #define BIT17 0x00020000
42 #define BIT18 0x00040000
43 #define BIT19 0x00080000
44 #define BIT20 0x00100000
45 #define BIT21 0x00200000
46 #define BIT22 0x00400000
47 #define BIT23 0x00800000
48 #define BIT24 0x01000000
49 #define BIT25 0x02000000
50 #define BIT26 0x04000000
51 #define BIT27 0x08000000
52 #define BIT28 0x10000000
53 #define BIT29 0x20000000
54 #define BIT30 0x40000000
55 #define BIT31 0x80000000
57 union qos_tsinfo {
58 u8 charData[3];
59 struct {
60 u8 ucTrafficType:1;
61 u8 ucTSID:4;
62 u8 ucDirection:2;
63 u8 ucAccessPolicy:2;
64 u8 ucAggregation:1;
65 u8 ucPSB:1;
66 u8 ucUP:3;
67 u8 ucTSInfoAckPolicy:2;
68 u8 ucSchedule:1;
69 u8 ucReserved:7;
70 } field;
73 union tspec_body {
74 u8 charData[55];
76 struct {
77 union qos_tsinfo TSInfo;
78 u16 NominalMSDUsize;
79 u16 MaxMSDUsize;
80 u32 MinServiceItv;
81 u32 MaxServiceItv;
82 u32 InactivityItv;
83 u32 SuspenItv;
84 u32 ServiceStartTime;
85 u32 MinDataRate;
86 u32 MeanDataRate;
87 u32 PeakDataRate;
88 u32 MaxBurstSize;
89 u32 DelayBound;
90 u32 MinPhyRate;
91 u16 SurplusBandwidthAllowance;
92 u16 MediumTime;
93 } f;
96 struct wmm_tspec {
97 u8 ID;
98 u8 Length;
99 u8 OUI[3];
100 u8 OUI_Type;
101 u8 OUI_SubType;
102 u8 Version;
103 union tspec_body Body;
106 struct octet_string {
107 u8 *Octet;
108 u16 Length;
111 #define MAX_WMMELE_LENGTH 64
113 #define QOS_MODE u32
115 #define QOS_DISABLE 0
116 #define QOS_WMM 1
117 #define QOS_WMMSA 2
118 #define QOS_EDCA 4
119 #define QOS_HCCA 8
120 #define QOS_WMM_UAPSD 16
122 #define WMM_PARAM_ELE_BODY_LEN 18
124 #define MAX_STA_TS_COUNT 16
125 #define MAX_AP_TS_COUNT 32
126 #define QOS_TSTREAM_KEY_SIZE 13
128 #define WMM_ACTION_CATEGORY_CODE 17
129 #define WMM_PARAM_ELE_BODY_LEN 18
131 #define MAX_TSPEC_TSID 15
132 #define SESSION_REJECT_TSID 0xfe
133 #define DEFAULT_TSID 0xff
135 #define ADDTS_TIME_SLOT 100
137 #define ACM_TIMEOUT 1000
138 #define SESSION_REJECT_TIMEOUT 60000
140 enum ack_policy {
141 eAckPlc0_ACK = 0x00,
142 eAckPlc1_NoACK = 0x01,
146 #define SET_WMM_QOS_INFO_FIELD(_pStart, _val) \
147 WriteEF1Byte(_pStart, _val)
149 #define GET_WMM_QOS_INFO_FIELD_PARAMETERSET_COUNT(_pStart) \
150 LE_BITS_TO_1BYTE(_pStart, 0, 4)
151 #define SET_WMM_QOS_INFO_FIELD_PARAMETERSET_COUNT(_pStart, _val) \
152 SET_BITS_TO_LE_1BYTE(_pStart, 0, 4, _val)
154 #define GET_WMM_QOS_INFO_FIELD_AP_UAPSD(_pStart) \
155 LE_BITS_TO_1BYTE(_pStart, 7, 1)
156 #define SET_WMM_QOS_INFO_FIELD_AP_UAPSD(_pStart, _val) \
157 SET_BITS_TO_LE_1BYTE(_pStart, 7, 1, _val)
159 #define GET_WMM_QOS_INFO_FIELD_STA_AC_VO_UAPSD(_pStart) \
160 LE_BITS_TO_1BYTE(_pStart, 0, 1)
161 #define SET_WMM_QOS_INFO_FIELD_STA_AC_VO_UAPSD(_pStart, _val) \
162 SET_BITS_TO_LE_1BYTE(_pStart, 0, 1, _val)
164 #define GET_WMM_QOS_INFO_FIELD_STA_AC_VI_UAPSD(_pStart) \
165 LE_BITS_TO_1BYTE(_pStart, 1, 1)
166 #define SET_WMM_QOS_INFO_FIELD_STA_AC_VI_UAPSD(_pStart, _val) \
167 SET_BITS_TO_LE_1BYTE(_pStart, 1, 1, _val)
169 #define GET_WMM_QOS_INFO_FIELD_STA_AC_BE_UAPSD(_pStart) \
170 LE_BITS_TO_1BYTE(_pStart, 2, 1)
171 #define SET_WMM_QOS_INFO_FIELD_STA_AC_BE_UAPSD(_pStart, _val) \
172 SET_BITS_TO_LE_1BYTE(_pStart, 2, 1, _val)
174 #define GET_WMM_QOS_INFO_FIELD_STA_AC_BK_UAPSD(_pStart) \
175 LE_BITS_TO_1BYTE(_pStart, 3, 1)
176 #define SET_WMM_QOS_INFO_FIELD_STA_AC_BK_UAPSD(_pStart, _val) \
177 SET_BITS_TO_LE_1BYTE(_pStart, 3, 1, _val)
179 #define GET_WMM_QOS_INFO_FIELD_STA_MAX_SP_LEN(_pStart) \
180 LE_BITS_TO_1BYTE(_pStart, 5, 2)
181 #define SET_WMM_QOS_INFO_FIELD_STA_MAX_SP_LEN(_pStart, _val) \
182 SET_BITS_TO_LE_1BYTE(_pStart, 5, 2, _val)
184 enum qos_ie_source {
185 QOSIE_SRC_ADDTSREQ,
186 QOSIE_SRC_ADDTSRSP,
187 QOSIE_SRC_REASOCREQ,
188 QOSIE_SRC_REASOCRSP,
189 QOSIE_SRC_DELTS,
193 #define AC_CODING u32
195 #define AC0_BE 0
196 #define AC1_BK 1
197 #define AC2_VI 2
198 #define AC3_VO 3
199 #define AC_MAX 4
202 #define AC_PARAM_SIZE 4
204 #define GET_WMM_AC_PARAM_AIFSN(_pStart) \
205 ((u8)LE_BITS_TO_4BYTE(_pStart, 0, 4))
206 #define SET_WMM_AC_PARAM_AIFSN(_pStart, _val) \
207 SET_BITS_TO_LE_4BYTE(_pStart, 0, 4, _val)
209 #define GET_WMM_AC_PARAM_ACM(_pStart) \
210 ((u8)LE_BITS_TO_4BYTE(_pStart, 4, 1))
211 #define SET_WMM_AC_PARAM_ACM(_pStart, _val) \
212 SET_BITS_TO_LE_4BYTE(_pStart, 4, 1, _val)
214 #define GET_WMM_AC_PARAM_ACI(_pStart) \
215 ((u8)LE_BITS_TO_4BYTE(_pStart, 5, 2))
216 #define SET_WMM_AC_PARAM_ACI(_pStart, _val) \
217 SET_BITS_TO_LE_4BYTE(_pStart, 5, 2, _val)
219 #define GET_WMM_AC_PARAM_ACI_AIFSN(_pStart) \
220 ((u8)LE_BITS_TO_4BYTE(_pStart, 0, 8))
221 #define SET_WMM_AC_PARAM_ACI_AIFSN(_pStart, _val) \
222 SET_BITS_TO_LE_4BYTE(_pStart, 0, 8, _val)
224 #define GET_WMM_AC_PARAM_ECWMIN(_pStart) \
225 ((u8)LE_BITS_TO_4BYTE(_pStart, 8, 4))
226 #define SET_WMM_AC_PARAM_ECWMIN(_pStart, _val) \
227 SET_BITS_TO_LE_4BYTE(_pStart, 8, 4, _val)
229 #define GET_WMM_AC_PARAM_ECWMAX(_pStart) \
230 ((u8)LE_BITS_TO_4BYTE(_pStart, 12, 4))
231 #define SET_WMM_AC_PARAM_ECWMAX(_pStart, _val) \
232 SET_BITS_TO_LE_4BYTE(_pStart, 12, 4, _val)
234 #define GET_WMM_AC_PARAM_TXOP_LIMIT(_pStart) \
235 ((u8)LE_BITS_TO_4BYTE(_pStart, 16, 16))
236 #define SET_WMM_AC_PARAM_TXOP_LIMIT(_pStart, _val) \
237 SET_BITS_TO_LE_4BYTE(_pStart, 16, 16, _val)
241 #define WMM_PARAM_ELEMENT_SIZE (8+(4*AC_PARAM_SIZE))
243 enum qos_ele_subtype {
244 QOSELE_TYPE_INFO = 0x00,
245 QOSELE_TYPE_PARAM = 0x01,
249 enum direction_value {
250 DIR_UP = 0,
251 DIR_DOWN = 1,
252 DIR_DIRECT = 2,
253 DIR_BI_DIR = 3,
256 enum acm_method {
257 eAcmWay0_SwAndHw = 0,
258 eAcmWay1_HW = 1,
259 eAcmWay2_SW = 2,
263 struct acm {
264 u64 UsedTime;
265 u64 MediumTime;
266 u8 HwAcmCtl;
271 #define AC_UAPSD u8
273 #define GET_VO_UAPSD(_apsd) ((_apsd) & BIT0)
274 #define SET_VO_UAPSD(_apsd) ((_apsd) |= BIT0)
276 #define GET_VI_UAPSD(_apsd) ((_apsd) & BIT1)
277 #define SET_VI_UAPSD(_apsd) ((_apsd) |= BIT1)
279 #define GET_BK_UAPSD(_apsd) ((_apsd) & BIT2)
280 #define SET_BK_UAPSD(_apsd) ((_apsd) |= BIT2)
282 #define GET_BE_UAPSD(_apsd) ((_apsd) & BIT3)
283 #define SET_BE_UAPSD(_apsd) ((_apsd) |= BIT3)
285 union qos_tclas {
287 struct _TYPE_GENERAL {
288 u8 Priority;
289 u8 ClassifierType;
290 u8 Mask;
291 } TYPE_GENERAL;
293 struct _TYPE0_ETH {
294 u8 Priority;
295 u8 ClassifierType;
296 u8 Mask;
297 u8 SrcAddr[6];
298 u8 DstAddr[6];
299 u16 Type;
300 } TYPE0_ETH;
302 struct _TYPE1_IPV4 {
303 u8 Priority;
304 u8 ClassifierType;
305 u8 Mask;
306 u8 Version;
307 u8 SrcIP[4];
308 u8 DstIP[4];
309 u16 SrcPort;
310 u16 DstPort;
311 u8 DSCP;
312 u8 Protocol;
313 u8 Reserved;
314 } TYPE1_IPV4;
316 struct _TYPE1_IPV6 {
317 u8 Priority;
318 u8 ClassifierType;
319 u8 Mask;
320 u8 Version;
321 u8 SrcIP[16];
322 u8 DstIP[16];
323 u16 SrcPort;
324 u16 DstPort;
325 u8 FlowLabel[3];
326 } TYPE1_IPV6;
328 struct _TYPE2_8021Q {
329 u8 Priority;
330 u8 ClassifierType;
331 u8 Mask;
332 u16 TagType;
333 } TYPE2_8021Q;
336 struct qos_tstream {
338 bool bUsed;
339 u16 MsduLifetime;
340 bool bEstablishing;
341 u8 TimeSlotCount;
342 u8 DialogToken;
343 struct wmm_tspec TSpec;
344 struct wmm_tspec OutStandingTSpec;
345 u8 NominalPhyRate;
348 struct sta_qos {
349 u8 WMMIEBuf[MAX_WMMELE_LENGTH];
350 u8 *WMMIE;
352 QOS_MODE QosCapability;
353 QOS_MODE CurrentQosMode;
355 AC_UAPSD b4ac_Uapsd;
356 AC_UAPSD Curr4acUapsd;
357 u8 bInServicePeriod;
358 u8 MaxSPLength;
359 int NumBcnBeforeTrigger;
361 u8 *pWMMInfoEle;
362 u8 WMMParamEle[WMM_PARAM_ELEMENT_SIZE];
364 struct acm acm[4];
365 enum acm_method AcmMethod;
367 struct qos_tstream StaTsArray[MAX_STA_TS_COUNT];
368 u8 DialogToken;
369 struct wmm_tspec TSpec;
371 u8 QBssWirelessMode;
373 bool bNoAck;
375 bool bEnableRxImmBA;
379 #define QBSS_LOAD_SIZE 5
380 #define GET_QBSS_LOAD_STA_COUNT(__pStart) \
381 ReadEF2Byte(__pStart)
382 #define SET_QBSS_LOAD_STA_COUNT(__pStart, __Value) \
383 WriteEF2Byte(__pStart, __Value)
384 #define GET_QBSS_LOAD_CHNL_UTILIZATION(__pStart) \
385 ReadEF1Byte((u8 *)(__pStart) + 2)
386 #define SET_QBSS_LOAD_CHNL_UTILIZATION(__pStart, __Value) \
387 WriteEF1Byte((u8 *)(__pStart) + 2, __Value)
388 #define GET_QBSS_LOAD_AVAILABLE_CAPACITY(__pStart) \
389 ReadEF2Byte((u8 *)(__pStart) + 3)
390 #define SET_QBSS_LOAD_AVAILABLE_CAPACITY(__pStart, __Value) \
391 WriteEF2Byte((u8 *)(__pStart) + 3, __Value)
393 struct bss_qos {
394 QOS_MODE bdQoSMode;
395 u8 bdWMMIEBuf[MAX_WMMELE_LENGTH];
396 struct octet_string bdWMMIE;
398 enum qos_ele_subtype EleSubType;
400 u8 *pWMMInfoEle;
401 u8 *pWMMParamEle;
403 u8 QBssLoad[QBSS_LOAD_SIZE];
404 bool bQBssLoadValid;
407 #define sQoSCtlLng 2
408 #define QOS_CTRL_LEN(_QosMode) ((_QosMode > QOS_DISABLE) ? sQoSCtlLng : 0)
411 #define IsACValid(ac) ((ac >= 0 && ac <= 7) ? true : false)
414 union aci_aifsn {
415 u8 charData;
417 struct {
418 u8 AIFSN:4;
419 u8 acm:1;
420 u8 ACI:2;
421 u8 Reserved:1;
422 } f;
425 union ecw {
426 u8 charData;
427 struct {
428 u8 ECWmin:4;
429 u8 ECWmax:4;
430 } f;
433 union ac_param {
434 u32 longData;
435 u8 charData[4];
437 struct {
438 union aci_aifsn AciAifsn;
439 union ecw Ecw;
440 u16 TXOPLimit;
441 } f;
444 #endif