Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/upstream-linus
[linux-btrfs-devel.git] / drivers / mtd / nand / sharpsl.c
blob19e24ed089ea9dd05d1bc9b4ea25dc406d5ede90
1 /*
2 * drivers/mtd/nand/sharpsl.c
4 * Copyright (C) 2004 Richard Purdie
5 * Copyright (C) 2008 Dmitry Baryshkov
7 * Based on Sharp's NAND driver sharp_sl.c
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
15 #include <linux/genhd.h>
16 #include <linux/slab.h>
17 #include <linux/module.h>
18 #include <linux/delay.h>
19 #include <linux/mtd/mtd.h>
20 #include <linux/mtd/nand.h>
21 #include <linux/mtd/nand_ecc.h>
22 #include <linux/mtd/partitions.h>
23 #include <linux/mtd/sharpsl.h>
24 #include <linux/interrupt.h>
25 #include <linux/platform_device.h>
27 #include <asm/io.h>
28 #include <mach/hardware.h>
29 #include <asm/mach-types.h>
31 struct sharpsl_nand {
32 struct mtd_info mtd;
33 struct nand_chip chip;
35 void __iomem *io;
38 #define mtd_to_sharpsl(_mtd) container_of(_mtd, struct sharpsl_nand, mtd)
40 /* register offset */
41 #define ECCLPLB 0x00 /* line parity 7 - 0 bit */
42 #define ECCLPUB 0x04 /* line parity 15 - 8 bit */
43 #define ECCCP 0x08 /* column parity 5 - 0 bit */
44 #define ECCCNTR 0x0C /* ECC byte counter */
45 #define ECCCLRR 0x10 /* cleare ECC */
46 #define FLASHIO 0x14 /* Flash I/O */
47 #define FLASHCTL 0x18 /* Flash Control */
49 /* Flash control bit */
50 #define FLRYBY (1 << 5)
51 #define FLCE1 (1 << 4)
52 #define FLWP (1 << 3)
53 #define FLALE (1 << 2)
54 #define FLCLE (1 << 1)
55 #define FLCE0 (1 << 0)
58 * hardware specific access to control-lines
59 * ctrl:
60 * NAND_CNE: bit 0 -> ! bit 0 & 4
61 * NAND_CLE: bit 1 -> bit 1
62 * NAND_ALE: bit 2 -> bit 2
65 static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd,
66 unsigned int ctrl)
68 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
69 struct nand_chip *chip = mtd->priv;
71 if (ctrl & NAND_CTRL_CHANGE) {
72 unsigned char bits = ctrl & 0x07;
74 bits |= (ctrl & 0x01) << 4;
76 bits ^= 0x11;
78 writeb((readb(sharpsl->io + FLASHCTL) & ~0x17) | bits, sharpsl->io + FLASHCTL);
81 if (cmd != NAND_CMD_NONE)
82 writeb(cmd, chip->IO_ADDR_W);
85 static int sharpsl_nand_dev_ready(struct mtd_info *mtd)
87 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
88 return !((readb(sharpsl->io + FLASHCTL) & FLRYBY) == 0);
91 static void sharpsl_nand_enable_hwecc(struct mtd_info *mtd, int mode)
93 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
94 writeb(0, sharpsl->io + ECCCLRR);
97 static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, u_char * ecc_code)
99 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
100 ecc_code[0] = ~readb(sharpsl->io + ECCLPUB);
101 ecc_code[1] = ~readb(sharpsl->io + ECCLPLB);
102 ecc_code[2] = (~readb(sharpsl->io + ECCCP) << 2) | 0x03;
103 return readb(sharpsl->io + ECCCNTR) != 0;
106 static const char *part_probes[] = { "cmdlinepart", NULL };
109 * Main initialization routine
111 static int __devinit sharpsl_nand_probe(struct platform_device *pdev)
113 struct nand_chip *this;
114 struct mtd_partition *sharpsl_partition_info;
115 int nr_partitions;
116 struct resource *r;
117 int err = 0;
118 struct sharpsl_nand *sharpsl;
119 struct sharpsl_nand_platform_data *data = pdev->dev.platform_data;
121 if (!data) {
122 dev_err(&pdev->dev, "no platform data!\n");
123 return -EINVAL;
126 /* Allocate memory for MTD device structure and private data */
127 sharpsl = kzalloc(sizeof(struct sharpsl_nand), GFP_KERNEL);
128 if (!sharpsl) {
129 printk("Unable to allocate SharpSL NAND MTD device structure.\n");
130 return -ENOMEM;
133 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
134 if (!r) {
135 dev_err(&pdev->dev, "no io memory resource defined!\n");
136 err = -ENODEV;
137 goto err_get_res;
140 /* map physical address */
141 sharpsl->io = ioremap(r->start, resource_size(r));
142 if (!sharpsl->io) {
143 printk("ioremap to access Sharp SL NAND chip failed\n");
144 err = -EIO;
145 goto err_ioremap;
148 /* Get pointer to private data */
149 this = (struct nand_chip *)(&sharpsl->chip);
151 /* Link the private data with the MTD structure */
152 sharpsl->mtd.priv = this;
153 sharpsl->mtd.owner = THIS_MODULE;
155 platform_set_drvdata(pdev, sharpsl);
158 * PXA initialize
160 writeb(readb(sharpsl->io + FLASHCTL) | FLWP, sharpsl->io + FLASHCTL);
162 /* Set address of NAND IO lines */
163 this->IO_ADDR_R = sharpsl->io + FLASHIO;
164 this->IO_ADDR_W = sharpsl->io + FLASHIO;
165 /* Set address of hardware control function */
166 this->cmd_ctrl = sharpsl_nand_hwcontrol;
167 this->dev_ready = sharpsl_nand_dev_ready;
168 /* 15 us command delay time */
169 this->chip_delay = 15;
170 /* set eccmode using hardware ECC */
171 this->ecc.mode = NAND_ECC_HW;
172 this->ecc.size = 256;
173 this->ecc.bytes = 3;
174 this->badblock_pattern = data->badblock_pattern;
175 this->ecc.layout = data->ecc_layout;
176 this->ecc.hwctl = sharpsl_nand_enable_hwecc;
177 this->ecc.calculate = sharpsl_nand_calculate_ecc;
178 this->ecc.correct = nand_correct_data;
180 /* Scan to find existence of the device */
181 err = nand_scan(&sharpsl->mtd, 1);
182 if (err)
183 goto err_scan;
185 /* Register the partitions */
186 sharpsl->mtd.name = "sharpsl-nand";
187 nr_partitions = parse_mtd_partitions(&sharpsl->mtd, part_probes, &sharpsl_partition_info, 0);
188 if (nr_partitions <= 0) {
189 nr_partitions = data->nr_partitions;
190 sharpsl_partition_info = data->partitions;
193 err = mtd_device_register(&sharpsl->mtd, sharpsl_partition_info,
194 nr_partitions);
195 if (err)
196 goto err_add;
198 /* Return happy */
199 return 0;
201 err_add:
202 nand_release(&sharpsl->mtd);
204 err_scan:
205 platform_set_drvdata(pdev, NULL);
206 iounmap(sharpsl->io);
207 err_ioremap:
208 err_get_res:
209 kfree(sharpsl);
210 return err;
214 * Clean up routine
216 static int __devexit sharpsl_nand_remove(struct platform_device *pdev)
218 struct sharpsl_nand *sharpsl = platform_get_drvdata(pdev);
220 /* Release resources, unregister device */
221 nand_release(&sharpsl->mtd);
223 platform_set_drvdata(pdev, NULL);
225 iounmap(sharpsl->io);
227 /* Free the MTD device structure */
228 kfree(sharpsl);
230 return 0;
233 static struct platform_driver sharpsl_nand_driver = {
234 .driver = {
235 .name = "sharpsl-nand",
236 .owner = THIS_MODULE,
238 .probe = sharpsl_nand_probe,
239 .remove = __devexit_p(sharpsl_nand_remove),
242 static int __init sharpsl_nand_init(void)
244 return platform_driver_register(&sharpsl_nand_driver);
246 module_init(sharpsl_nand_init);
248 static void __exit sharpsl_nand_exit(void)
250 platform_driver_unregister(&sharpsl_nand_driver);
252 module_exit(sharpsl_nand_exit);
254 MODULE_LICENSE("GPL");
255 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
256 MODULE_DESCRIPTION("Device specific logic for NAND flash on Sharp SL-C7xx Series");