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sysfs: Remove support for tagged directories with untagged members (again)
[linux-btrfs-devel.git] / arch / arm / mach-omap2 / board-devkit8000.c
blobb6002ec31c6aec28930765d1fe04e609cb75decd
1 /*
2 * board-devkit8000.c - TimLL Devkit8000
3 *
4 * Copyright (C) 2009 Kim Botherway
5 * Copyright (C) 2010 Thomas Weber
6 *
7 * Modified from mach-omap2/board-omap3beagle.c
8 *
9 * Initial code: Syed Mohammed Khasim
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/platform_device.h>
19 #include <linux/delay.h>
20 #include <linux/err.h>
21 #include <linux/clk.h>
22 #include <linux/io.h>
23 #include <linux/leds.h>
24 #include <linux/gpio.h>
25 #include <linux/input.h>
26 #include <linux/gpio_keys.h>
27
28 #include <linux/mtd/mtd.h>
29 #include <linux/mtd/partitions.h>
30 #include <linux/mtd/nand.h>
31 #include <linux/mmc/host.h>
32
33 #include <linux/regulator/machine.h>
34 #include <linux/i2c/twl.h>
35
36 #include <mach/hardware.h>
37 #include <mach/id.h>
38 #include <asm/mach-types.h>
39 #include <asm/mach/arch.h>
40 #include <asm/mach/map.h>
41 #include <asm/mach/flash.h>
42
43 #include <plat/board.h>
44 #include <plat/common.h>
45 #include <plat/gpmc.h>
46 #include <plat/nand.h>
47 #include <plat/usb.h>
48 #include <video/omapdss.h>
49 #include <video/omap-panel-generic-dpi.h>
50
51 #include <plat/mcspi.h>
52 #include <linux/input/matrix_keypad.h>
53 #include <linux/spi/spi.h>
54 #include <linux/dm9000.h>
55 #include <linux/interrupt.h>
56
57 #include "sdram-micron-mt46h32m32lf-6.h"
58
59 #include "mux.h"
60 #include "hsmmc.h"
61 #include "common-board-devices.h"
62
63 #define OMAP_DM9000_GPIO_IRQ 25
64 #define OMAP3_DEVKIT_TS_GPIO 27
65
66 static struct mtd_partition devkit8000_nand_partitions[] = {
67 /* All the partition sizes are listed in terms of NAND block size */
68 {
69 .name = "X-Loader",
70 .offset = 0,
71 .size = 4 * NAND_BLOCK_SIZE,
72 .mask_flags = MTD_WRITEABLE, /* force read-only */
73 },
74 {
75 .name = "U-Boot",
76 .offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
77 .size = 15 * NAND_BLOCK_SIZE,
78 .mask_flags = MTD_WRITEABLE, /* force read-only */
79 },
80 {
81 .name = "U-Boot Env",
82 .offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
83 .size = 1 * NAND_BLOCK_SIZE,
84 },
85 {
86 .name = "Kernel",
87 .offset = MTDPART_OFS_APPEND, /* Offset = 0x280000 */
88 .size = 32 * NAND_BLOCK_SIZE,
89 },
90 {
91 .name = "File System",
92 .offset = MTDPART_OFS_APPEND, /* Offset = 0x680000 */
93 .size = MTDPART_SIZ_FULL,
94 },
95 };
96
97 static struct omap2_hsmmc_info mmc[] = {
98 {
99 .mmc = 1,
100 .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
101 .gpio_wp = 29,
102 },
103 {} /* Terminator */
104 };
105
106 static int devkit8000_panel_enable_lcd(struct omap_dss_device *dssdev)
107 {
108 if (gpio_is_valid(dssdev->reset_gpio))
109 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
110 return 0;
111 }
112
113 static void devkit8000_panel_disable_lcd(struct omap_dss_device *dssdev)
114 {
115 if (gpio_is_valid(dssdev->reset_gpio))
116 gpio_set_value_cansleep(dssdev->reset_gpio, 0);
117 }
118
119 static int devkit8000_panel_enable_dvi(struct omap_dss_device *dssdev)
120 {
121 if (gpio_is_valid(dssdev->reset_gpio))
122 gpio_set_value_cansleep(dssdev->reset_gpio, 1);
123 return 0;
124 }
125
126 static void devkit8000_panel_disable_dvi(struct omap_dss_device *dssdev)
127 {
128 if (gpio_is_valid(dssdev->reset_gpio))
129 gpio_set_value_cansleep(dssdev->reset_gpio, 0);
130 }
131
132 static struct regulator_consumer_supply devkit8000_vmmc1_supply[] = {
133 REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
134 };
135
136 /* ads7846 on SPI */
137 static struct regulator_consumer_supply devkit8000_vio_supply[] = {
138 REGULATOR_SUPPLY("vcc", "spi2.0"),
139 };
140
141 static struct panel_generic_dpi_data lcd_panel = {
142 .name = "generic",
143 .platform_enable = devkit8000_panel_enable_lcd,
144 .platform_disable = devkit8000_panel_disable_lcd,
145 };
146
147 static struct omap_dss_device devkit8000_lcd_device = {
148 .name = "lcd",
149 .type = OMAP_DISPLAY_TYPE_DPI,
150 .driver_name = "generic_dpi_panel",
151 .data = &lcd_panel,
152 .phy.dpi.data_lines = 24,
153 };
154
155 static struct panel_generic_dpi_data dvi_panel = {
156 .name = "generic",
157 .platform_enable = devkit8000_panel_enable_dvi,
158 .platform_disable = devkit8000_panel_disable_dvi,
159 };
160
161 static struct omap_dss_device devkit8000_dvi_device = {
162 .name = "dvi",
163 .type = OMAP_DISPLAY_TYPE_DPI,
164 .driver_name = "generic_dpi_panel",
165 .data = &dvi_panel,
166 .phy.dpi.data_lines = 24,
167 };
168
169 static struct omap_dss_device devkit8000_tv_device = {
170 .name = "tv",
171 .driver_name = "venc",
172 .type = OMAP_DISPLAY_TYPE_VENC,
173 .phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
174 };
175
176
177 static struct omap_dss_device *devkit8000_dss_devices[] = {
178 &devkit8000_lcd_device,
179 &devkit8000_dvi_device,
180 &devkit8000_tv_device,
181 };
182
183 static struct omap_dss_board_info devkit8000_dss_data = {
184 .num_devices = ARRAY_SIZE(devkit8000_dss_devices),
185 .devices = devkit8000_dss_devices,
186 .default_device = &devkit8000_lcd_device,
187 };
188
189 static uint32_t board_keymap[] = {
190 KEY(0, 0, KEY_1),
191 KEY(1, 0, KEY_2),
192 KEY(2, 0, KEY_3),
193 KEY(0, 1, KEY_4),
194 KEY(1, 1, KEY_5),
195 KEY(2, 1, KEY_6),
196 KEY(3, 1, KEY_F5),
197 KEY(0, 2, KEY_7),
198 KEY(1, 2, KEY_8),
199 KEY(2, 2, KEY_9),
200 KEY(3, 2, KEY_F6),
201 KEY(0, 3, KEY_F7),
202 KEY(1, 3, KEY_0),
203 KEY(2, 3, KEY_F8),
204 PERSISTENT_KEY(4, 5),
205 KEY(4, 4, KEY_VOLUMEUP),
206 KEY(5, 5, KEY_VOLUMEDOWN),
207 0
208 };
209
210 static struct matrix_keymap_data board_map_data = {
211 .keymap = board_keymap,
212 .keymap_size = ARRAY_SIZE(board_keymap),
213 };
214
215 static struct twl4030_keypad_data devkit8000_kp_data = {
216 .keymap_data = &board_map_data,
217 .rows = 6,
218 .cols = 6,
219 .rep = 1,
220 };
221
222 static struct gpio_led gpio_leds[];
223
224 static int devkit8000_twl_gpio_setup(struct device *dev,
225 unsigned gpio, unsigned ngpio)
226 {
227 int ret;
228
229 omap_mux_init_gpio(29, OMAP_PIN_INPUT);
230 /* gpio + 0 is "mmc0_cd" (input/IRQ) */
231 mmc[0].gpio_cd = gpio + 0;
232 omap2_hsmmc_init(mmc);
233
234 /* TWL4030_GPIO_MAX + 1 == ledB, PMU_STAT (out, active low LED) */
235 gpio_leds[2].gpio = gpio + TWL4030_GPIO_MAX + 1;
236
237 /* TWL4030_GPIO_MAX + 0 is "LCD_PWREN" (out, active high) */
238 devkit8000_lcd_device.reset_gpio = gpio + TWL4030_GPIO_MAX + 0;
239 ret = gpio_request_one(devkit8000_lcd_device.reset_gpio,
240 GPIOF_OUT_INIT_LOW, "LCD_PWREN");
241 if (ret < 0) {
242 devkit8000_lcd_device.reset_gpio = -EINVAL;
243 printk(KERN_ERR "Failed to request GPIO for LCD_PWRN\n");
244 }
245
246 /* gpio + 7 is "DVI_PD" (out, active low) */
247 devkit8000_dvi_device.reset_gpio = gpio + 7;
248 ret = gpio_request_one(devkit8000_dvi_device.reset_gpio,
249 GPIOF_OUT_INIT_LOW, "DVI PowerDown");
250 if (ret < 0) {
251 devkit8000_dvi_device.reset_gpio = -EINVAL;
252 printk(KERN_ERR "Failed to request GPIO for DVI PowerDown\n");
253 }
254
255 return 0;
256 }
257
258 static struct twl4030_gpio_platform_data devkit8000_gpio_data = {
259 .gpio_base = OMAP_MAX_GPIO_LINES,
260 .irq_base = TWL4030_GPIO_IRQ_BASE,
261 .irq_end = TWL4030_GPIO_IRQ_END,
262 .use_leds = true,
263 .pulldowns = BIT(1) | BIT(2) | BIT(6) | BIT(8) | BIT(13)
264 | BIT(15) | BIT(16) | BIT(17),
265 .setup = devkit8000_twl_gpio_setup,
266 };
267
268 static struct regulator_consumer_supply devkit8000_vpll1_supplies[] = {
269 REGULATOR_SUPPLY("vdds_dsi", "omapdss"),
270 REGULATOR_SUPPLY("vdds_dsi", "omapdss_dsi1"),
271 };
272
273 /* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
274 static struct regulator_init_data devkit8000_vmmc1 = {
275 .constraints = {
276 .min_uV = 1850000,
277 .max_uV = 3150000,
278 .valid_modes_mask = REGULATOR_MODE_NORMAL
279 | REGULATOR_MODE_STANDBY,
280 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
281 | REGULATOR_CHANGE_MODE
282 | REGULATOR_CHANGE_STATUS,
283 },
284 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vmmc1_supply),
285 .consumer_supplies = devkit8000_vmmc1_supply,
286 };
287
288 /* VPLL1 for digital video outputs */
289 static struct regulator_init_data devkit8000_vpll1 = {
290 .constraints = {
291 .min_uV = 1800000,
292 .max_uV = 1800000,
293 .valid_modes_mask = REGULATOR_MODE_NORMAL
294 | REGULATOR_MODE_STANDBY,
295 .valid_ops_mask = REGULATOR_CHANGE_MODE
296 | REGULATOR_CHANGE_STATUS,
297 },
298 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vpll1_supplies),
299 .consumer_supplies = devkit8000_vpll1_supplies,
300 };
301
302 /* VAUX4 for ads7846 and nubs */
303 static struct regulator_init_data devkit8000_vio = {
304 .constraints = {
305 .min_uV = 1800000,
306 .max_uV = 1800000,
307 .apply_uV = true,
308 .valid_modes_mask = REGULATOR_MODE_NORMAL
309 | REGULATOR_MODE_STANDBY,
310 .valid_ops_mask = REGULATOR_CHANGE_MODE
311 | REGULATOR_CHANGE_STATUS,
312 },
313 .num_consumer_supplies = ARRAY_SIZE(devkit8000_vio_supply),
314 .consumer_supplies = devkit8000_vio_supply,
315 };
316
317 static struct twl4030_platform_data devkit8000_twldata = {
318 /* platform_data for children goes here */
319 .gpio = &devkit8000_gpio_data,
320 .vmmc1 = &devkit8000_vmmc1,
321 .vpll1 = &devkit8000_vpll1,
322 .vio = &devkit8000_vio,
323 .keypad = &devkit8000_kp_data,
324 };
325
326 static int __init devkit8000_i2c_init(void)
327 {
328 omap3_pmic_get_config(&devkit8000_twldata,
329 TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_AUDIO,
330 TWL_COMMON_REGULATOR_VDAC);
331 omap3_pmic_init("tps65930", &devkit8000_twldata);
332 /* Bus 3 is attached to the DVI port where devices like the pico DLP
333 * projector don't work reliably with 400kHz */
334 omap_register_i2c_bus(3, 400, NULL, 0);
335 return 0;
336 }
337
338 static struct gpio_led gpio_leds[] = {
339 {
340 .name = "led1",
341 .default_trigger = "heartbeat",
342 .gpio = 186,
343 .active_low = true,
344 },
345 {
346 .name = "led2",
347 .default_trigger = "mmc0",
348 .gpio = 163,
349 .active_low = true,
350 },
351 {
352 .name = "ledB",
353 .default_trigger = "none",
354 .gpio = 153,
355 .active_low = true,
356 },
357 {
358 .name = "led3",
359 .default_trigger = "none",
360 .gpio = 164,
361 .active_low = true,
362 },
363 };
364
365 static struct gpio_led_platform_data gpio_led_info = {
366 .leds = gpio_leds,
367 .num_leds = ARRAY_SIZE(gpio_leds),
368 };
369
370 static struct platform_device leds_gpio = {
371 .name = "leds-gpio",
372 .id = -1,
373 .dev = {
374 .platform_data = &gpio_led_info,
375 },
376 };
377
378 static struct gpio_keys_button gpio_buttons[] = {
379 {
380 .code = BTN_EXTRA,
381 .gpio = 26,
382 .desc = "user",
383 .wakeup = 1,
384 },
385 };
386
387 static struct gpio_keys_platform_data gpio_key_info = {
388 .buttons = gpio_buttons,
389 .nbuttons = ARRAY_SIZE(gpio_buttons),
390 };
391
392 static struct platform_device keys_gpio = {
393 .name = "gpio-keys",
394 .id = -1,
395 .dev = {
396 .platform_data = &gpio_key_info,
397 },
398 };
399
400
401 static void __init devkit8000_init_early(void)
402 {
403 omap2_init_common_infrastructure();
404 omap2_init_common_devices(mt46h32m32lf6_sdrc_params,
405 mt46h32m32lf6_sdrc_params);
406 }
407
408 static void __init devkit8000_init_irq(void)
409 {
410 omap3_init_irq();
411 }
412
413 #define OMAP_DM9000_BASE 0x2c000000
414
415 static struct resource omap_dm9000_resources[] = {
416 [0] = {
417 .start = OMAP_DM9000_BASE,
418 .end = (OMAP_DM9000_BASE + 0x4 - 1),
419 .flags = IORESOURCE_MEM,
420 },
421 [1] = {
422 .start = (OMAP_DM9000_BASE + 0x400),
423 .end = (OMAP_DM9000_BASE + 0x400 + 0x4 - 1),
424 .flags = IORESOURCE_MEM,
425 },
426 [2] = {
427 .start = OMAP_GPIO_IRQ(OMAP_DM9000_GPIO_IRQ),
428 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
429 },
430 };
431
432 static struct dm9000_plat_data omap_dm9000_platdata = {
433 .flags = DM9000_PLATF_16BITONLY,
434 };
435
436 static struct platform_device omap_dm9000_dev = {
437 .name = "dm9000",
438 .id = -1,
439 .num_resources = ARRAY_SIZE(omap_dm9000_resources),
440 .resource = omap_dm9000_resources,
441 .dev = {
442 .platform_data = &omap_dm9000_platdata,
443 },
444 };
445
446 static void __init omap_dm9000_init(void)
447 {
448 unsigned char *eth_addr = omap_dm9000_platdata.dev_addr;
449 struct omap_die_id odi;
450 int ret;
451
452 ret = gpio_request_one(OMAP_DM9000_GPIO_IRQ, GPIOF_IN, "dm9000 irq");
453 if (ret < 0) {
454 printk(KERN_ERR "Failed to request GPIO%d for dm9000 IRQ\n",
455 OMAP_DM9000_GPIO_IRQ);
456 return;
457 }
458
459 /* init the mac address using DIE id */
460 omap_get_die_id(&odi);
461
462 eth_addr[0] = 0x02; /* locally administered */
463 eth_addr[1] = odi.id_1 & 0xff;
464 eth_addr[2] = (odi.id_0 & 0xff000000) >> 24;
465 eth_addr[3] = (odi.id_0 & 0x00ff0000) >> 16;
466 eth_addr[4] = (odi.id_0 & 0x0000ff00) >> 8;
467 eth_addr[5] = (odi.id_0 & 0x000000ff);
468 }
469
470 static struct platform_device *devkit8000_devices[] __initdata = {
471 &leds_gpio,
472 &keys_gpio,
473 &omap_dm9000_dev,
474 };
475
476 static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
477
478 .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
479 .port_mode[1] = OMAP_USBHS_PORT_MODE_UNUSED,
480 .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
481
482 .phy_reset = true,
483 .reset_gpio_port[0] = -EINVAL,
484 .reset_gpio_port[1] = -EINVAL,
485 .reset_gpio_port[2] = -EINVAL
486 };
487
488 #ifdef CONFIG_OMAP_MUX
489 static struct omap_board_mux board_mux[] __initdata = {
490 /* nCS and IRQ for Devkit8000 ethernet */
491 OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE0),
492 OMAP3_MUX(ETK_D11, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
493
494 /* McSPI 2*/
495 OMAP3_MUX(MCSPI2_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
496 OMAP3_MUX(MCSPI2_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
497 OMAP3_MUX(MCSPI2_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
498 OMAP3_MUX(MCSPI2_CS0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
499 OMAP3_MUX(MCSPI2_CS1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
500
501 /* PENDOWN GPIO */
502 OMAP3_MUX(ETK_D13, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
503
504 /* mUSB */
505 OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
506 OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
507 OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
508 OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
509 OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
510 OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
511 OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
512 OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
513 OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
514 OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
515 OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
516 OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
517
518 /* USB 1 */
519 OMAP3_MUX(ETK_CTL, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
520 OMAP3_MUX(ETK_CLK, OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT),
521 OMAP3_MUX(ETK_D8, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
522 OMAP3_MUX(ETK_D9, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
523 OMAP3_MUX(ETK_D0, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
524 OMAP3_MUX(ETK_D1, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
525 OMAP3_MUX(ETK_D2, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
526 OMAP3_MUX(ETK_D3, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
527 OMAP3_MUX(ETK_D4, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
528 OMAP3_MUX(ETK_D5, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
529 OMAP3_MUX(ETK_D6, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
530 OMAP3_MUX(ETK_D7, OMAP_MUX_MODE3 | OMAP_PIN_INPUT),
531
532 /* MMC 1 */
533 OMAP3_MUX(SDMMC1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
534 OMAP3_MUX(SDMMC1_CMD, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
535 OMAP3_MUX(SDMMC1_DAT0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
536 OMAP3_MUX(SDMMC1_DAT1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
537 OMAP3_MUX(SDMMC1_DAT2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
538 OMAP3_MUX(SDMMC1_DAT3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
539 OMAP3_MUX(SDMMC1_DAT4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
540 OMAP3_MUX(SDMMC1_DAT5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
541 OMAP3_MUX(SDMMC1_DAT6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
542 OMAP3_MUX(SDMMC1_DAT7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
543
544 /* McBSP 2 */
545 OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
546 OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
547 OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
548 OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
549
550 /* I2C 1 */
551 OMAP3_MUX(I2C1_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
552 OMAP3_MUX(I2C1_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
553
554 /* I2C 2 */
555 OMAP3_MUX(I2C2_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
556 OMAP3_MUX(I2C2_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
557
558 /* I2C 3 */
559 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
560 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
561
562 /* I2C 4 */
563 OMAP3_MUX(I2C4_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
564 OMAP3_MUX(I2C4_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
565
566 /* serial ports */
567 OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
568 OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
569 OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
570 OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
571
572 /* DSS */
573 OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
574 OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
575 OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
576 OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
577 OMAP3_MUX(DSS_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
578 OMAP3_MUX(DSS_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
579 OMAP3_MUX(DSS_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
580 OMAP3_MUX(DSS_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
581 OMAP3_MUX(DSS_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
582 OMAP3_MUX(DSS_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
583 OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
584 OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
585 OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
586 OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
587 OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
588 OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
589 OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
590 OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
591 OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
592 OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
593 OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
594 OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
595 OMAP3_MUX(DSS_DATA18, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
596 OMAP3_MUX(DSS_DATA19, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
597 OMAP3_MUX(DSS_DATA20, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
598 OMAP3_MUX(DSS_DATA21, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
599 OMAP3_MUX(DSS_DATA22, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
600 OMAP3_MUX(DSS_DATA23, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
601
602 /* expansion port */
603 /* McSPI 1 */
604 OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
605 OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
606 OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
607 OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
608 OMAP3_MUX(MCSPI1_CS3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
609
610 /* HDQ */
611 OMAP3_MUX(HDQ_SIO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
612
613 /* McSPI4 */
614 OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
615 OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
616 OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
617 OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
618
619 /* MMC 2 */
620 OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
621 OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
622 OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
623 OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
624
625 /* I2C3 */
626 OMAP3_MUX(I2C3_SCL, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
627 OMAP3_MUX(I2C3_SDA, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
628
629 OMAP3_MUX(MCBSP1_CLKX, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
630 OMAP3_MUX(MCBSP_CLKS, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
631 OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
632
633 OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
634 OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
635
636 /* TPS IRQ */
637 OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
638 OMAP_PIN_INPUT_PULLUP),
639
640 { .reg_offset = OMAP_MUX_TERMINATOR },
641 };
642 #endif
643
644 static void __init devkit8000_init(void)
645 {
646 omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
647 omap_serial_init();
648
649 omap_dm9000_init();
650
651 devkit8000_i2c_init();
652 platform_add_devices(devkit8000_devices,
653 ARRAY_SIZE(devkit8000_devices));
654
655 omap_display_init(&devkit8000_dss_data);
656
657 omap_ads7846_init(2, OMAP3_DEVKIT_TS_GPIO, 0, NULL);
658
659 usb_musb_init(NULL);
660 usbhs_init(&usbhs_bdata);
661 omap_nand_flash_init(NAND_BUSWIDTH_16, devkit8000_nand_partitions,
662 ARRAY_SIZE(devkit8000_nand_partitions));
663
664 /* Ensure SDRC pins are mux'd for self-refresh */
665 omap_mux_init_signal("sdrc_cke0", OMAP_PIN_OUTPUT);
666 omap_mux_init_signal("sdrc_cke1", OMAP_PIN_OUTPUT);
667 }
668
669 MACHINE_START(DEVKIT8000, "OMAP3 Devkit8000")
670 .boot_params = 0x80000100,
671 .reserve = omap_reserve,
672 .map_io = omap3_map_io,
673 .init_early = devkit8000_init_early,
674 .init_irq = devkit8000_init_irq,
675 .init_machine = devkit8000_init,
676 .timer = &omap3_secure_timer,
677 MACHINE_END
Linux Btrfs Development