arch/cris/arch-v32/kernel/smp.c

   1 #include <linux/types.h>
   2 #include <asm/delay.h>
   3 #include <irq.h>
   4 #include <hwregs/intr_vect.h>
   5 #include <hwregs/intr_vect_defs.h>
   6 #include <asm/tlbflush.h>
   7 #include <asm/mmu_context.h>
   8 #include <hwregs/asm/mmu_defs_asm.h>
   9 #include <hwregs/supp_reg.h>
  10 #include <linux/atomic.h>
  11
  12 #include <linux/err.h>
  13 #include <linux/init.h>
  14 #include <linux/timex.h>
  15 #include <linux/sched.h>
  16 #include <linux/kernel.h>
  17 #include <linux/cpumask.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/module.h>
  20
  21 #define IPI_SCHEDULE 1
  22 #define IPI_CALL 2
  23 #define IPI_FLUSH_TLB 4
  24 #define IPI_BOOT 8
  25
  26 #define FLUSH_ALL (void*)0xffffffff
  27
  28 /* Vector of locks used for various atomic operations */
  29 spinlock_t cris_atomic_locks[] = {
  30         [0 ... LOCK_COUNT - 1] = __SPIN_LOCK_UNLOCKED(cris_atomic_locks)
  31 };
  32
  33 /* CPU masks */
  34 cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
  35 EXPORT_SYMBOL(phys_cpu_present_map);
  36
  37 /* Variables used during SMP boot */
  38 volatile int cpu_now_booting = 0;
  39 volatile struct thread_info *smp_init_current_idle_thread;
  40
  41 /* Variables used during IPI */
  42 static DEFINE_SPINLOCK(call_lock);
  43 static DEFINE_SPINLOCK(tlbstate_lock);
  44
  45 struct call_data_struct {
  46         void (*func) (void *info);
  47         void *info;
  48         int wait;
  49 };
  50
  51 static struct call_data_struct * call_data;
  52
  53 static struct mm_struct* flush_mm;
  54 static struct vm_area_struct* flush_vma;
  55 static unsigned long flush_addr;
  56
  57 /* Mode registers */
  58 static unsigned long irq_regs[NR_CPUS] = {
  59   regi_irq,
  60   regi_irq2
  61 };
  62
  63 static irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id);
  64 static int send_ipi(int vector, int wait, cpumask_t cpu_mask);
  65 static struct irqaction irq_ipi  = {
  66         .handler = crisv32_ipi_interrupt,
  67         .flags = IRQF_DISABLED,
  68         .name = "ipi",
  69 };
  70
  71 extern void cris_mmu_init(void);
  72 extern void cris_timer_init(void);
  73
  74 /* SMP initialization */
  75 void __init smp_prepare_cpus(unsigned int max_cpus)
  76 {
  77         int i;
  78
  79         /* From now on we can expect IPIs so set them up */
  80         setup_irq(IPI_INTR_VECT, &irq_ipi);
  81
  82         /* Mark all possible CPUs as present */
  83         for (i = 0; i < max_cpus; i++)
  84                 cpumask_set_cpu(i, &phys_cpu_present_map);
  85 }
  86
  87 void __devinit smp_prepare_boot_cpu(void)
  88 {
  89         /* PGD pointer has moved after per_cpu initialization so
  90          * update the MMU.
  91          */
  92         pgd_t **pgd;
  93         pgd = (pgd_t**)&per_cpu(current_pgd, smp_processor_id());
  94
  95         SUPP_BANK_SEL(1);
  96         SUPP_REG_WR(RW_MM_TLB_PGD, pgd);
  97         SUPP_BANK_SEL(2);
  98         SUPP_REG_WR(RW_MM_TLB_PGD, pgd);
  99
 100         set_cpu_online(0, true);
 101         cpumask_set_cpu(0, &phys_cpu_present_map);
 102         set_cpu_possible(0, true);
 103 }
 104
 105 void __init smp_cpus_done(unsigned int max_cpus)
 106 {
 107 }
 108
 109 /* Bring one cpu online.*/
 110 static int __init
 111 smp_boot_one_cpu(int cpuid)
 112 {
 113         unsigned timeout;
 114         struct task_struct *idle;
 115         cpumask_t cpu_mask;
 116
 117         cpumask_clear(&cpu_mask);
 118         idle = fork_idle(cpuid);
 119         if (IS_ERR(idle))
 120                 panic("SMP: fork failed for CPU:%d", cpuid);
 121
 122         task_thread_info(idle)->cpu = cpuid;
 123
 124         /* Information to the CPU that is about to boot */
 125         smp_init_current_idle_thread = task_thread_info(idle);
 126         cpu_now_booting = cpuid;
 127
 128         /* Kick it */
 129         set_cpu_online(cpuid, true);
 130         cpumask_set_cpu(cpuid, &cpu_mask);
 131         send_ipi(IPI_BOOT, 0, cpu_mask);
 132         set_cpu_online(cpuid, false);
 133
 134         /* Wait for CPU to come online */
 135         for (timeout = 0; timeout < 10000; timeout++) {
 136                 if(cpu_online(cpuid)) {
 137                         cpu_now_booting = 0;
 138                         smp_init_current_idle_thread = NULL;
 139                         return 0; /* CPU online */
 140                 }
 141                 udelay(100);
 142                 barrier();
 143         }
 144
 145         put_task_struct(idle);
 146         idle = NULL;
 147
 148         printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid);
 149         return -1;
 150 }
 151
 152 /* Secondary CPUs starts using C here. Here we need to setup CPU
 153  * specific stuff such as the local timer and the MMU. */
 154 void __init smp_callin(void)
 155 {
 156         extern void cpu_idle(void);
 157
 158         int cpu = cpu_now_booting;
 159         reg_intr_vect_rw_mask vect_mask = {0};
 160
 161         /* Initialise the idle task for this CPU */
 162         atomic_inc(&init_mm.mm_count);
 163         current->active_mm = &init_mm;
 164
 165         /* Set up MMU */
 166         cris_mmu_init();
 167         __flush_tlb_all();
 168
 169         /* Setup local timer. */
 170         cris_timer_init();
 171
 172         /* Enable IRQ and idle */
 173         REG_WR(intr_vect, irq_regs[cpu], rw_mask, vect_mask);
 174         crisv32_unmask_irq(IPI_INTR_VECT);
 175         crisv32_unmask_irq(TIMER0_INTR_VECT);
 176         preempt_disable();
 177         notify_cpu_starting(cpu);
 178         local_irq_enable();
 179
 180         set_cpu_online(cpu, true);
 181         cpu_idle();
 182 }
 183
 184 /* Stop execution on this CPU.*/
 185 void stop_this_cpu(void* dummy)
 186 {
 187         local_irq_disable();
 188         asm volatile("halt");
 189 }
 190
 191 /* Other calls */
 192 void smp_send_stop(void)
 193 {
 194         smp_call_function(stop_this_cpu, NULL, 0);
 195 }
 196
 197 int setup_profiling_timer(unsigned int multiplier)
 198 {
 199         return -EINVAL;
 200 }
 201
 202
 203 /* cache_decay_ticks is used by the scheduler to decide if a process
 204  * is "hot" on one CPU. A higher value means a higher penalty to move
 205  * a process to another CPU. Our cache is rather small so we report
 206  * 1 tick.
 207  */
 208 unsigned long cache_decay_ticks = 1;
 209
 210 int __cpuinit __cpu_up(unsigned int cpu)
 211 {
 212         smp_boot_one_cpu(cpu);
 213         return cpu_online(cpu) ? 0 : -ENOSYS;
 214 }
 215
 216 void smp_send_reschedule(int cpu)
 217 {
 218         cpumask_t cpu_mask;
 219         cpumask_clear(&cpu_mask);
 220         cpumask_set_cpu(cpu, &cpu_mask);
 221         send_ipi(IPI_SCHEDULE, 0, cpu_mask);
 222 }
 223
 224 /* TLB flushing
 225  *
 226  * Flush needs to be done on the local CPU and on any other CPU that
 227  * may have the same mapping. The mm->cpu_vm_mask is used to keep track
 228  * of which CPUs that a specific process has been executed on.
 229  */
 230 void flush_tlb_common(struct mm_struct* mm, struct vm_area_struct* vma, unsigned long addr)
 231 {
 232         unsigned long flags;
 233         cpumask_t cpu_mask;
 234
 235         spin_lock_irqsave(&tlbstate_lock, flags);
 236         cpu_mask = (mm == FLUSH_ALL ? cpu_all_mask : *mm_cpumask(mm));
 237         cpumask_clear_cpu(smp_processor_id(), &cpu_mask);
 238         flush_mm = mm;
 239         flush_vma = vma;
 240         flush_addr = addr;
 241         send_ipi(IPI_FLUSH_TLB, 1, cpu_mask);
 242         spin_unlock_irqrestore(&tlbstate_lock, flags);
 243 }
 244
 245 void flush_tlb_all(void)
 246 {
 247         __flush_tlb_all();
 248         flush_tlb_common(FLUSH_ALL, FLUSH_ALL, 0);
 249 }
 250
 251 void flush_tlb_mm(struct mm_struct *mm)
 252 {
 253         __flush_tlb_mm(mm);
 254         flush_tlb_common(mm, FLUSH_ALL, 0);
 255         /* No more mappings in other CPUs */
 256         cpumask_clear(mm_cpumask(mm));
 257         cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
 258 }
 259
 260 void flush_tlb_page(struct vm_area_struct *vma,
 261                            unsigned long addr)
 262 {
 263         __flush_tlb_page(vma, addr);
 264         flush_tlb_common(vma->vm_mm, vma, addr);
 265 }
 266
 267 /* Inter processor interrupts
 268  *
 269  * The IPIs are used for:
 270  *   * Force a schedule on a CPU
 271  *   * FLush TLB on other CPUs
 272  *   * Call a function on other CPUs
 273  */
 274
 275 int send_ipi(int vector, int wait, cpumask_t cpu_mask)
 276 {
 277         int i = 0;
 278         reg_intr_vect_rw_ipi ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi);
 279         int ret = 0;
 280
 281         /* Calculate CPUs to send to. */
 282         cpumask_and(&cpu_mask, &cpu_mask, cpu_online_mask);
 283
 284         /* Send the IPI. */
 285         for_each_cpu(i, &cpu_mask)
 286         {
 287                 ipi.vector |= vector;
 288                 REG_WR(intr_vect, irq_regs[i], rw_ipi, ipi);
 289         }
 290
 291         /* Wait for IPI to finish on other CPUS */
 292         if (wait) {
 293                 for_each_cpu(i, &cpu_mask) {
 294                         int j;
 295                         for (j = 0 ; j < 1000; j++) {
 296                                 ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi);
 297                                 if (!ipi.vector)
 298                                         break;
 299                                 udelay(100);
 300                         }
 301
 302                         /* Timeout? */
 303                         if (ipi.vector) {
 304                                 printk("SMP call timeout from %d to %d\n", smp_processor_id(), i);
 305                                 ret = -ETIMEDOUT;
 306                                 dump_stack();
 307                         }
 308                 }
 309         }
 310         return ret;
 311 }
 312
 313 /*
 314  * You must not call this function with disabled interrupts or from a
 315  * hardware interrupt handler or from a bottom half handler.
 316  */
 317 int smp_call_function(void (*func)(void *info), void *info, int wait)
 318 {
 319         cpumask_t cpu_mask;
 320         struct call_data_struct data;
 321         int ret;
 322
 323         cpumask_setall(&cpu_mask);
 324         cpumask_clear_cpu(smp_processor_id(), &cpu_mask);
 325
 326         WARN_ON(irqs_disabled());
 327
 328         data.func = func;
 329         data.info = info;
 330         data.wait = wait;
 331
 332         spin_lock(&call_lock);
 333         call_data = &data;
 334         ret = send_ipi(IPI_CALL, wait, cpu_mask);
 335         spin_unlock(&call_lock);
 336
 337         return ret;
 338 }
 339
 340 irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id)
 341 {
 342         void (*func) (void *info) = call_data->func;
 343         void *info = call_data->info;
 344         reg_intr_vect_rw_ipi ipi;
 345
 346         ipi = REG_RD(intr_vect, irq_regs[smp_processor_id()], rw_ipi);
 347
 348         if (ipi.vector & IPI_SCHEDULE) {
 349                 scheduler_ipi();
 350         }
 351         if (ipi.vector & IPI_CALL) {
 352                 func(info);
 353         }
 354         if (ipi.vector & IPI_FLUSH_TLB) {
 355                 if (flush_mm == FLUSH_ALL)
 356                         __flush_tlb_all();
 357                 else if (flush_vma == FLUSH_ALL)
 358                         __flush_tlb_mm(flush_mm);
 359                 else
 360                         __flush_tlb_page(flush_vma, flush_addr);
 361         }
 362
 363         ipi.vector = 0;
 364         REG_WR(intr_vect, irq_regs[smp_processor_id()], rw_ipi, ipi);
 365
 366         return IRQ_HANDLED;
 367 }
 368