include/linux/intel_mid_dma.h

   1 /*
   2  *  intel_mid_dma.h - Intel MID DMA Drivers
   3  *
   4  *  Copyright (C) 2008-10 Intel Corp
   5  *  Author: Vinod Koul <vinod.koul@intel.com>
   6  *  ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
   7  *
   8  *  This program is free software; you can redistribute it and/or modify
   9  *  it under the terms of the GNU General Public License as published by
  10  *  the Free Software Foundation; version 2 of the License.
  11  *
  12  *  This program is distributed in the hope that it will be useful, but
  13  *  WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  15  *  General Public License for more details.
  16  *
  17  *  You should have received a copy of the GNU General Public License along
  18  *  with this program; if not, write to the Free Software Foundation, Inc.,
  19  *  59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
  20  *
  21  * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
  22  *
  23  *
  24  */
  25 #ifndef __INTEL_MID_DMA_H__
  26 #define __INTEL_MID_DMA_H__
  27
  28 #include <linux/dmaengine.h>
  29
  30 #define DMA_PREP_CIRCULAR_LIST          (1 << 10)
  31
  32 /*DMA mode configurations*/
  33 enum intel_mid_dma_mode {
  34         LNW_DMA_PER_TO_MEM = 0, /*periphral to memory configuration*/
  35         LNW_DMA_MEM_TO_PER,     /*memory to periphral configuration*/
  36         LNW_DMA_MEM_TO_MEM,     /*mem to mem confg (testing only)*/
  37 };
  38
  39 /*DMA handshaking*/
  40 enum intel_mid_dma_hs_mode {
  41         LNW_DMA_HW_HS = 0,      /*HW Handshaking only*/
  42         LNW_DMA_SW_HS = 1,      /*SW Handshaking not recommended*/
  43 };
  44
  45 /*Burst size configuration*/
  46 enum intel_mid_dma_msize {
  47         LNW_DMA_MSIZE_1 = 0x0,
  48         LNW_DMA_MSIZE_4 = 0x1,
  49         LNW_DMA_MSIZE_8 = 0x2,
  50         LNW_DMA_MSIZE_16 = 0x3,
  51         LNW_DMA_MSIZE_32 = 0x4,
  52         LNW_DMA_MSIZE_64 = 0x5,
  53 };
  54
  55 /**
  56  * struct intel_mid_dma_slave - DMA slave structure
  57  *
  58  * @dirn: DMA trf direction
  59  * @src_width: tx register width
  60  * @dst_width: rx register width
  61  * @hs_mode: HW/SW handshaking mode
  62  * @cfg_mode: DMA data transfer mode (per-per/mem-per/mem-mem)
  63  * @src_msize: Source DMA burst size
  64  * @dst_msize: Dst DMA burst size
  65  * @per_addr: Periphral address
  66  * @device_instance: DMA peripheral device instance, we can have multiple
  67  *              peripheral device connected to single DMAC
  68  */
  69 struct intel_mid_dma_slave {
  70         enum intel_mid_dma_hs_mode      hs_mode;  /*handshaking*/
  71         enum intel_mid_dma_mode         cfg_mode; /*mode configuration*/
  72         unsigned int            device_instance; /*0, 1 for periphral instance*/
  73         struct dma_slave_config         dma_slave;
  74 };
  75
  76 #endif /*__INTEL_MID_DMA_H__*/