arch/arm/mach-omap2/resource34xx.h

   1 /*
   2  * linux/arch/arm/mach-omap2/resource34xx.h
   3  *
   4  * OMAP3 resource definitions
   5  *
   6  * Copyright (C) 2007-2008 Texas Instruments, Inc.
   7  * Rajendra Nayak <rnayak@ti.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
  14  * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
  15  * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
  16  *
  17  * History:
  18  *
  19  */
  20
  21 #ifndef __ARCH_ARM_MACH_OMAP2_RESOURCE_H
  22 #define __ARCH_ARM_MACH_OMAP2_RESOURCE_H
  23
  24 #include <linux/clk.h>
  25
  26 #include <plat/resource.h>
  27 #include <plat/powerdomain.h>
  28 #include <plat/resource.h>
  29 #include <plat/clock.h>
  30 #include <plat/omap-pm.h>
  31 #include <plat/omap34xx.h>
  32
  33 extern struct omap_opp *curr_vdd1_prcm_set;
  34 extern struct omap_opp *curr_vdd2_prcm_set;
  35 extern unsigned long get_freq(struct  omap_opp *, unsigned short);
  36 extern unsigned short get_opp(struct omap_opp *, unsigned long);
  37 extern int sr_voltagescale_vcbypass(u32 target_opp, u8 vsel);
  38
  39 /*
  40  * mpu_latency/core_latency are used to control the cpuidle C state.
  41  */
  42 void init_latency(struct shared_resource *resp);
  43 int set_latency(struct shared_resource *resp, u32 target_level);
  44
  45 static u8 mpu_qos_req_added;
  46 static u8 core_qos_req_added;
  47
  48 static struct shared_resource_ops lat_res_ops = {
  49         .init           = init_latency,
  50         .change_level   = set_latency,
  51 };
  52
  53 static struct shared_resource mpu_latency = {
  54         .name           = "mpu_latency",
  55         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
  56         .resource_data  = &mpu_qos_req_added,
  57         .ops            = &lat_res_ops,
  58 };
  59
  60 static struct shared_resource core_latency = {
  61         .name           = "core_latency",
  62         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
  63         .resource_data  = &core_qos_req_added,
  64         .ops            = &lat_res_ops,
  65 };
  66
  67 /*
  68  * Power domain Latencies are used to control the target Power
  69  * domain state once all clocks for the power domain
  70  * are released.
  71  */
  72 void init_pd_latency(struct shared_resource *resp);
  73 int set_pd_latency(struct shared_resource *resp, u32 target_level);
  74
  75 /* Power Domain Latency levels */
  76 #define PD_LATENCY_OFF          0x0
  77 #define PD_LATENCY_RET          0x1
  78 #define PD_LATENCY_INACT        0x2
  79 #define PD_LATENCY_ON           0x3
  80
  81 #define PD_LATENCY_MAXLEVEL     0x4
  82
  83 struct pd_latency_db {
  84         char *pwrdm_name;
  85         struct powerdomain *pd;
  86         /* Latencies for each state transition, stored in us */
  87         unsigned long latency[PD_LATENCY_MAXLEVEL];
  88 };
  89
  90 static struct shared_resource_ops pd_lat_res_ops = {
  91         .init           = init_pd_latency,
  92         .change_level   = set_pd_latency,
  93 };
  94
  95 static struct shared_resource core_pwrdm_latency = {
  96         .name           = "core_pwrdm_latency",
  97         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
  98         .resource_data  = &core_qos_req_added,
  99         .ops            = &lat_res_ops,
 100 };
 101
 102 static struct pd_latency_db iva2_pwrdm_lat_db = {
 103         .pwrdm_name = "iva2_pwrdm",
 104         .latency[PD_LATENCY_OFF] = 1100,
 105         .latency[PD_LATENCY_RET] = 350,
 106         .latency[PD_LATENCY_INACT] = -1,
 107         .latency[PD_LATENCY_ON] = 0
 108 };
 109
 110 static struct shared_resource iva2_pwrdm_latency = {
 111         .name           = "iva2_pwrdm_latency",
 112         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 113         .resource_data  = &iva2_pwrdm_lat_db,
 114         .ops            = &pd_lat_res_ops,
 115 };
 116
 117 static struct pd_latency_db gfx_pwrdm_lat_db = {
 118         .pwrdm_name = "gfx_pwrdm",
 119         .latency[PD_LATENCY_OFF] = 1000,
 120         .latency[PD_LATENCY_RET] = 100,
 121         .latency[PD_LATENCY_INACT] = -1,
 122         .latency[PD_LATENCY_ON]  = 0
 123 };
 124
 125 static struct pd_latency_db sgx_pwrdm_lat_db = {
 126         .pwrdm_name = "sgx_pwrdm",
 127         .latency[PD_LATENCY_OFF] = 1000,
 128         .latency[PD_LATENCY_RET] = 100,
 129         .latency[PD_LATENCY_INACT] = -1,
 130         .latency[PD_LATENCY_ON]  = 0
 131 };
 132
 133 static struct shared_resource gfx_pwrdm_latency = {
 134         .name           = "gfx_pwrdm_latency",
 135         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1),
 136         .resource_data  = &gfx_pwrdm_lat_db,
 137         .ops            = &pd_lat_res_ops,
 138 };
 139
 140 static struct shared_resource sgx_pwrdm_latency = {
 141         .name           = "sgx_pwrdm_latency",
 142         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
 143         .resource_data  = &sgx_pwrdm_lat_db,
 144         .ops            = &pd_lat_res_ops,
 145 };
 146
 147 static struct pd_latency_db dss_pwrdm_lat_db = {
 148         .pwrdm_name = "dss_pwrdm",
 149         .latency[PD_LATENCY_OFF] = 70,
 150         .latency[PD_LATENCY_RET] = 20,
 151         .latency[PD_LATENCY_INACT] = -1,
 152         .latency[PD_LATENCY_ON]  = 0
 153 };
 154
 155 static struct shared_resource dss_pwrdm_latency = {
 156         .name           = "dss_pwrdm_latency",
 157         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 158         .resource_data  = &dss_pwrdm_lat_db,
 159         .ops            = &pd_lat_res_ops,
 160 };
 161
 162 static struct pd_latency_db cam_pwrdm_lat_db = {
 163         .pwrdm_name = "cam_pwrdm",
 164         .latency[PD_LATENCY_OFF] = 850,
 165         .latency[PD_LATENCY_RET] = 35,
 166         .latency[PD_LATENCY_INACT] = -1,
 167         .latency[PD_LATENCY_ON]  = 0
 168 };
 169
 170 static struct shared_resource cam_pwrdm_latency = {
 171         .name           = "cam_pwrdm_latency",
 172         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 173         .resource_data  = &cam_pwrdm_lat_db,
 174         .ops            = &pd_lat_res_ops,
 175 };
 176
 177 static struct pd_latency_db per_pwrdm_lat_db = {
 178         .pwrdm_name = "per_pwrdm",
 179         .latency[PD_LATENCY_OFF] = 200,
 180         .latency[PD_LATENCY_RET] = 110,
 181         .latency[PD_LATENCY_INACT] = -1,
 182         .latency[PD_LATENCY_ON]  = 0
 183 };
 184
 185 static struct shared_resource per_pwrdm_latency = {
 186         .name           = "per_pwrdm_latency",
 187         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 188         .resource_data  = &per_pwrdm_lat_db,
 189         .ops            = &pd_lat_res_ops,
 190 };
 191
 192 static struct pd_latency_db neon_pwrdm_lat_db = {
 193         .pwrdm_name = "neon_pwrdm",
 194         .latency[PD_LATENCY_OFF] = 200,
 195         .latency[PD_LATENCY_RET] = 35,
 196         .latency[PD_LATENCY_INACT] = -1,
 197         .latency[PD_LATENCY_ON]  = 0
 198 };
 199
 200 static struct shared_resource neon_pwrdm_latency = {
 201         .name           = "neon_pwrdm_latency",
 202         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 203         .resource_data  = &neon_pwrdm_lat_db,
 204         .ops            = &pd_lat_res_ops,
 205 };
 206
 207 static struct pd_latency_db usbhost_pwrdm_lat_db = {
 208         .pwrdm_name = "usbhost_pwrdm",
 209         .latency[PD_LATENCY_OFF] = 800,
 210         .latency[PD_LATENCY_RET] = 150,
 211         .latency[PD_LATENCY_INACT] = -1,
 212         .latency[PD_LATENCY_ON]  = 0
 213 };
 214
 215 static struct shared_resource usbhost_pwrdm_latency = {
 216         .name           = "usbhost_pwrdm_latency",
 217         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
 218         .resource_data  = &usbhost_pwrdm_lat_db,
 219         .ops            = &pd_lat_res_ops,
 220 };
 221
 222 static struct pd_latency_db emu_pwrdm_lat_db = {
 223         .pwrdm_name = "emu_pwrdm",
 224         .latency[PD_LATENCY_OFF] = 1000,
 225         .latency[PD_LATENCY_RET] = 100,
 226         .latency[PD_LATENCY_INACT] = -1,
 227         .latency[PD_LATENCY_ON]  = 0
 228 };
 229
 230 static struct shared_resource emu_pwrdm_latency = {
 231         .name           = "emu_pwrdm",
 232         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 233         .resource_data  = &emu_pwrdm_lat_db,
 234         .ops            = &pd_lat_res_ops,
 235 };
 236
 237 void init_opp(struct shared_resource *resp);
 238 int set_opp(struct shared_resource *resp, u32 target_level);
 239 int validate_opp(struct shared_resource *resp, u32 target_level);
 240 void init_freq(struct shared_resource *resp);
 241 int set_freq(struct shared_resource *resp, u32 target_level);
 242 int validate_freq(struct shared_resource *resp, u32 target_level);
 243
 244 struct bus_throughput_db {
 245         /* Throughput for each OPP/Freq of the bus */
 246         unsigned long throughput[3];
 247 };
 248
 249 static struct shared_resource_ops opp_res_ops = {
 250         .init           = init_opp,
 251         .change_level   = set_opp,
 252         .validate_level = validate_opp,
 253 };
 254
 255 static struct shared_resource vdd1_opp = {
 256         .name           = "vdd1_opp",
 257         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 258         .ops            = &opp_res_ops,
 259 };
 260
 261 /* Throughput in KiB/s */
 262 static struct bus_throughput_db l3_throughput_db = {
 263         .throughput[0] = 0,
 264         .throughput[1] = 2656000,
 265         .throughput[2] = 5312000,
 266 };
 267
 268 static struct shared_resource vdd2_opp = {
 269         .name           = "vdd2_opp",
 270         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 271         .resource_data  = &l3_throughput_db,
 272         .ops            = &opp_res_ops,
 273 };
 274
 275 static char linked_res[] = "vdd1_opp";
 276
 277 static struct shared_resource_ops freq_res_ops = {
 278         .init           = init_freq,
 279         .change_level   = set_freq,
 280         .validate_level = validate_freq,
 281 };
 282
 283 static struct shared_resource mpu_freq = {
 284         .name           = "mpu_freq",
 285         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 286         .resource_data  = &linked_res,
 287         .ops            = &freq_res_ops,
 288 };
 289
 290 static struct shared_resource dsp_freq = {
 291         .name           = "dsp_freq",
 292         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 293         .resource_data  = &linked_res,
 294         .ops            = &freq_res_ops,
 295 };
 296
 297 struct shared_resource *resources_omap[] __initdata = {
 298         &mpu_latency,
 299         &core_latency,
 300         /* Power Domain Latency resources */
 301         &core_pwrdm_latency,
 302         &iva2_pwrdm_latency,
 303         &gfx_pwrdm_latency,
 304         &sgx_pwrdm_latency,
 305         &dss_pwrdm_latency,
 306         &cam_pwrdm_latency,
 307         &per_pwrdm_latency,
 308         &neon_pwrdm_latency,
 309         &usbhost_pwrdm_latency,
 310         &emu_pwrdm_latency,
 311         /* OPP/frequency resources */
 312         &vdd1_opp,
 313         &vdd2_opp,
 314         &mpu_freq,
 315         &dsp_freq,
 316         NULL
 317 };
 318
 319 #endif /* __ARCH_ARM_MACH_OMAP2_RESOURCE_H */