DaVinci: EDMA: Add queue 2 and 3 for DM365 and DM6467
[linux-ginger.git] / drivers / net / bfin_mac.c
blobc15fc281f79f93cad08aac3dee982194d46a8dfe
1 /*
2 * Blackfin On-Chip MAC Driver
4 * Copyright 2004-2007 Analog Devices Inc.
6 * Enter bugs at http://blackfin.uclinux.org/
8 * Licensed under the GPL-2 or later.
9 */
11 #include <linux/init.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/sched.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/timer.h>
18 #include <linux/errno.h>
19 #include <linux/irq.h>
20 #include <linux/io.h>
21 #include <linux/ioport.h>
22 #include <linux/crc32.h>
23 #include <linux/device.h>
24 #include <linux/spinlock.h>
25 #include <linux/mii.h>
26 #include <linux/phy.h>
27 #include <linux/netdevice.h>
28 #include <linux/etherdevice.h>
29 #include <linux/ethtool.h>
30 #include <linux/skbuff.h>
31 #include <linux/platform_device.h>
33 #include <asm/dma.h>
34 #include <linux/dma-mapping.h>
36 #include <asm/blackfin.h>
37 #include <asm/cacheflush.h>
38 #include <asm/portmux.h>
40 #include "bfin_mac.h"
42 #define DRV_NAME "bfin_mac"
43 #define DRV_VERSION "1.1"
44 #define DRV_AUTHOR "Bryan Wu, Luke Yang"
45 #define DRV_DESC "Blackfin on-chip Ethernet MAC driver"
47 MODULE_AUTHOR(DRV_AUTHOR);
48 MODULE_LICENSE("GPL");
49 MODULE_DESCRIPTION(DRV_DESC);
50 MODULE_ALIAS("platform:bfin_mac");
52 #if defined(CONFIG_BFIN_MAC_USE_L1)
53 # define bfin_mac_alloc(dma_handle, size) l1_data_sram_zalloc(size)
54 # define bfin_mac_free(dma_handle, ptr) l1_data_sram_free(ptr)
55 #else
56 # define bfin_mac_alloc(dma_handle, size) \
57 dma_alloc_coherent(NULL, size, dma_handle, GFP_KERNEL)
58 # define bfin_mac_free(dma_handle, ptr) \
59 dma_free_coherent(NULL, sizeof(*ptr), ptr, dma_handle)
60 #endif
62 #define PKT_BUF_SZ 1580
64 #define MAX_TIMEOUT_CNT 500
66 /* pointers to maintain transmit list */
67 static struct net_dma_desc_tx *tx_list_head;
68 static struct net_dma_desc_tx *tx_list_tail;
69 static struct net_dma_desc_rx *rx_list_head;
70 static struct net_dma_desc_rx *rx_list_tail;
71 static struct net_dma_desc_rx *current_rx_ptr;
72 static struct net_dma_desc_tx *current_tx_ptr;
73 static struct net_dma_desc_tx *tx_desc;
74 static struct net_dma_desc_rx *rx_desc;
76 #if defined(CONFIG_BFIN_MAC_RMII)
77 static u16 pin_req[] = P_RMII0;
78 #else
79 static u16 pin_req[] = P_MII0;
80 #endif
82 static void bfin_mac_disable(void);
83 static void bfin_mac_enable(void);
85 static void desc_list_free(void)
87 struct net_dma_desc_rx *r;
88 struct net_dma_desc_tx *t;
89 int i;
90 #if !defined(CONFIG_BFIN_MAC_USE_L1)
91 dma_addr_t dma_handle = 0;
92 #endif
94 if (tx_desc) {
95 t = tx_list_head;
96 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
97 if (t) {
98 if (t->skb) {
99 dev_kfree_skb(t->skb);
100 t->skb = NULL;
102 t = t->next;
105 bfin_mac_free(dma_handle, tx_desc);
108 if (rx_desc) {
109 r = rx_list_head;
110 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
111 if (r) {
112 if (r->skb) {
113 dev_kfree_skb(r->skb);
114 r->skb = NULL;
116 r = r->next;
119 bfin_mac_free(dma_handle, rx_desc);
123 static int desc_list_init(void)
125 int i;
126 struct sk_buff *new_skb;
127 #if !defined(CONFIG_BFIN_MAC_USE_L1)
129 * This dma_handle is useless in Blackfin dma_alloc_coherent().
130 * The real dma handler is the return value of dma_alloc_coherent().
132 dma_addr_t dma_handle;
133 #endif
135 tx_desc = bfin_mac_alloc(&dma_handle,
136 sizeof(struct net_dma_desc_tx) *
137 CONFIG_BFIN_TX_DESC_NUM);
138 if (tx_desc == NULL)
139 goto init_error;
141 rx_desc = bfin_mac_alloc(&dma_handle,
142 sizeof(struct net_dma_desc_rx) *
143 CONFIG_BFIN_RX_DESC_NUM);
144 if (rx_desc == NULL)
145 goto init_error;
147 /* init tx_list */
148 tx_list_head = tx_list_tail = tx_desc;
150 for (i = 0; i < CONFIG_BFIN_TX_DESC_NUM; i++) {
151 struct net_dma_desc_tx *t = tx_desc + i;
152 struct dma_descriptor *a = &(t->desc_a);
153 struct dma_descriptor *b = &(t->desc_b);
156 * disable DMA
157 * read from memory WNR = 0
158 * wordsize is 32 bits
159 * 6 half words is desc size
160 * large desc flow
162 a->config = WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
163 a->start_addr = (unsigned long)t->packet;
164 a->x_count = 0;
165 a->next_dma_desc = b;
168 * enabled DMA
169 * write to memory WNR = 1
170 * wordsize is 32 bits
171 * disable interrupt
172 * 6 half words is desc size
173 * large desc flow
175 b->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
176 b->start_addr = (unsigned long)(&(t->status));
177 b->x_count = 0;
179 t->skb = NULL;
180 tx_list_tail->desc_b.next_dma_desc = a;
181 tx_list_tail->next = t;
182 tx_list_tail = t;
184 tx_list_tail->next = tx_list_head; /* tx_list is a circle */
185 tx_list_tail->desc_b.next_dma_desc = &(tx_list_head->desc_a);
186 current_tx_ptr = tx_list_head;
188 /* init rx_list */
189 rx_list_head = rx_list_tail = rx_desc;
191 for (i = 0; i < CONFIG_BFIN_RX_DESC_NUM; i++) {
192 struct net_dma_desc_rx *r = rx_desc + i;
193 struct dma_descriptor *a = &(r->desc_a);
194 struct dma_descriptor *b = &(r->desc_b);
196 /* allocate a new skb for next time receive */
197 new_skb = dev_alloc_skb(PKT_BUF_SZ + NET_IP_ALIGN);
198 if (!new_skb) {
199 printk(KERN_NOTICE DRV_NAME
200 ": init: low on mem - packet dropped\n");
201 goto init_error;
203 skb_reserve(new_skb, NET_IP_ALIGN);
204 r->skb = new_skb;
207 * enabled DMA
208 * write to memory WNR = 1
209 * wordsize is 32 bits
210 * disable interrupt
211 * 6 half words is desc size
212 * large desc flow
214 a->config = DMAEN | WNR | WDSIZE_32 | NDSIZE_6 | DMAFLOW_LARGE;
215 /* since RXDWA is enabled */
216 a->start_addr = (unsigned long)new_skb->data - 2;
217 a->x_count = 0;
218 a->next_dma_desc = b;
221 * enabled DMA
222 * write to memory WNR = 1
223 * wordsize is 32 bits
224 * enable interrupt
225 * 6 half words is desc size
226 * large desc flow
228 b->config = DMAEN | WNR | WDSIZE_32 | DI_EN |
229 NDSIZE_6 | DMAFLOW_LARGE;
230 b->start_addr = (unsigned long)(&(r->status));
231 b->x_count = 0;
233 rx_list_tail->desc_b.next_dma_desc = a;
234 rx_list_tail->next = r;
235 rx_list_tail = r;
237 rx_list_tail->next = rx_list_head; /* rx_list is a circle */
238 rx_list_tail->desc_b.next_dma_desc = &(rx_list_head->desc_a);
239 current_rx_ptr = rx_list_head;
241 return 0;
243 init_error:
244 desc_list_free();
245 printk(KERN_ERR DRV_NAME ": kmalloc failed\n");
246 return -ENOMEM;
250 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
253 * MII operations
255 /* Wait until the previous MDC/MDIO transaction has completed */
256 static void bfin_mdio_poll(void)
258 int timeout_cnt = MAX_TIMEOUT_CNT;
260 /* poll the STABUSY bit */
261 while ((bfin_read_EMAC_STAADD()) & STABUSY) {
262 udelay(1);
263 if (timeout_cnt-- < 0) {
264 printk(KERN_ERR DRV_NAME
265 ": wait MDC/MDIO transaction to complete timeout\n");
266 break;
271 /* Read an off-chip register in a PHY through the MDC/MDIO port */
272 static int bfin_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum)
274 bfin_mdio_poll();
276 /* read mode */
277 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
278 SET_REGAD((u16) regnum) |
279 STABUSY);
281 bfin_mdio_poll();
283 return (int) bfin_read_EMAC_STADAT();
286 /* Write an off-chip register in a PHY through the MDC/MDIO port */
287 static int bfin_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum,
288 u16 value)
290 bfin_mdio_poll();
292 bfin_write_EMAC_STADAT((u32) value);
294 /* write mode */
295 bfin_write_EMAC_STAADD(SET_PHYAD((u16) phy_addr) |
296 SET_REGAD((u16) regnum) |
297 STAOP |
298 STABUSY);
300 bfin_mdio_poll();
302 return 0;
305 static int bfin_mdiobus_reset(struct mii_bus *bus)
307 return 0;
310 static void bfin_mac_adjust_link(struct net_device *dev)
312 struct bfin_mac_local *lp = netdev_priv(dev);
313 struct phy_device *phydev = lp->phydev;
314 unsigned long flags;
315 int new_state = 0;
317 spin_lock_irqsave(&lp->lock, flags);
318 if (phydev->link) {
319 /* Now we make sure that we can be in full duplex mode.
320 * If not, we operate in half-duplex mode. */
321 if (phydev->duplex != lp->old_duplex) {
322 u32 opmode = bfin_read_EMAC_OPMODE();
323 new_state = 1;
325 if (phydev->duplex)
326 opmode |= FDMODE;
327 else
328 opmode &= ~(FDMODE);
330 bfin_write_EMAC_OPMODE(opmode);
331 lp->old_duplex = phydev->duplex;
334 if (phydev->speed != lp->old_speed) {
335 #if defined(CONFIG_BFIN_MAC_RMII)
336 u32 opmode = bfin_read_EMAC_OPMODE();
337 switch (phydev->speed) {
338 case 10:
339 opmode |= RMII_10;
340 break;
341 case 100:
342 opmode &= ~(RMII_10);
343 break;
344 default:
345 printk(KERN_WARNING
346 "%s: Ack! Speed (%d) is not 10/100!\n",
347 DRV_NAME, phydev->speed);
348 break;
350 bfin_write_EMAC_OPMODE(opmode);
351 #endif
353 new_state = 1;
354 lp->old_speed = phydev->speed;
357 if (!lp->old_link) {
358 new_state = 1;
359 lp->old_link = 1;
361 } else if (lp->old_link) {
362 new_state = 1;
363 lp->old_link = 0;
364 lp->old_speed = 0;
365 lp->old_duplex = -1;
368 if (new_state) {
369 u32 opmode = bfin_read_EMAC_OPMODE();
370 phy_print_status(phydev);
371 pr_debug("EMAC_OPMODE = 0x%08x\n", opmode);
374 spin_unlock_irqrestore(&lp->lock, flags);
377 /* MDC = 2.5 MHz */
378 #define MDC_CLK 2500000
380 static int mii_probe(struct net_device *dev)
382 struct bfin_mac_local *lp = netdev_priv(dev);
383 struct phy_device *phydev = NULL;
384 unsigned short sysctl;
385 int i;
386 u32 sclk, mdc_div;
388 /* Enable PHY output early */
389 if (!(bfin_read_VR_CTL() & PHYCLKOE))
390 bfin_write_VR_CTL(bfin_read_VR_CTL() | PHYCLKOE);
392 sclk = get_sclk();
393 mdc_div = ((sclk / MDC_CLK) / 2) - 1;
395 sysctl = bfin_read_EMAC_SYSCTL();
396 sysctl = (sysctl & ~MDCDIV) | SET_MDCDIV(mdc_div);
397 bfin_write_EMAC_SYSCTL(sysctl);
399 /* search for connect PHY device */
400 for (i = 0; i < PHY_MAX_ADDR; i++) {
401 struct phy_device *const tmp_phydev = lp->mii_bus->phy_map[i];
403 if (!tmp_phydev)
404 continue; /* no PHY here... */
406 phydev = tmp_phydev;
407 break; /* found it */
410 /* now we are supposed to have a proper phydev, to attach to... */
411 if (!phydev) {
412 printk(KERN_INFO "%s: Don't found any phy device at all\n",
413 dev->name);
414 return -ENODEV;
417 #if defined(CONFIG_BFIN_MAC_RMII)
418 phydev = phy_connect(dev, dev_name(&phydev->dev), &bfin_mac_adjust_link,
419 0, PHY_INTERFACE_MODE_RMII);
420 #else
421 phydev = phy_connect(dev, dev_name(&phydev->dev), &bfin_mac_adjust_link,
422 0, PHY_INTERFACE_MODE_MII);
423 #endif
425 if (IS_ERR(phydev)) {
426 printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name);
427 return PTR_ERR(phydev);
430 /* mask with MAC supported features */
431 phydev->supported &= (SUPPORTED_10baseT_Half
432 | SUPPORTED_10baseT_Full
433 | SUPPORTED_100baseT_Half
434 | SUPPORTED_100baseT_Full
435 | SUPPORTED_Autoneg
436 | SUPPORTED_Pause | SUPPORTED_Asym_Pause
437 | SUPPORTED_MII
438 | SUPPORTED_TP);
440 phydev->advertising = phydev->supported;
442 lp->old_link = 0;
443 lp->old_speed = 0;
444 lp->old_duplex = -1;
445 lp->phydev = phydev;
447 printk(KERN_INFO "%s: attached PHY driver [%s] "
448 "(mii_bus:phy_addr=%s, irq=%d, mdc_clk=%dHz(mdc_div=%d)"
449 "@sclk=%dMHz)\n",
450 DRV_NAME, phydev->drv->name, dev_name(&phydev->dev), phydev->irq,
451 MDC_CLK, mdc_div, sclk/1000000);
453 return 0;
457 * Ethtool support
460 static int
461 bfin_mac_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
463 struct bfin_mac_local *lp = netdev_priv(dev);
465 if (lp->phydev)
466 return phy_ethtool_gset(lp->phydev, cmd);
468 return -EINVAL;
471 static int
472 bfin_mac_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
474 struct bfin_mac_local *lp = netdev_priv(dev);
476 if (!capable(CAP_NET_ADMIN))
477 return -EPERM;
479 if (lp->phydev)
480 return phy_ethtool_sset(lp->phydev, cmd);
482 return -EINVAL;
485 static void bfin_mac_ethtool_getdrvinfo(struct net_device *dev,
486 struct ethtool_drvinfo *info)
488 strcpy(info->driver, DRV_NAME);
489 strcpy(info->version, DRV_VERSION);
490 strcpy(info->fw_version, "N/A");
491 strcpy(info->bus_info, dev_name(&dev->dev));
494 static struct ethtool_ops bfin_mac_ethtool_ops = {
495 .get_settings = bfin_mac_ethtool_getsettings,
496 .set_settings = bfin_mac_ethtool_setsettings,
497 .get_link = ethtool_op_get_link,
498 .get_drvinfo = bfin_mac_ethtool_getdrvinfo,
501 /**************************************************************************/
502 void setup_system_regs(struct net_device *dev)
504 unsigned short sysctl;
507 * Odd word alignment for Receive Frame DMA word
508 * Configure checksum support and rcve frame word alignment
510 sysctl = bfin_read_EMAC_SYSCTL();
511 #if defined(BFIN_MAC_CSUM_OFFLOAD)
512 sysctl |= RXDWA | RXCKS;
513 #else
514 sysctl |= RXDWA;
515 #endif
516 bfin_write_EMAC_SYSCTL(sysctl);
518 bfin_write_EMAC_MMC_CTL(RSTC | CROLL);
520 /* Initialize the TX DMA channel registers */
521 bfin_write_DMA2_X_COUNT(0);
522 bfin_write_DMA2_X_MODIFY(4);
523 bfin_write_DMA2_Y_COUNT(0);
524 bfin_write_DMA2_Y_MODIFY(0);
526 /* Initialize the RX DMA channel registers */
527 bfin_write_DMA1_X_COUNT(0);
528 bfin_write_DMA1_X_MODIFY(4);
529 bfin_write_DMA1_Y_COUNT(0);
530 bfin_write_DMA1_Y_MODIFY(0);
533 static void setup_mac_addr(u8 *mac_addr)
535 u32 addr_low = le32_to_cpu(*(__le32 *) & mac_addr[0]);
536 u16 addr_hi = le16_to_cpu(*(__le16 *) & mac_addr[4]);
538 /* this depends on a little-endian machine */
539 bfin_write_EMAC_ADDRLO(addr_low);
540 bfin_write_EMAC_ADDRHI(addr_hi);
543 static int bfin_mac_set_mac_address(struct net_device *dev, void *p)
545 struct sockaddr *addr = p;
546 if (netif_running(dev))
547 return -EBUSY;
548 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
549 setup_mac_addr(dev->dev_addr);
550 return 0;
553 static void adjust_tx_list(void)
555 int timeout_cnt = MAX_TIMEOUT_CNT;
557 if (tx_list_head->status.status_word != 0
558 && current_tx_ptr != tx_list_head) {
559 goto adjust_head; /* released something, just return; */
563 * if nothing released, check wait condition
564 * current's next can not be the head,
565 * otherwise the dma will not stop as we want
567 if (current_tx_ptr->next->next == tx_list_head) {
568 while (tx_list_head->status.status_word == 0) {
569 udelay(10);
570 if (tx_list_head->status.status_word != 0
571 || !(bfin_read_DMA2_IRQ_STATUS() & DMA_RUN)) {
572 goto adjust_head;
574 if (timeout_cnt-- < 0) {
575 printk(KERN_ERR DRV_NAME
576 ": wait for adjust tx list head timeout\n");
577 break;
580 if (tx_list_head->status.status_word != 0) {
581 goto adjust_head;
585 return;
587 adjust_head:
588 do {
589 tx_list_head->desc_a.config &= ~DMAEN;
590 tx_list_head->status.status_word = 0;
591 if (tx_list_head->skb) {
592 dev_kfree_skb(tx_list_head->skb);
593 tx_list_head->skb = NULL;
594 } else {
595 printk(KERN_ERR DRV_NAME
596 ": no sk_buff in a transmitted frame!\n");
598 tx_list_head = tx_list_head->next;
599 } while (tx_list_head->status.status_word != 0
600 && current_tx_ptr != tx_list_head);
601 return;
605 static int bfin_mac_hard_start_xmit(struct sk_buff *skb,
606 struct net_device *dev)
608 u16 *data;
609 u32 data_align = (unsigned long)(skb->data) & 0x3;
610 current_tx_ptr->skb = skb;
612 if (data_align == 0x2) {
613 /* move skb->data to current_tx_ptr payload */
614 data = (u16 *)(skb->data) - 1;
615 *data = (u16)(skb->len);
616 current_tx_ptr->desc_a.start_addr = (u32)data;
617 /* this is important! */
618 blackfin_dcache_flush_range((u32)data,
619 (u32)((u8 *)data + skb->len + 4));
620 } else {
621 *((u16 *)(current_tx_ptr->packet)) = (u16)(skb->len);
622 memcpy((u8 *)(current_tx_ptr->packet + 2), skb->data,
623 skb->len);
624 current_tx_ptr->desc_a.start_addr =
625 (u32)current_tx_ptr->packet;
626 if (current_tx_ptr->status.status_word != 0)
627 current_tx_ptr->status.status_word = 0;
628 blackfin_dcache_flush_range(
629 (u32)current_tx_ptr->packet,
630 (u32)(current_tx_ptr->packet + skb->len + 2));
633 /* make sure the internal data buffers in the core are drained
634 * so that the DMA descriptors are completely written when the
635 * DMA engine goes to fetch them below
637 SSYNC();
639 /* enable this packet's dma */
640 current_tx_ptr->desc_a.config |= DMAEN;
642 /* tx dma is running, just return */
643 if (bfin_read_DMA2_IRQ_STATUS() & DMA_RUN)
644 goto out;
646 /* tx dma is not running */
647 bfin_write_DMA2_NEXT_DESC_PTR(&(current_tx_ptr->desc_a));
648 /* dma enabled, read from memory, size is 6 */
649 bfin_write_DMA2_CONFIG(current_tx_ptr->desc_a.config);
650 /* Turn on the EMAC tx */
651 bfin_write_EMAC_OPMODE(bfin_read_EMAC_OPMODE() | TE);
653 out:
654 adjust_tx_list();
655 current_tx_ptr = current_tx_ptr->next;
656 dev->trans_start = jiffies;
657 dev->stats.tx_packets++;
658 dev->stats.tx_bytes += (skb->len);
659 return 0;
662 static void bfin_mac_rx(struct net_device *dev)
664 struct sk_buff *skb, *new_skb;
665 unsigned short len;
667 /* allocate a new skb for next time receive */
668 skb = current_rx_ptr->skb;
669 new_skb = dev_alloc_skb(PKT_BUF_SZ + NET_IP_ALIGN);
670 if (!new_skb) {
671 printk(KERN_NOTICE DRV_NAME
672 ": rx: low on mem - packet dropped\n");
673 dev->stats.rx_dropped++;
674 goto out;
676 /* reserve 2 bytes for RXDWA padding */
677 skb_reserve(new_skb, NET_IP_ALIGN);
678 current_rx_ptr->skb = new_skb;
679 current_rx_ptr->desc_a.start_addr = (unsigned long)new_skb->data - 2;
681 /* Invidate the data cache of skb->data range when it is write back
682 * cache. It will prevent overwritting the new data from DMA
684 blackfin_dcache_invalidate_range((unsigned long)new_skb->head,
685 (unsigned long)new_skb->end);
687 len = (unsigned short)((current_rx_ptr->status.status_word) & RX_FRLEN);
688 skb_put(skb, len);
689 blackfin_dcache_invalidate_range((unsigned long)skb->head,
690 (unsigned long)skb->tail);
692 skb->protocol = eth_type_trans(skb, dev);
693 #if defined(BFIN_MAC_CSUM_OFFLOAD)
694 skb->csum = current_rx_ptr->status.ip_payload_csum;
695 skb->ip_summed = CHECKSUM_COMPLETE;
696 #endif
698 netif_rx(skb);
699 dev->stats.rx_packets++;
700 dev->stats.rx_bytes += len;
701 current_rx_ptr->status.status_word = 0x00000000;
702 current_rx_ptr = current_rx_ptr->next;
704 out:
705 return;
708 /* interrupt routine to handle rx and error signal */
709 static irqreturn_t bfin_mac_interrupt(int irq, void *dev_id)
711 struct net_device *dev = dev_id;
712 int number = 0;
714 get_one_packet:
715 if (current_rx_ptr->status.status_word == 0) {
716 /* no more new packet received */
717 if (number == 0) {
718 if (current_rx_ptr->next->status.status_word != 0) {
719 current_rx_ptr = current_rx_ptr->next;
720 goto real_rx;
723 bfin_write_DMA1_IRQ_STATUS(bfin_read_DMA1_IRQ_STATUS() |
724 DMA_DONE | DMA_ERR);
725 return IRQ_HANDLED;
728 real_rx:
729 bfin_mac_rx(dev);
730 number++;
731 goto get_one_packet;
734 #ifdef CONFIG_NET_POLL_CONTROLLER
735 static void bfin_mac_poll(struct net_device *dev)
737 disable_irq(IRQ_MAC_RX);
738 bfin_mac_interrupt(IRQ_MAC_RX, dev);
739 enable_irq(IRQ_MAC_RX);
741 #endif /* CONFIG_NET_POLL_CONTROLLER */
743 static void bfin_mac_disable(void)
745 unsigned int opmode;
747 opmode = bfin_read_EMAC_OPMODE();
748 opmode &= (~RE);
749 opmode &= (~TE);
750 /* Turn off the EMAC */
751 bfin_write_EMAC_OPMODE(opmode);
755 * Enable Interrupts, Receive, and Transmit
757 static void bfin_mac_enable(void)
759 u32 opmode;
761 pr_debug("%s: %s\n", DRV_NAME, __func__);
763 /* Set RX DMA */
764 bfin_write_DMA1_NEXT_DESC_PTR(&(rx_list_head->desc_a));
765 bfin_write_DMA1_CONFIG(rx_list_head->desc_a.config);
767 /* Wait MII done */
768 bfin_mdio_poll();
770 /* We enable only RX here */
771 /* ASTP : Enable Automatic Pad Stripping
772 PR : Promiscuous Mode for test
773 PSF : Receive frames with total length less than 64 bytes.
774 FDMODE : Full Duplex Mode
775 LB : Internal Loopback for test
776 RE : Receiver Enable */
777 opmode = bfin_read_EMAC_OPMODE();
778 if (opmode & FDMODE)
779 opmode |= PSF;
780 else
781 opmode |= DRO | DC | PSF;
782 opmode |= RE;
784 #if defined(CONFIG_BFIN_MAC_RMII)
785 opmode |= RMII; /* For Now only 100MBit are supported */
786 #if (defined(CONFIG_BF537) || defined(CONFIG_BF536)) && CONFIG_BF_REV_0_2
787 opmode |= TE;
788 #endif
789 #endif
790 /* Turn on the EMAC rx */
791 bfin_write_EMAC_OPMODE(opmode);
794 /* Our watchdog timed out. Called by the networking layer */
795 static void bfin_mac_timeout(struct net_device *dev)
797 pr_debug("%s: %s\n", dev->name, __func__);
799 bfin_mac_disable();
801 /* reset tx queue */
802 tx_list_tail = tx_list_head->next;
804 bfin_mac_enable();
806 /* We can accept TX packets again */
807 dev->trans_start = jiffies;
808 netif_wake_queue(dev);
811 static void bfin_mac_multicast_hash(struct net_device *dev)
813 u32 emac_hashhi, emac_hashlo;
814 struct dev_mc_list *dmi = dev->mc_list;
815 char *addrs;
816 int i;
817 u32 crc;
819 emac_hashhi = emac_hashlo = 0;
821 for (i = 0; i < dev->mc_count; i++) {
822 addrs = dmi->dmi_addr;
823 dmi = dmi->next;
825 /* skip non-multicast addresses */
826 if (!(*addrs & 1))
827 continue;
829 crc = ether_crc(ETH_ALEN, addrs);
830 crc >>= 26;
832 if (crc & 0x20)
833 emac_hashhi |= 1 << (crc & 0x1f);
834 else
835 emac_hashlo |= 1 << (crc & 0x1f);
838 bfin_write_EMAC_HASHHI(emac_hashhi);
839 bfin_write_EMAC_HASHLO(emac_hashlo);
841 return;
845 * This routine will, depending on the values passed to it,
846 * either make it accept multicast packets, go into
847 * promiscuous mode (for TCPDUMP and cousins) or accept
848 * a select set of multicast packets
850 static void bfin_mac_set_multicast_list(struct net_device *dev)
852 u32 sysctl;
854 if (dev->flags & IFF_PROMISC) {
855 printk(KERN_INFO "%s: set to promisc mode\n", dev->name);
856 sysctl = bfin_read_EMAC_OPMODE();
857 sysctl |= RAF;
858 bfin_write_EMAC_OPMODE(sysctl);
859 } else if (dev->flags & IFF_ALLMULTI) {
860 /* accept all multicast */
861 sysctl = bfin_read_EMAC_OPMODE();
862 sysctl |= PAM;
863 bfin_write_EMAC_OPMODE(sysctl);
864 } else if (dev->mc_count) {
865 /* set up multicast hash table */
866 sysctl = bfin_read_EMAC_OPMODE();
867 sysctl |= HM;
868 bfin_write_EMAC_OPMODE(sysctl);
869 bfin_mac_multicast_hash(dev);
870 } else {
871 /* clear promisc or multicast mode */
872 sysctl = bfin_read_EMAC_OPMODE();
873 sysctl &= ~(RAF | PAM);
874 bfin_write_EMAC_OPMODE(sysctl);
879 * this puts the device in an inactive state
881 static void bfin_mac_shutdown(struct net_device *dev)
883 /* Turn off the EMAC */
884 bfin_write_EMAC_OPMODE(0x00000000);
885 /* Turn off the EMAC RX DMA */
886 bfin_write_DMA1_CONFIG(0x0000);
887 bfin_write_DMA2_CONFIG(0x0000);
891 * Open and Initialize the interface
893 * Set up everything, reset the card, etc..
895 static int bfin_mac_open(struct net_device *dev)
897 struct bfin_mac_local *lp = netdev_priv(dev);
898 int retval;
899 pr_debug("%s: %s\n", dev->name, __func__);
902 * Check that the address is valid. If its not, refuse
903 * to bring the device up. The user must specify an
904 * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
906 if (!is_valid_ether_addr(dev->dev_addr)) {
907 printk(KERN_WARNING DRV_NAME ": no valid ethernet hw addr\n");
908 return -EINVAL;
911 /* initial rx and tx list */
912 retval = desc_list_init();
914 if (retval)
915 return retval;
917 phy_start(lp->phydev);
918 phy_write(lp->phydev, MII_BMCR, BMCR_RESET);
919 setup_system_regs(dev);
920 setup_mac_addr(dev->dev_addr);
921 bfin_mac_disable();
922 bfin_mac_enable();
923 pr_debug("hardware init finished\n");
924 netif_start_queue(dev);
925 netif_carrier_on(dev);
927 return 0;
931 * this makes the board clean up everything that it can
932 * and not talk to the outside world. Caused by
933 * an 'ifconfig ethX down'
935 static int bfin_mac_close(struct net_device *dev)
937 struct bfin_mac_local *lp = netdev_priv(dev);
938 pr_debug("%s: %s\n", dev->name, __func__);
940 netif_stop_queue(dev);
941 netif_carrier_off(dev);
943 phy_stop(lp->phydev);
944 phy_write(lp->phydev, MII_BMCR, BMCR_PDOWN);
946 /* clear everything */
947 bfin_mac_shutdown(dev);
949 /* free the rx/tx buffers */
950 desc_list_free();
952 return 0;
955 static const struct net_device_ops bfin_mac_netdev_ops = {
956 .ndo_open = bfin_mac_open,
957 .ndo_stop = bfin_mac_close,
958 .ndo_start_xmit = bfin_mac_hard_start_xmit,
959 .ndo_set_mac_address = bfin_mac_set_mac_address,
960 .ndo_tx_timeout = bfin_mac_timeout,
961 .ndo_set_multicast_list = bfin_mac_set_multicast_list,
962 .ndo_validate_addr = eth_validate_addr,
963 .ndo_change_mtu = eth_change_mtu,
964 #ifdef CONFIG_NET_POLL_CONTROLLER
965 .ndo_poll_controller = bfin_mac_poll,
966 #endif
969 static int __devinit bfin_mac_probe(struct platform_device *pdev)
971 struct net_device *ndev;
972 struct bfin_mac_local *lp;
973 struct platform_device *pd;
974 int rc;
976 ndev = alloc_etherdev(sizeof(struct bfin_mac_local));
977 if (!ndev) {
978 dev_err(&pdev->dev, "Cannot allocate net device!\n");
979 return -ENOMEM;
982 SET_NETDEV_DEV(ndev, &pdev->dev);
983 platform_set_drvdata(pdev, ndev);
984 lp = netdev_priv(ndev);
986 /* Grab the MAC address in the MAC */
987 *(__le32 *) (&(ndev->dev_addr[0])) = cpu_to_le32(bfin_read_EMAC_ADDRLO());
988 *(__le16 *) (&(ndev->dev_addr[4])) = cpu_to_le16((u16) bfin_read_EMAC_ADDRHI());
990 /* probe mac */
991 /*todo: how to proble? which is revision_register */
992 bfin_write_EMAC_ADDRLO(0x12345678);
993 if (bfin_read_EMAC_ADDRLO() != 0x12345678) {
994 dev_err(&pdev->dev, "Cannot detect Blackfin on-chip ethernet MAC controller!\n");
995 rc = -ENODEV;
996 goto out_err_probe_mac;
1001 * Is it valid? (Did bootloader initialize it?)
1002 * Grab the MAC from the board somehow
1003 * this is done in the arch/blackfin/mach-bfxxx/boards/eth_mac.c
1005 if (!is_valid_ether_addr(ndev->dev_addr))
1006 bfin_get_ether_addr(ndev->dev_addr);
1008 /* If still not valid, get a random one */
1009 if (!is_valid_ether_addr(ndev->dev_addr))
1010 random_ether_addr(ndev->dev_addr);
1012 setup_mac_addr(ndev->dev_addr);
1014 if (!pdev->dev.platform_data) {
1015 dev_err(&pdev->dev, "Cannot get platform device bfin_mii_bus!\n");
1016 rc = -ENODEV;
1017 goto out_err_probe_mac;
1019 pd = pdev->dev.platform_data;
1020 lp->mii_bus = platform_get_drvdata(pd);
1021 lp->mii_bus->priv = ndev;
1023 rc = mii_probe(ndev);
1024 if (rc) {
1025 dev_err(&pdev->dev, "MII Probe failed!\n");
1026 goto out_err_mii_probe;
1029 /* Fill in the fields of the device structure with ethernet values. */
1030 ether_setup(ndev);
1032 ndev->netdev_ops = &bfin_mac_netdev_ops;
1033 ndev->ethtool_ops = &bfin_mac_ethtool_ops;
1035 spin_lock_init(&lp->lock);
1037 /* now, enable interrupts */
1038 /* register irq handler */
1039 rc = request_irq(IRQ_MAC_RX, bfin_mac_interrupt,
1040 IRQF_DISABLED, "EMAC_RX", ndev);
1041 if (rc) {
1042 dev_err(&pdev->dev, "Cannot request Blackfin MAC RX IRQ!\n");
1043 rc = -EBUSY;
1044 goto out_err_request_irq;
1047 rc = register_netdev(ndev);
1048 if (rc) {
1049 dev_err(&pdev->dev, "Cannot register net device!\n");
1050 goto out_err_reg_ndev;
1053 /* now, print out the card info, in a short format.. */
1054 dev_info(&pdev->dev, "%s, Version %s\n", DRV_DESC, DRV_VERSION);
1056 return 0;
1058 out_err_reg_ndev:
1059 free_irq(IRQ_MAC_RX, ndev);
1060 out_err_request_irq:
1061 out_err_mii_probe:
1062 mdiobus_unregister(lp->mii_bus);
1063 mdiobus_free(lp->mii_bus);
1064 peripheral_free_list(pin_req);
1065 out_err_probe_mac:
1066 platform_set_drvdata(pdev, NULL);
1067 free_netdev(ndev);
1069 return rc;
1072 static int __devexit bfin_mac_remove(struct platform_device *pdev)
1074 struct net_device *ndev = platform_get_drvdata(pdev);
1075 struct bfin_mac_local *lp = netdev_priv(ndev);
1077 platform_set_drvdata(pdev, NULL);
1079 lp->mii_bus->priv = NULL;
1081 unregister_netdev(ndev);
1083 free_irq(IRQ_MAC_RX, ndev);
1085 free_netdev(ndev);
1087 peripheral_free_list(pin_req);
1089 return 0;
1092 #ifdef CONFIG_PM
1093 static int bfin_mac_suspend(struct platform_device *pdev, pm_message_t mesg)
1095 struct net_device *net_dev = platform_get_drvdata(pdev);
1097 if (netif_running(net_dev))
1098 bfin_mac_close(net_dev);
1100 return 0;
1103 static int bfin_mac_resume(struct platform_device *pdev)
1105 struct net_device *net_dev = platform_get_drvdata(pdev);
1107 if (netif_running(net_dev))
1108 bfin_mac_open(net_dev);
1110 return 0;
1112 #else
1113 #define bfin_mac_suspend NULL
1114 #define bfin_mac_resume NULL
1115 #endif /* CONFIG_PM */
1117 static int __devinit bfin_mii_bus_probe(struct platform_device *pdev)
1119 struct mii_bus *miibus;
1120 int rc, i;
1123 * We are setting up a network card,
1124 * so set the GPIO pins to Ethernet mode
1126 rc = peripheral_request_list(pin_req, DRV_NAME);
1127 if (rc) {
1128 dev_err(&pdev->dev, "Requesting peripherals failed!\n");
1129 return rc;
1132 rc = -ENOMEM;
1133 miibus = mdiobus_alloc();
1134 if (miibus == NULL)
1135 goto out_err_alloc;
1136 miibus->read = bfin_mdiobus_read;
1137 miibus->write = bfin_mdiobus_write;
1138 miibus->reset = bfin_mdiobus_reset;
1140 miibus->parent = &pdev->dev;
1141 miibus->name = "bfin_mii_bus";
1142 snprintf(miibus->id, MII_BUS_ID_SIZE, "0");
1143 miibus->irq = kmalloc(sizeof(int)*PHY_MAX_ADDR, GFP_KERNEL);
1144 if (miibus->irq == NULL)
1145 goto out_err_alloc;
1146 for (i = 0; i < PHY_MAX_ADDR; ++i)
1147 miibus->irq[i] = PHY_POLL;
1149 rc = mdiobus_register(miibus);
1150 if (rc) {
1151 dev_err(&pdev->dev, "Cannot register MDIO bus!\n");
1152 goto out_err_mdiobus_register;
1155 platform_set_drvdata(pdev, miibus);
1156 return 0;
1158 out_err_mdiobus_register:
1159 mdiobus_free(miibus);
1160 out_err_alloc:
1161 peripheral_free_list(pin_req);
1163 return rc;
1166 static int __devexit bfin_mii_bus_remove(struct platform_device *pdev)
1168 struct mii_bus *miibus = platform_get_drvdata(pdev);
1169 platform_set_drvdata(pdev, NULL);
1170 mdiobus_unregister(miibus);
1171 mdiobus_free(miibus);
1172 peripheral_free_list(pin_req);
1173 return 0;
1176 static struct platform_driver bfin_mii_bus_driver = {
1177 .probe = bfin_mii_bus_probe,
1178 .remove = __devexit_p(bfin_mii_bus_remove),
1179 .driver = {
1180 .name = "bfin_mii_bus",
1181 .owner = THIS_MODULE,
1185 static struct platform_driver bfin_mac_driver = {
1186 .probe = bfin_mac_probe,
1187 .remove = __devexit_p(bfin_mac_remove),
1188 .resume = bfin_mac_resume,
1189 .suspend = bfin_mac_suspend,
1190 .driver = {
1191 .name = DRV_NAME,
1192 .owner = THIS_MODULE,
1196 static int __init bfin_mac_init(void)
1198 int ret;
1199 ret = platform_driver_register(&bfin_mii_bus_driver);
1200 if (!ret)
1201 return platform_driver_register(&bfin_mac_driver);
1202 return -ENODEV;
1205 module_init(bfin_mac_init);
1207 static void __exit bfin_mac_cleanup(void)
1209 platform_driver_unregister(&bfin_mac_driver);
1210 platform_driver_unregister(&bfin_mii_bus_driver);
1213 module_exit(bfin_mac_cleanup);