DaVinci: EDMA: Add queue 2 and 3 for DM365 and DM6467
[linux-ginger.git] / drivers / net / ibmveth.h
blobec76ace66c6b64520f2a3e4ac9d2f88ad29f88e5
1 /**************************************************************************/
2 /* */
3 /* IBM eServer i/[Series Virtual Ethernet Device Driver */
4 /* Copyright (C) 2003 IBM Corp. */
5 /* Dave Larson (larson1@us.ibm.com) */
6 /* Santiago Leon (santil@us.ibm.com) */
7 /* */
8 /* This program is free software; you can redistribute it and/or modify */
9 /* it under the terms of the GNU General Public License as published by */
10 /* the Free Software Foundation; either version 2 of the License, or */
11 /* (at your option) any later version. */
12 /* */
13 /* This program is distributed in the hope that it will be useful, */
14 /* but WITHOUT ANY WARRANTY; without even the implied warranty of */
15 /* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the */
16 /* GNU General Public License for more details. */
17 /* */
18 /* You should have received a copy of the GNU General Public License */
19 /* along with this program; if not, write to the Free Software */
20 /* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 */
21 /* USA */
22 /* */
23 /**************************************************************************/
25 #ifndef _IBMVETH_H
26 #define _IBMVETH_H
28 /* constants for H_MULTICAST_CTRL */
29 #define IbmVethMcastReceptionModifyBit 0x80000UL
30 #define IbmVethMcastReceptionEnableBit 0x20000UL
31 #define IbmVethMcastFilterModifyBit 0x40000UL
32 #define IbmVethMcastFilterEnableBit 0x10000UL
34 #define IbmVethMcastEnableRecv (IbmVethMcastReceptionModifyBit | IbmVethMcastReceptionEnableBit)
35 #define IbmVethMcastDisableRecv (IbmVethMcastReceptionModifyBit)
36 #define IbmVethMcastEnableFiltering (IbmVethMcastFilterModifyBit | IbmVethMcastFilterEnableBit)
37 #define IbmVethMcastDisableFiltering (IbmVethMcastFilterModifyBit)
38 #define IbmVethMcastAddFilter 0x1UL
39 #define IbmVethMcastRemoveFilter 0x2UL
40 #define IbmVethMcastClearFilterTable 0x3UL
42 #define IBMVETH_ILLAN_PADDED_PKT_CSUM 0x0000000000002000UL
43 #define IBMVETH_ILLAN_TRUNK_PRI_MASK 0x0000000000000F00UL
44 #define IBMVETH_ILLAN_IPV6_TCP_CSUM 0x0000000000000004UL
45 #define IBMVETH_ILLAN_IPV4_TCP_CSUM 0x0000000000000002UL
46 #define IBMVETH_ILLAN_ACTIVE_TRUNK 0x0000000000000001UL
48 /* hcall macros */
49 #define h_register_logical_lan(ua, buflst, rxq, fltlst, mac) \
50 plpar_hcall_norets(H_REGISTER_LOGICAL_LAN, ua, buflst, rxq, fltlst, mac)
52 #define h_free_logical_lan(ua) \
53 plpar_hcall_norets(H_FREE_LOGICAL_LAN, ua)
55 #define h_add_logical_lan_buffer(ua, buf) \
56 plpar_hcall_norets(H_ADD_LOGICAL_LAN_BUFFER, ua, buf)
58 static inline long h_send_logical_lan(unsigned long unit_address,
59 unsigned long desc1, unsigned long desc2, unsigned long desc3,
60 unsigned long desc4, unsigned long desc5, unsigned long desc6,
61 unsigned long corellator_in, unsigned long *corellator_out)
63 long rc;
64 unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];
66 rc = plpar_hcall9(H_SEND_LOGICAL_LAN, retbuf, unit_address, desc1,
67 desc2, desc3, desc4, desc5, desc6, corellator_in);
69 *corellator_out = retbuf[0];
71 return rc;
74 static inline long h_illan_attributes(unsigned long unit_address,
75 unsigned long reset_mask, unsigned long set_mask,
76 unsigned long *ret_attributes)
78 long rc;
79 unsigned long retbuf[PLPAR_HCALL_BUFSIZE];
81 rc = plpar_hcall(H_ILLAN_ATTRIBUTES, retbuf, unit_address,
82 reset_mask, set_mask);
84 *ret_attributes = retbuf[0];
86 return rc;
89 #define h_multicast_ctrl(ua, cmd, mac) \
90 plpar_hcall_norets(H_MULTICAST_CTRL, ua, cmd, mac)
92 #define h_change_logical_lan_mac(ua, mac) \
93 plpar_hcall_norets(H_CHANGE_LOGICAL_LAN_MAC, ua, mac)
95 #define IbmVethNumBufferPools 5
96 #define IBMVETH_IO_ENTITLEMENT_DEFAULT 4243456 /* MTU of 1500 needs 4.2Mb */
97 #define IBMVETH_BUFF_OH 22 /* Overhead: 14 ethernet header + 8 opaque handle */
98 #define IBMVETH_MAX_MTU 68
99 #define IBMVETH_MAX_POOL_COUNT 4096
100 #define IBMVETH_BUFF_LIST_SIZE 4096
101 #define IBMVETH_FILT_LIST_SIZE 4096
102 #define IBMVETH_MAX_BUF_SIZE (1024 * 128)
104 static int pool_size[] = { 512, 1024 * 2, 1024 * 16, 1024 * 32, 1024 * 64 };
105 static int pool_count[] = { 256, 768, 256, 256, 256 };
106 static int pool_active[] = { 1, 1, 0, 0, 0};
108 #define IBM_VETH_INVALID_MAP ((u16)0xffff)
110 struct ibmveth_buff_pool {
111 u32 size;
112 u32 index;
113 u32 buff_size;
114 u32 threshold;
115 atomic_t available;
116 u32 consumer_index;
117 u32 producer_index;
118 u16 *free_map;
119 dma_addr_t *dma_addr;
120 struct sk_buff **skbuff;
121 int active;
122 struct kobject kobj;
125 struct ibmveth_rx_q {
126 u64 index;
127 u64 num_slots;
128 u64 toggle;
129 dma_addr_t queue_dma;
130 u32 queue_len;
131 struct ibmveth_rx_q_entry *queue_addr;
134 struct ibmveth_adapter {
135 struct vio_dev *vdev;
136 struct net_device *netdev;
137 struct napi_struct napi;
138 struct net_device_stats stats;
139 unsigned int mcastFilterSize;
140 unsigned long mac_addr;
141 void * buffer_list_addr;
142 void * filter_list_addr;
143 dma_addr_t buffer_list_dma;
144 dma_addr_t filter_list_dma;
145 struct ibmveth_buff_pool rx_buff_pool[IbmVethNumBufferPools];
146 struct ibmveth_rx_q rx_queue;
147 int pool_config;
148 int rx_csum;
149 void *bounce_buffer;
150 dma_addr_t bounce_buffer_dma;
152 /* adapter specific stats */
153 u64 replenish_task_cycles;
154 u64 replenish_no_mem;
155 u64 replenish_add_buff_failure;
156 u64 replenish_add_buff_success;
157 u64 rx_invalid_buffer;
158 u64 rx_no_buffer;
159 u64 tx_map_failed;
160 u64 tx_send_failed;
161 spinlock_t stats_lock;
164 struct ibmveth_buf_desc_fields {
165 u32 flags_len;
166 #define IBMVETH_BUF_VALID 0x80000000
167 #define IBMVETH_BUF_TOGGLE 0x40000000
168 #define IBMVETH_BUF_NO_CSUM 0x02000000
169 #define IBMVETH_BUF_CSUM_GOOD 0x01000000
170 #define IBMVETH_BUF_LEN_MASK 0x00FFFFFF
171 u32 address;
174 union ibmveth_buf_desc {
175 u64 desc;
176 struct ibmveth_buf_desc_fields fields;
179 struct ibmveth_rx_q_entry {
180 u32 flags_off;
181 #define IBMVETH_RXQ_TOGGLE 0x80000000
182 #define IBMVETH_RXQ_TOGGLE_SHIFT 31
183 #define IBMVETH_RXQ_VALID 0x40000000
184 #define IBMVETH_RXQ_NO_CSUM 0x02000000
185 #define IBMVETH_RXQ_CSUM_GOOD 0x01000000
186 #define IBMVETH_RXQ_OFF_MASK 0x0000FFFF
188 u32 length;
189 u64 correlator;
192 #endif /* _IBMVETH_H */