OMAP3: PM: decouple PER and CORE context save and restore
[linux-ginger.git] / drivers / media / video / mx3_camera.c
blobdff2e5e2d8c6bc7d879577750c9831f859445dc9
1 /*
2 * V4L2 Driver for i.MX3x camera host
4 * Copyright (C) 2008
5 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/version.h>
15 #include <linux/videodev2.h>
16 #include <linux/platform_device.h>
17 #include <linux/clk.h>
18 #include <linux/vmalloc.h>
19 #include <linux/interrupt.h>
21 #include <media/v4l2-common.h>
22 #include <media/v4l2-dev.h>
23 #include <media/videobuf-dma-contig.h>
24 #include <media/soc_camera.h>
26 #include <mach/ipu.h>
27 #include <mach/mx3_camera.h>
29 #define MX3_CAM_DRV_NAME "mx3-camera"
31 /* CMOS Sensor Interface Registers */
32 #define CSI_REG_START 0x60
34 #define CSI_SENS_CONF (0x60 - CSI_REG_START)
35 #define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START)
36 #define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START)
37 #define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START)
38 #define CSI_TST_CTRL (0x70 - CSI_REG_START)
39 #define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START)
40 #define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START)
41 #define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START)
42 #define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START)
43 #define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START)
45 #define CSI_SENS_CONF_VSYNC_POL_SHIFT 0
46 #define CSI_SENS_CONF_HSYNC_POL_SHIFT 1
47 #define CSI_SENS_CONF_DATA_POL_SHIFT 2
48 #define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3
49 #define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4
50 #define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7
51 #define CSI_SENS_CONF_DATA_FMT_SHIFT 8
52 #define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10
53 #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
54 #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
56 #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
57 #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
58 #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
60 #define MAX_VIDEO_MEM 16
62 struct mx3_camera_buffer {
63 /* common v4l buffer stuff -- must be first */
64 struct videobuf_buffer vb;
65 const struct soc_camera_data_format *fmt;
67 /* One descriptot per scatterlist (per frame) */
68 struct dma_async_tx_descriptor *txd;
70 /* We have to "build" a scatterlist ourselves - one element per frame */
71 struct scatterlist sg;
74 /**
75 * struct mx3_camera_dev - i.MX3x camera (CSI) object
76 * @dev: camera device, to which the coherent buffer is attached
77 * @icd: currently attached camera sensor
78 * @clk: pointer to clock
79 * @base: remapped register base address
80 * @pdata: platform data
81 * @platform_flags: platform flags
82 * @mclk: master clock frequency in Hz
83 * @capture: list of capture videobuffers
84 * @lock: protects video buffer lists
85 * @active: active video buffer
86 * @idmac_channel: array of pointers to IPU DMAC DMA channels
87 * @soc_host: embedded soc_host object
89 struct mx3_camera_dev {
91 * i.MX3x is only supposed to handle one camera on its Camera Sensor
92 * Interface. If anyone ever builds hardware to enable more than one
93 * camera _simultaneously_, they will have to modify this driver too
95 struct soc_camera_device *icd;
96 struct clk *clk;
98 void __iomem *base;
100 struct mx3_camera_pdata *pdata;
102 unsigned long platform_flags;
103 unsigned long mclk;
105 struct list_head capture;
106 spinlock_t lock; /* Protects video buffer lists */
107 struct mx3_camera_buffer *active;
109 /* IDMAC / dmaengine interface */
110 struct idmac_channel *idmac_channel[1]; /* We need one channel */
112 struct soc_camera_host soc_host;
115 struct dma_chan_request {
116 struct mx3_camera_dev *mx3_cam;
117 enum ipu_channel id;
120 static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt);
122 static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg)
124 return __raw_readl(mx3->base + reg);
127 static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg)
129 __raw_writel(value, mx3->base + reg);
132 /* Called from the IPU IDMAC ISR */
133 static void mx3_cam_dma_done(void *arg)
135 struct idmac_tx_desc *desc = to_tx_desc(arg);
136 struct dma_chan *chan = desc->txd.chan;
137 struct idmac_channel *ichannel = to_idmac_chan(chan);
138 struct mx3_camera_dev *mx3_cam = ichannel->client;
139 struct videobuf_buffer *vb;
141 dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n",
142 desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0);
144 spin_lock(&mx3_cam->lock);
145 if (mx3_cam->active) {
146 vb = &mx3_cam->active->vb;
148 list_del_init(&vb->queue);
149 vb->state = VIDEOBUF_DONE;
150 do_gettimeofday(&vb->ts);
151 vb->field_count++;
152 wake_up(&vb->done);
155 if (list_empty(&mx3_cam->capture)) {
156 mx3_cam->active = NULL;
157 spin_unlock(&mx3_cam->lock);
160 * stop capture - without further buffers IPU_CHA_BUF0_RDY will
161 * not get updated
163 return;
166 mx3_cam->active = list_entry(mx3_cam->capture.next,
167 struct mx3_camera_buffer, vb.queue);
168 mx3_cam->active->vb.state = VIDEOBUF_ACTIVE;
169 spin_unlock(&mx3_cam->lock);
172 static void free_buffer(struct videobuf_queue *vq, struct mx3_camera_buffer *buf)
174 struct soc_camera_device *icd = vq->priv_data;
175 struct videobuf_buffer *vb = &buf->vb;
176 struct dma_async_tx_descriptor *txd = buf->txd;
177 struct idmac_channel *ichan;
179 BUG_ON(in_interrupt());
181 dev_dbg(icd->dev.parent, "%s (vb=0x%p) 0x%08lx %d\n", __func__,
182 vb, vb->baddr, vb->bsize);
185 * This waits until this buffer is out of danger, i.e., until it is no
186 * longer in STATE_QUEUED or STATE_ACTIVE
188 videobuf_waiton(vb, 0, 0);
189 if (txd) {
190 ichan = to_idmac_chan(txd->chan);
191 async_tx_ack(txd);
193 videobuf_dma_contig_free(vq, vb);
194 buf->txd = NULL;
196 vb->state = VIDEOBUF_NEEDS_INIT;
200 * Videobuf operations
204 * Calculate the __buffer__ (not data) size and number of buffers.
205 * Called with .vb_lock held
207 static int mx3_videobuf_setup(struct videobuf_queue *vq, unsigned int *count,
208 unsigned int *size)
210 struct soc_camera_device *icd = vq->priv_data;
211 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
212 struct mx3_camera_dev *mx3_cam = ici->priv;
214 * bits-per-pixel (depth) as specified in camera's pixel format does
215 * not necessarily match what the camera interface writes to RAM, but
216 * it should be good enough for now.
218 unsigned int bpp = DIV_ROUND_UP(icd->current_fmt->depth, 8);
220 if (!mx3_cam->idmac_channel[0])
221 return -EINVAL;
223 *size = icd->user_width * icd->user_height * bpp;
225 if (!*count)
226 *count = 32;
228 if (*size * *count > MAX_VIDEO_MEM * 1024 * 1024)
229 *count = MAX_VIDEO_MEM * 1024 * 1024 / *size;
231 return 0;
234 /* Called with .vb_lock held */
235 static int mx3_videobuf_prepare(struct videobuf_queue *vq,
236 struct videobuf_buffer *vb, enum v4l2_field field)
238 struct soc_camera_device *icd = vq->priv_data;
239 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
240 struct mx3_camera_dev *mx3_cam = ici->priv;
241 struct mx3_camera_buffer *buf =
242 container_of(vb, struct mx3_camera_buffer, vb);
243 /* current_fmt _must_ always be set */
244 size_t new_size = icd->user_width * icd->user_height *
245 ((icd->current_fmt->depth + 7) >> 3);
246 int ret;
249 * I think, in buf_prepare you only have to protect global data,
250 * the actual buffer is yours
253 if (buf->fmt != icd->current_fmt ||
254 vb->width != icd->user_width ||
255 vb->height != icd->user_height ||
256 vb->field != field) {
257 buf->fmt = icd->current_fmt;
258 vb->width = icd->user_width;
259 vb->height = icd->user_height;
260 vb->field = field;
261 if (vb->state != VIDEOBUF_NEEDS_INIT)
262 free_buffer(vq, buf);
265 if (vb->baddr && vb->bsize < new_size) {
266 /* User provided buffer, but it is too small */
267 ret = -ENOMEM;
268 goto out;
271 if (vb->state == VIDEOBUF_NEEDS_INIT) {
272 struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
273 struct scatterlist *sg = &buf->sg;
276 * The total size of video-buffers that will be allocated / mapped.
277 * *size that we calculated in videobuf_setup gets assigned to
278 * vb->bsize, and now we use the same calculation to get vb->size.
280 vb->size = new_size;
282 /* This actually (allocates and) maps buffers */
283 ret = videobuf_iolock(vq, vb, NULL);
284 if (ret)
285 goto fail;
288 * We will have to configure the IDMAC channel. It has two slots
289 * for DMA buffers, we shall enter the first two buffers there,
290 * and then submit new buffers in DMA-ready interrupts
292 sg_init_table(sg, 1);
293 sg_dma_address(sg) = videobuf_to_dma_contig(vb);
294 sg_dma_len(sg) = vb->size;
296 buf->txd = ichan->dma_chan.device->device_prep_slave_sg(
297 &ichan->dma_chan, sg, 1, DMA_FROM_DEVICE,
298 DMA_PREP_INTERRUPT);
299 if (!buf->txd) {
300 ret = -EIO;
301 goto fail;
304 buf->txd->callback_param = buf->txd;
305 buf->txd->callback = mx3_cam_dma_done;
307 vb->state = VIDEOBUF_PREPARED;
310 return 0;
312 fail:
313 free_buffer(vq, buf);
314 out:
315 return ret;
318 static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
320 /* Add more formats as need arises and test possibilities appear... */
321 switch (fourcc) {
322 case V4L2_PIX_FMT_RGB565:
323 return IPU_PIX_FMT_RGB565;
324 case V4L2_PIX_FMT_RGB24:
325 return IPU_PIX_FMT_RGB24;
326 case V4L2_PIX_FMT_RGB332:
327 return IPU_PIX_FMT_RGB332;
328 case V4L2_PIX_FMT_YUV422P:
329 return IPU_PIX_FMT_YVU422P;
330 default:
331 return IPU_PIX_FMT_GENERIC;
336 * Called with .vb_lock mutex held and
337 * under spinlock_irqsave(&mx3_cam->lock, ...)
339 static void mx3_videobuf_queue(struct videobuf_queue *vq,
340 struct videobuf_buffer *vb)
342 struct soc_camera_device *icd = vq->priv_data;
343 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
344 struct mx3_camera_dev *mx3_cam = ici->priv;
345 struct mx3_camera_buffer *buf =
346 container_of(vb, struct mx3_camera_buffer, vb);
347 struct dma_async_tx_descriptor *txd = buf->txd;
348 struct idmac_channel *ichan = to_idmac_chan(txd->chan);
349 struct idmac_video_param *video = &ichan->params.video;
350 const struct soc_camera_data_format *data_fmt = icd->current_fmt;
351 dma_cookie_t cookie;
353 BUG_ON(!irqs_disabled());
355 /* This is the configuration of one sg-element */
356 video->out_pixel_fmt = fourcc_to_ipu_pix(data_fmt->fourcc);
357 video->out_width = icd->user_width;
358 video->out_height = icd->user_height;
359 video->out_stride = icd->user_width;
361 #ifdef DEBUG
362 /* helps to see what DMA actually has written */
363 memset((void *)vb->baddr, 0xaa, vb->bsize);
364 #endif
366 list_add_tail(&vb->queue, &mx3_cam->capture);
368 if (!mx3_cam->active) {
369 mx3_cam->active = buf;
370 vb->state = VIDEOBUF_ACTIVE;
371 } else {
372 vb->state = VIDEOBUF_QUEUED;
375 spin_unlock_irq(&mx3_cam->lock);
377 cookie = txd->tx_submit(txd);
378 dev_dbg(icd->dev.parent, "Submitted cookie %d DMA 0x%08x\n",
379 cookie, sg_dma_address(&buf->sg));
381 spin_lock_irq(&mx3_cam->lock);
383 if (cookie >= 0)
384 return;
386 /* Submit error */
387 vb->state = VIDEOBUF_PREPARED;
389 list_del_init(&vb->queue);
391 if (mx3_cam->active == buf)
392 mx3_cam->active = NULL;
395 /* Called with .vb_lock held */
396 static void mx3_videobuf_release(struct videobuf_queue *vq,
397 struct videobuf_buffer *vb)
399 struct soc_camera_device *icd = vq->priv_data;
400 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
401 struct mx3_camera_dev *mx3_cam = ici->priv;
402 struct mx3_camera_buffer *buf =
403 container_of(vb, struct mx3_camera_buffer, vb);
404 unsigned long flags;
406 dev_dbg(icd->dev.parent,
407 "Release%s DMA 0x%08x (state %d), queue %sempty\n",
408 mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg),
409 vb->state, list_empty(&vb->queue) ? "" : "not ");
410 spin_lock_irqsave(&mx3_cam->lock, flags);
411 if ((vb->state == VIDEOBUF_ACTIVE || vb->state == VIDEOBUF_QUEUED) &&
412 !list_empty(&vb->queue)) {
413 vb->state = VIDEOBUF_ERROR;
415 list_del_init(&vb->queue);
416 if (mx3_cam->active == buf)
417 mx3_cam->active = NULL;
419 spin_unlock_irqrestore(&mx3_cam->lock, flags);
420 free_buffer(vq, buf);
423 static struct videobuf_queue_ops mx3_videobuf_ops = {
424 .buf_setup = mx3_videobuf_setup,
425 .buf_prepare = mx3_videobuf_prepare,
426 .buf_queue = mx3_videobuf_queue,
427 .buf_release = mx3_videobuf_release,
430 static void mx3_camera_init_videobuf(struct videobuf_queue *q,
431 struct soc_camera_device *icd)
433 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
434 struct mx3_camera_dev *mx3_cam = ici->priv;
436 videobuf_queue_dma_contig_init(q, &mx3_videobuf_ops, icd->dev.parent,
437 &mx3_cam->lock,
438 V4L2_BUF_TYPE_VIDEO_CAPTURE,
439 V4L2_FIELD_NONE,
440 sizeof(struct mx3_camera_buffer), icd);
443 /* First part of ipu_csi_init_interface() */
444 static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam,
445 struct soc_camera_device *icd)
447 u32 conf;
448 long rate;
450 /* Set default size: ipu_csi_set_window_size() */
451 csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE);
452 /* ...and position to 0:0: ipu_csi_set_window_pos() */
453 conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
454 csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL);
456 /* We use only gated clock synchronisation mode so far */
457 conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT;
459 /* Set generic data, platform-biggest bus-width */
460 conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
462 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
463 conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
464 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
465 conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
466 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
467 conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
468 else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
469 conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
471 if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC)
472 conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT;
473 if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC)
474 conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT;
475 if (mx3_cam->platform_flags & MX3_CAMERA_DP)
476 conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
477 if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
478 conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
479 if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
480 conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
481 if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
482 conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
484 /* ipu_csi_init_interface() */
485 csi_reg_write(mx3_cam, conf, CSI_SENS_CONF);
487 clk_enable(mx3_cam->clk);
488 rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk);
489 dev_dbg(icd->dev.parent, "Set SENS_CONF to %x, rate %ld\n", conf, rate);
490 if (rate)
491 clk_set_rate(mx3_cam->clk, rate);
494 /* Called with .video_lock held */
495 static int mx3_camera_add_device(struct soc_camera_device *icd)
497 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
498 struct mx3_camera_dev *mx3_cam = ici->priv;
500 if (mx3_cam->icd)
501 return -EBUSY;
503 mx3_camera_activate(mx3_cam, icd);
505 mx3_cam->icd = icd;
507 dev_info(icd->dev.parent, "MX3 Camera driver attached to camera %d\n",
508 icd->devnum);
510 return 0;
513 /* Called with .video_lock held */
514 static void mx3_camera_remove_device(struct soc_camera_device *icd)
516 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
517 struct mx3_camera_dev *mx3_cam = ici->priv;
518 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
520 BUG_ON(icd != mx3_cam->icd);
522 if (*ichan) {
523 dma_release_channel(&(*ichan)->dma_chan);
524 *ichan = NULL;
527 clk_disable(mx3_cam->clk);
529 mx3_cam->icd = NULL;
531 dev_info(icd->dev.parent, "MX3 Camera driver detached from camera %d\n",
532 icd->devnum);
535 static bool channel_change_requested(struct soc_camera_device *icd,
536 struct v4l2_rect *rect)
538 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
539 struct mx3_camera_dev *mx3_cam = ici->priv;
540 struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
542 /* Do buffers have to be re-allocated or channel re-configured? */
543 return ichan && rect->width * rect->height >
544 icd->user_width * icd->user_height;
547 static int test_platform_param(struct mx3_camera_dev *mx3_cam,
548 unsigned char buswidth, unsigned long *flags)
551 * Platform specified synchronization and pixel clock polarities are
552 * only a recommendation and are only used during probing. MX3x
553 * camera interface only works in master mode, i.e., uses HSYNC and
554 * VSYNC signals from the sensor
556 *flags = SOCAM_MASTER |
557 SOCAM_HSYNC_ACTIVE_HIGH |
558 SOCAM_HSYNC_ACTIVE_LOW |
559 SOCAM_VSYNC_ACTIVE_HIGH |
560 SOCAM_VSYNC_ACTIVE_LOW |
561 SOCAM_PCLK_SAMPLE_RISING |
562 SOCAM_PCLK_SAMPLE_FALLING |
563 SOCAM_DATA_ACTIVE_HIGH |
564 SOCAM_DATA_ACTIVE_LOW;
566 /* If requested data width is supported by the platform, use it or any
567 * possible lower value - i.MX31 is smart enough to schift bits */
568 switch (buswidth) {
569 case 15:
570 if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15))
571 return -EINVAL;
572 *flags |= SOCAM_DATAWIDTH_15 | SOCAM_DATAWIDTH_10 |
573 SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
574 break;
575 case 10:
576 if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10))
577 return -EINVAL;
578 *flags |= SOCAM_DATAWIDTH_10 | SOCAM_DATAWIDTH_8 |
579 SOCAM_DATAWIDTH_4;
580 break;
581 case 8:
582 if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8))
583 return -EINVAL;
584 *flags |= SOCAM_DATAWIDTH_8 | SOCAM_DATAWIDTH_4;
585 break;
586 case 4:
587 if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4))
588 return -EINVAL;
589 *flags |= SOCAM_DATAWIDTH_4;
590 break;
591 default:
592 dev_warn(mx3_cam->soc_host.v4l2_dev.dev,
593 "Unsupported bus width %d\n", buswidth);
594 return -EINVAL;
597 return 0;
600 static int mx3_camera_try_bus_param(struct soc_camera_device *icd,
601 const unsigned int depth)
603 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
604 struct mx3_camera_dev *mx3_cam = ici->priv;
605 unsigned long bus_flags, camera_flags;
606 int ret = test_platform_param(mx3_cam, depth, &bus_flags);
608 dev_dbg(icd->dev.parent, "request bus width %d bit: %d\n", depth, ret);
610 if (ret < 0)
611 return ret;
613 camera_flags = icd->ops->query_bus_param(icd);
615 ret = soc_camera_bus_param_compatible(camera_flags, bus_flags);
616 if (ret < 0)
617 dev_warn(icd->dev.parent,
618 "Flags incompatible: camera %lx, host %lx\n",
619 camera_flags, bus_flags);
621 return ret;
624 static bool chan_filter(struct dma_chan *chan, void *arg)
626 struct dma_chan_request *rq = arg;
627 struct mx3_camera_pdata *pdata;
629 if (!rq)
630 return false;
632 pdata = rq->mx3_cam->soc_host.v4l2_dev.dev->platform_data;
634 return rq->id == chan->chan_id &&
635 pdata->dma_dev == chan->device->dev;
638 static const struct soc_camera_data_format mx3_camera_formats[] = {
640 .name = "Bayer (sRGB) 8 bit",
641 .depth = 8,
642 .fourcc = V4L2_PIX_FMT_SBGGR8,
643 .colorspace = V4L2_COLORSPACE_SRGB,
644 }, {
645 .name = "Monochrome 8 bit",
646 .depth = 8,
647 .fourcc = V4L2_PIX_FMT_GREY,
648 .colorspace = V4L2_COLORSPACE_JPEG,
652 static bool buswidth_supported(struct soc_camera_host *ici, int depth)
654 struct mx3_camera_dev *mx3_cam = ici->priv;
656 switch (depth) {
657 case 4:
658 return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4);
659 case 8:
660 return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8);
661 case 10:
662 return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10);
663 case 15:
664 return !!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15);
666 return false;
669 static int mx3_camera_get_formats(struct soc_camera_device *icd, int idx,
670 struct soc_camera_format_xlate *xlate)
672 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
673 int formats = 0, buswidth, ret;
675 buswidth = icd->formats[idx].depth;
677 if (!buswidth_supported(ici, buswidth))
678 return 0;
680 ret = mx3_camera_try_bus_param(icd, buswidth);
681 if (ret < 0)
682 return 0;
684 switch (icd->formats[idx].fourcc) {
685 case V4L2_PIX_FMT_SGRBG10:
686 formats++;
687 if (xlate) {
688 xlate->host_fmt = &mx3_camera_formats[0];
689 xlate->cam_fmt = icd->formats + idx;
690 xlate->buswidth = buswidth;
691 xlate++;
692 dev_dbg(icd->dev.parent,
693 "Providing format %s using %s\n",
694 mx3_camera_formats[0].name,
695 icd->formats[idx].name);
697 goto passthrough;
698 case V4L2_PIX_FMT_Y16:
699 formats++;
700 if (xlate) {
701 xlate->host_fmt = &mx3_camera_formats[1];
702 xlate->cam_fmt = icd->formats + idx;
703 xlate->buswidth = buswidth;
704 xlate++;
705 dev_dbg(icd->dev.parent,
706 "Providing format %s using %s\n",
707 mx3_camera_formats[0].name,
708 icd->formats[idx].name);
710 default:
711 passthrough:
712 /* Generic pass-through */
713 formats++;
714 if (xlate) {
715 xlate->host_fmt = icd->formats + idx;
716 xlate->cam_fmt = icd->formats + idx;
717 xlate->buswidth = buswidth;
718 xlate++;
719 dev_dbg(icd->dev.parent,
720 "Providing format %s in pass-through mode\n",
721 icd->formats[idx].name);
725 return formats;
728 static void configure_geometry(struct mx3_camera_dev *mx3_cam,
729 unsigned int width, unsigned int height)
731 u32 ctrl, width_field, height_field;
733 /* Setup frame size - this cannot be changed on-the-fly... */
734 width_field = width - 1;
735 height_field = height - 1;
736 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE);
738 csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1);
739 csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2);
741 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE);
743 /* ...and position */
744 ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
745 /* Sensor does the cropping */
746 csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL);
749 static int acquire_dma_channel(struct mx3_camera_dev *mx3_cam)
751 dma_cap_mask_t mask;
752 struct dma_chan *chan;
753 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
754 /* We have to use IDMAC_IC_7 for Bayer / generic data */
755 struct dma_chan_request rq = {.mx3_cam = mx3_cam,
756 .id = IDMAC_IC_7};
758 if (*ichan) {
759 struct videobuf_buffer *vb, *_vb;
760 dma_release_channel(&(*ichan)->dma_chan);
761 *ichan = NULL;
762 mx3_cam->active = NULL;
763 list_for_each_entry_safe(vb, _vb, &mx3_cam->capture, queue) {
764 list_del_init(&vb->queue);
765 vb->state = VIDEOBUF_ERROR;
766 wake_up(&vb->done);
770 dma_cap_zero(mask);
771 dma_cap_set(DMA_SLAVE, mask);
772 dma_cap_set(DMA_PRIVATE, mask);
773 chan = dma_request_channel(mask, chan_filter, &rq);
774 if (!chan)
775 return -EBUSY;
777 *ichan = to_idmac_chan(chan);
778 (*ichan)->client = mx3_cam;
780 return 0;
784 * FIXME: learn to use stride != width, then we can keep stride properly aligned
785 * and support arbitrary (even) widths.
787 static inline void stride_align(__s32 *width)
789 if (((*width + 7) & ~7) < 4096)
790 *width = (*width + 7) & ~7;
791 else
792 *width = *width & ~7;
796 * As long as we don't implement host-side cropping and scaling, we can use
797 * default g_crop and cropcap from soc_camera.c
799 static int mx3_camera_set_crop(struct soc_camera_device *icd,
800 struct v4l2_crop *a)
802 struct v4l2_rect *rect = &a->c;
803 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
804 struct mx3_camera_dev *mx3_cam = ici->priv;
805 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
806 struct v4l2_format f = {.type = V4L2_BUF_TYPE_VIDEO_CAPTURE};
807 struct v4l2_pix_format *pix = &f.fmt.pix;
808 int ret;
810 soc_camera_limit_side(&rect->left, &rect->width, 0, 2, 4096);
811 soc_camera_limit_side(&rect->top, &rect->height, 0, 2, 4096);
813 ret = v4l2_subdev_call(sd, video, s_crop, a);
814 if (ret < 0)
815 return ret;
817 /* The capture device might have changed its output */
818 ret = v4l2_subdev_call(sd, video, g_fmt, &f);
819 if (ret < 0)
820 return ret;
822 if (pix->width & 7) {
823 /* Ouch! We can only handle 8-byte aligned width... */
824 stride_align(&pix->width);
825 ret = v4l2_subdev_call(sd, video, s_fmt, &f);
826 if (ret < 0)
827 return ret;
830 if (pix->width != icd->user_width || pix->height != icd->user_height) {
832 * We now know pixel formats and can decide upon DMA-channel(s)
833 * So far only direct camera-to-memory is supported
835 if (channel_change_requested(icd, rect)) {
836 int ret = acquire_dma_channel(mx3_cam);
837 if (ret < 0)
838 return ret;
841 configure_geometry(mx3_cam, pix->width, pix->height);
844 dev_dbg(icd->dev.parent, "Sensor cropped %dx%d\n",
845 pix->width, pix->height);
847 icd->user_width = pix->width;
848 icd->user_height = pix->height;
850 return ret;
853 static int mx3_camera_set_fmt(struct soc_camera_device *icd,
854 struct v4l2_format *f)
856 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
857 struct mx3_camera_dev *mx3_cam = ici->priv;
858 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
859 const struct soc_camera_format_xlate *xlate;
860 struct v4l2_pix_format *pix = &f->fmt.pix;
861 int ret;
863 xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
864 if (!xlate) {
865 dev_warn(icd->dev.parent, "Format %x not found\n",
866 pix->pixelformat);
867 return -EINVAL;
870 stride_align(&pix->width);
871 dev_dbg(icd->dev.parent, "Set format %dx%d\n", pix->width, pix->height);
873 ret = acquire_dma_channel(mx3_cam);
874 if (ret < 0)
875 return ret;
878 * Might have to perform a complete interface initialisation like in
879 * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
880 * mxc_v4l2_s_fmt()
883 configure_geometry(mx3_cam, pix->width, pix->height);
885 ret = v4l2_subdev_call(sd, video, s_fmt, f);
886 if (!ret) {
887 icd->buswidth = xlate->buswidth;
888 icd->current_fmt = xlate->host_fmt;
891 dev_dbg(icd->dev.parent, "Sensor set %dx%d\n", pix->width, pix->height);
893 return ret;
896 static int mx3_camera_try_fmt(struct soc_camera_device *icd,
897 struct v4l2_format *f)
899 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
900 const struct soc_camera_format_xlate *xlate;
901 struct v4l2_pix_format *pix = &f->fmt.pix;
902 __u32 pixfmt = pix->pixelformat;
903 enum v4l2_field field;
904 int ret;
906 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
907 if (pixfmt && !xlate) {
908 dev_warn(icd->dev.parent, "Format %x not found\n", pixfmt);
909 return -EINVAL;
912 /* limit to MX3 hardware capabilities */
913 if (pix->height > 4096)
914 pix->height = 4096;
915 if (pix->width > 4096)
916 pix->width = 4096;
918 pix->bytesperline = pix->width *
919 DIV_ROUND_UP(xlate->host_fmt->depth, 8);
920 pix->sizeimage = pix->height * pix->bytesperline;
922 /* camera has to see its format, but the user the original one */
923 pix->pixelformat = xlate->cam_fmt->fourcc;
924 /* limit to sensor capabilities */
925 ret = v4l2_subdev_call(sd, video, try_fmt, f);
926 pix->pixelformat = xlate->host_fmt->fourcc;
928 field = pix->field;
930 if (field == V4L2_FIELD_ANY) {
931 pix->field = V4L2_FIELD_NONE;
932 } else if (field != V4L2_FIELD_NONE) {
933 dev_err(icd->dev.parent, "Field type %d unsupported.\n", field);
934 return -EINVAL;
937 return ret;
940 static int mx3_camera_reqbufs(struct soc_camera_file *icf,
941 struct v4l2_requestbuffers *p)
943 return 0;
946 static unsigned int mx3_camera_poll(struct file *file, poll_table *pt)
948 struct soc_camera_file *icf = file->private_data;
950 return videobuf_poll_stream(file, &icf->vb_vidq, pt);
953 static int mx3_camera_querycap(struct soc_camera_host *ici,
954 struct v4l2_capability *cap)
956 /* cap->name is set by the firendly caller:-> */
957 strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card));
958 cap->version = KERNEL_VERSION(0, 2, 2);
959 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
961 return 0;
964 static int mx3_camera_set_bus_param(struct soc_camera_device *icd, __u32 pixfmt)
966 struct soc_camera_host *ici = to_soc_camera_host(icd->dev.parent);
967 struct mx3_camera_dev *mx3_cam = ici->priv;
968 unsigned long bus_flags, camera_flags, common_flags;
969 u32 dw, sens_conf;
970 int ret = test_platform_param(mx3_cam, icd->buswidth, &bus_flags);
971 const struct soc_camera_format_xlate *xlate;
972 struct device *dev = icd->dev.parent;
974 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
975 if (!xlate) {
976 dev_warn(dev, "Format %x not found\n", pixfmt);
977 return -EINVAL;
980 dev_dbg(dev, "requested bus width %d bit: %d\n",
981 icd->buswidth, ret);
983 if (ret < 0)
984 return ret;
986 camera_flags = icd->ops->query_bus_param(icd);
988 common_flags = soc_camera_bus_param_compatible(camera_flags, bus_flags);
989 dev_dbg(dev, "Flags cam: 0x%lx host: 0x%lx common: 0x%lx\n",
990 camera_flags, bus_flags, common_flags);
991 if (!common_flags) {
992 dev_dbg(dev, "no common flags");
993 return -EINVAL;
996 /* Make choices, based on platform preferences */
997 if ((common_flags & SOCAM_HSYNC_ACTIVE_HIGH) &&
998 (common_flags & SOCAM_HSYNC_ACTIVE_LOW)) {
999 if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
1000 common_flags &= ~SOCAM_HSYNC_ACTIVE_HIGH;
1001 else
1002 common_flags &= ~SOCAM_HSYNC_ACTIVE_LOW;
1005 if ((common_flags & SOCAM_VSYNC_ACTIVE_HIGH) &&
1006 (common_flags & SOCAM_VSYNC_ACTIVE_LOW)) {
1007 if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
1008 common_flags &= ~SOCAM_VSYNC_ACTIVE_HIGH;
1009 else
1010 common_flags &= ~SOCAM_VSYNC_ACTIVE_LOW;
1013 if ((common_flags & SOCAM_DATA_ACTIVE_HIGH) &&
1014 (common_flags & SOCAM_DATA_ACTIVE_LOW)) {
1015 if (mx3_cam->platform_flags & MX3_CAMERA_DP)
1016 common_flags &= ~SOCAM_DATA_ACTIVE_HIGH;
1017 else
1018 common_flags &= ~SOCAM_DATA_ACTIVE_LOW;
1021 if ((common_flags & SOCAM_PCLK_SAMPLE_RISING) &&
1022 (common_flags & SOCAM_PCLK_SAMPLE_FALLING)) {
1023 if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
1024 common_flags &= ~SOCAM_PCLK_SAMPLE_RISING;
1025 else
1026 common_flags &= ~SOCAM_PCLK_SAMPLE_FALLING;
1029 /* Make the camera work in widest common mode, we'll take care of
1030 * the rest */
1031 if (common_flags & SOCAM_DATAWIDTH_15)
1032 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
1033 SOCAM_DATAWIDTH_15;
1034 else if (common_flags & SOCAM_DATAWIDTH_10)
1035 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
1036 SOCAM_DATAWIDTH_10;
1037 else if (common_flags & SOCAM_DATAWIDTH_8)
1038 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
1039 SOCAM_DATAWIDTH_8;
1040 else
1041 common_flags = (common_flags & ~SOCAM_DATAWIDTH_MASK) |
1042 SOCAM_DATAWIDTH_4;
1044 ret = icd->ops->set_bus_param(icd, common_flags);
1045 if (ret < 0) {
1046 dev_dbg(dev, "camera set_bus_param(%lx) returned %d\n",
1047 common_flags, ret);
1048 return ret;
1052 * So far only gated clock mode is supported. Add a line
1053 * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
1054 * below and select the required mode when supporting other
1055 * synchronisation protocols.
1057 sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) &
1058 ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) |
1059 (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) |
1060 (1 << CSI_SENS_CONF_DATA_POL_SHIFT) |
1061 (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) |
1062 (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
1063 (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
1065 /* TODO: Support RGB and YUV formats */
1067 /* This has been set in mx3_camera_activate(), but we clear it above */
1068 sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
1070 if (common_flags & SOCAM_PCLK_SAMPLE_FALLING)
1071 sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
1072 if (common_flags & SOCAM_HSYNC_ACTIVE_LOW)
1073 sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
1074 if (common_flags & SOCAM_VSYNC_ACTIVE_LOW)
1075 sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
1076 if (common_flags & SOCAM_DATA_ACTIVE_LOW)
1077 sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
1079 /* Just do what we're asked to do */
1080 switch (xlate->host_fmt->depth) {
1081 case 4:
1082 dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1083 break;
1084 case 8:
1085 dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1086 break;
1087 case 10:
1088 dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1089 break;
1090 default:
1092 * Actually it can only be 15 now, default is just to silence
1093 * compiler warnings
1095 case 15:
1096 dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1099 csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF);
1101 dev_dbg(dev, "Set SENS_CONF to %x\n", sens_conf | dw);
1103 return 0;
1106 static struct soc_camera_host_ops mx3_soc_camera_host_ops = {
1107 .owner = THIS_MODULE,
1108 .add = mx3_camera_add_device,
1109 .remove = mx3_camera_remove_device,
1110 .set_crop = mx3_camera_set_crop,
1111 .set_fmt = mx3_camera_set_fmt,
1112 .try_fmt = mx3_camera_try_fmt,
1113 .get_formats = mx3_camera_get_formats,
1114 .init_videobuf = mx3_camera_init_videobuf,
1115 .reqbufs = mx3_camera_reqbufs,
1116 .poll = mx3_camera_poll,
1117 .querycap = mx3_camera_querycap,
1118 .set_bus_param = mx3_camera_set_bus_param,
1121 static int __devinit mx3_camera_probe(struct platform_device *pdev)
1123 struct mx3_camera_dev *mx3_cam;
1124 struct resource *res;
1125 void __iomem *base;
1126 int err = 0;
1127 struct soc_camera_host *soc_host;
1129 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1130 if (!res) {
1131 err = -ENODEV;
1132 goto egetres;
1135 mx3_cam = vmalloc(sizeof(*mx3_cam));
1136 if (!mx3_cam) {
1137 dev_err(&pdev->dev, "Could not allocate mx3 camera object\n");
1138 err = -ENOMEM;
1139 goto ealloc;
1141 memset(mx3_cam, 0, sizeof(*mx3_cam));
1143 mx3_cam->clk = clk_get(&pdev->dev, NULL);
1144 if (IS_ERR(mx3_cam->clk)) {
1145 err = PTR_ERR(mx3_cam->clk);
1146 goto eclkget;
1149 mx3_cam->pdata = pdev->dev.platform_data;
1150 mx3_cam->platform_flags = mx3_cam->pdata->flags;
1151 if (!(mx3_cam->platform_flags & (MX3_CAMERA_DATAWIDTH_4 |
1152 MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10 |
1153 MX3_CAMERA_DATAWIDTH_15))) {
1154 /* Platform hasn't set available data widths. This is bad.
1155 * Warn and use a default. */
1156 dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
1157 "data widths, using default 8 bit\n");
1158 mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8;
1161 mx3_cam->mclk = mx3_cam->pdata->mclk_10khz * 10000;
1162 if (!mx3_cam->mclk) {
1163 dev_warn(&pdev->dev,
1164 "mclk_10khz == 0! Please, fix your platform data. "
1165 "Using default 20MHz\n");
1166 mx3_cam->mclk = 20000000;
1169 /* list of video-buffers */
1170 INIT_LIST_HEAD(&mx3_cam->capture);
1171 spin_lock_init(&mx3_cam->lock);
1173 base = ioremap(res->start, resource_size(res));
1174 if (!base) {
1175 pr_err("Couldn't map %x@%x\n", resource_size(res), res->start);
1176 err = -ENOMEM;
1177 goto eioremap;
1180 mx3_cam->base = base;
1182 soc_host = &mx3_cam->soc_host;
1183 soc_host->drv_name = MX3_CAM_DRV_NAME;
1184 soc_host->ops = &mx3_soc_camera_host_ops;
1185 soc_host->priv = mx3_cam;
1186 soc_host->v4l2_dev.dev = &pdev->dev;
1187 soc_host->nr = pdev->id;
1189 err = soc_camera_host_register(soc_host);
1190 if (err)
1191 goto ecamhostreg;
1193 /* IDMAC interface */
1194 dmaengine_get();
1196 return 0;
1198 ecamhostreg:
1199 iounmap(base);
1200 eioremap:
1201 clk_put(mx3_cam->clk);
1202 eclkget:
1203 vfree(mx3_cam);
1204 ealloc:
1205 egetres:
1206 return err;
1209 static int __devexit mx3_camera_remove(struct platform_device *pdev)
1211 struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
1212 struct mx3_camera_dev *mx3_cam = container_of(soc_host,
1213 struct mx3_camera_dev, soc_host);
1215 clk_put(mx3_cam->clk);
1217 soc_camera_host_unregister(soc_host);
1219 iounmap(mx3_cam->base);
1222 * The channel has either not been allocated,
1223 * or should have been released
1225 if (WARN_ON(mx3_cam->idmac_channel[0]))
1226 dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan);
1228 vfree(mx3_cam);
1230 dmaengine_put();
1232 dev_info(&pdev->dev, "i.MX3x Camera driver unloaded\n");
1234 return 0;
1237 static struct platform_driver mx3_camera_driver = {
1238 .driver = {
1239 .name = MX3_CAM_DRV_NAME,
1241 .probe = mx3_camera_probe,
1242 .remove = __devexit_p(mx3_camera_remove),
1246 static int __init mx3_camera_init(void)
1248 return platform_driver_register(&mx3_camera_driver);
1251 static void __exit mx3_camera_exit(void)
1253 platform_driver_unregister(&mx3_camera_driver);
1256 module_init(mx3_camera_init);
1257 module_exit(mx3_camera_exit);
1259 MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
1260 MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
1261 MODULE_LICENSE("GPL v2");
1262 MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME);