arch/arm/mach-ixp4xx/include/mach/entry-macro.S

   1 /*
   2  * arch/arm/mach-ixp4xx/include/mach/entry-macro.S
   3  *
   4  * Low-level IRQ helper macros for IXP4xx-based platforms
   5  *
   6  * This file is licensed under  the terms of the GNU General Public
   7  * License version 2. This program is licensed "as is" without any
   8  * warranty of any kind, whether express or implied.
   9  */
  10 #include <mach/hardware.h>
  11
  12                 .macro  disable_fiq
  13                 .endm
  14
  15                 .macro  get_irqnr_preamble, base, tmp
  16                 .endm
  17
  18                 .macro  arch_ret_to_user, tmp1, tmp2
  19                 .endm
  20
  21                 .macro  get_irqnr_and_base, irqnr, irqstat, base, tmp
  22                 ldr     \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET)
  23                 ldr     \irqstat, [\irqstat]            @ get interrupts
  24                 cmp     \irqstat, #0
  25                 beq     1001f                           @ upper IRQ?
  26                 clz     \irqnr, \irqstat
  27                 mov     \base, #31
  28                 sub     \irqnr, \base, \irqnr
  29                 b       1002f                           @ lower IRQ being
  30                                                         @ handled
  31
  32 1001:
  33                 /*
  34                  * IXP465/IXP435 has an upper IRQ status register
  35                  */
  36 #if defined(CONFIG_CPU_IXP46X) || defined(CONFIG_CPU_IXP43X)
  37                 ldr     \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET)
  38                 ldr     \irqstat, [\irqstat]            @ get upper interrupts
  39                 mov     \irqnr, #63
  40                 clz     \irqstat, \irqstat
  41                 cmp     \irqstat, #32
  42                 subne   \irqnr, \irqnr, \irqstat
  43 #endif
  44 1002:
  45                 .endm
  46
  47