OMAP3 SRF: Add CORE rate table param in OMAP-PM
[linux-ginger.git] / arch / arm / mach-s3c6410 / mach-smdk6410.c
blobea51dbe76e3ec55a903a872d3e2544ef5a8b4bea
1 /* linux/arch/arm/mach-s3c6410/mach-smdk6410.c
3 * Copyright 2008 Openmoko, Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/timer.h>
19 #include <linux/init.h>
20 #include <linux/serial_core.h>
21 #include <linux/platform_device.h>
22 #include <linux/io.h>
23 #include <linux/i2c.h>
24 #include <linux/fb.h>
25 #include <linux/gpio.h>
26 #include <linux/delay.h>
27 #include <linux/smsc911x.h>
29 #ifdef CONFIG_SMDK6410_WM1190_EV1
30 #include <linux/mfd/wm8350/core.h>
31 #include <linux/mfd/wm8350/pmic.h>
32 #endif
34 #include <video/platform_lcd.h>
36 #include <asm/mach/arch.h>
37 #include <asm/mach/map.h>
38 #include <asm/mach/irq.h>
40 #include <mach/hardware.h>
41 #include <mach/regs-fb.h>
42 #include <mach/map.h>
44 #include <asm/irq.h>
45 #include <asm/mach-types.h>
47 #include <plat/regs-serial.h>
48 #include <plat/regs-modem.h>
49 #include <plat/regs-gpio.h>
50 #include <plat/regs-sys.h>
51 #include <plat/iic.h>
52 #include <plat/fb.h>
53 #include <plat/gpio-cfg.h>
55 #include <plat/s3c6410.h>
56 #include <plat/clock.h>
57 #include <plat/devs.h>
58 #include <plat/cpu.h>
60 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
61 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
62 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
64 static struct s3c2410_uartcfg smdk6410_uartcfgs[] __initdata = {
65 [0] = {
66 .hwport = 0,
67 .flags = 0,
68 .ucon = UCON,
69 .ulcon = ULCON,
70 .ufcon = UFCON,
72 [1] = {
73 .hwport = 1,
74 .flags = 0,
75 .ucon = UCON,
76 .ulcon = ULCON,
77 .ufcon = UFCON,
79 [2] = {
80 .hwport = 2,
81 .flags = 0,
82 .ucon = UCON,
83 .ulcon = ULCON,
84 .ufcon = UFCON,
86 [3] = {
87 .hwport = 3,
88 .flags = 0,
89 .ucon = UCON,
90 .ulcon = ULCON,
91 .ufcon = UFCON,
95 /* framebuffer and LCD setup. */
97 /* GPF15 = LCD backlight control
98 * GPF13 => Panel power
99 * GPN5 = LCD nRESET signal
100 * PWM_TOUT1 => backlight brightness
103 static void smdk6410_lcd_power_set(struct plat_lcd_data *pd,
104 unsigned int power)
106 if (power) {
107 gpio_direction_output(S3C64XX_GPF(13), 1);
108 gpio_direction_output(S3C64XX_GPF(15), 1);
110 /* fire nRESET on power up */
111 gpio_direction_output(S3C64XX_GPN(5), 0);
112 msleep(10);
113 gpio_direction_output(S3C64XX_GPN(5), 1);
114 msleep(1);
115 } else {
116 gpio_direction_output(S3C64XX_GPF(15), 0);
117 gpio_direction_output(S3C64XX_GPF(13), 0);
121 static struct plat_lcd_data smdk6410_lcd_power_data = {
122 .set_power = smdk6410_lcd_power_set,
125 static struct platform_device smdk6410_lcd_powerdev = {
126 .name = "platform-lcd",
127 .dev.parent = &s3c_device_fb.dev,
128 .dev.platform_data = &smdk6410_lcd_power_data,
131 static struct s3c_fb_pd_win smdk6410_fb_win0 = {
132 /* this is to ensure we use win0 */
133 .win_mode = {
134 .pixclock = 41094,
135 .left_margin = 8,
136 .right_margin = 13,
137 .upper_margin = 7,
138 .lower_margin = 5,
139 .hsync_len = 3,
140 .vsync_len = 1,
141 .xres = 800,
142 .yres = 480,
144 .max_bpp = 32,
145 .default_bpp = 16,
148 /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
149 static struct s3c_fb_platdata smdk6410_lcd_pdata __initdata = {
150 .setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
151 .win[0] = &smdk6410_fb_win0,
152 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
153 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
156 static struct resource smdk6410_smsc911x_resources[] = {
157 [0] = {
158 .start = 0x18000000,
159 .end = 0x18000000 + SZ_64K - 1,
160 .flags = IORESOURCE_MEM,
162 [1] = {
163 .start = S3C_EINT(10),
164 .end = S3C_EINT(10),
165 .flags = IORESOURCE_IRQ | IRQ_TYPE_LEVEL_LOW,
169 static struct smsc911x_platform_config smdk6410_smsc911x_pdata = {
170 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
171 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
172 .flags = SMSC911X_USE_32BIT | SMSC911X_FORCE_INTERNAL_PHY,
173 .phy_interface = PHY_INTERFACE_MODE_MII,
177 static struct platform_device smdk6410_smsc911x = {
178 .name = "smsc911x",
179 .id = -1,
180 .num_resources = ARRAY_SIZE(smdk6410_smsc911x_resources),
181 .resource = &smdk6410_smsc911x_resources[0],
182 .dev = {
183 .platform_data = &smdk6410_smsc911x_pdata,
187 static struct map_desc smdk6410_iodesc[] = {};
189 static struct platform_device *smdk6410_devices[] __initdata = {
190 #ifdef CONFIG_SMDK6410_SD_CH0
191 &s3c_device_hsmmc0,
192 #endif
193 #ifdef CONFIG_SMDK6410_SD_CH1
194 &s3c_device_hsmmc1,
195 #endif
196 &s3c_device_i2c0,
197 &s3c_device_i2c1,
198 &s3c_device_fb,
199 &s3c_device_usb,
200 &s3c_device_usb_hsotg,
201 &smdk6410_lcd_powerdev,
203 &smdk6410_smsc911x,
206 #ifdef CONFIG_SMDK6410_WM1190_EV1
207 /* S3C64xx internal logic & PLL */
208 static struct regulator_init_data wm8350_dcdc1_data = {
209 .constraints = {
210 .name = "PVDD_INT/PVDD_PLL",
211 .min_uV = 1200000,
212 .max_uV = 1200000,
213 .always_on = 1,
214 .apply_uV = 1,
218 /* Memory */
219 static struct regulator_init_data wm8350_dcdc3_data = {
220 .constraints = {
221 .name = "PVDD_MEM",
222 .min_uV = 1800000,
223 .max_uV = 1800000,
224 .always_on = 1,
225 .state_mem = {
226 .uV = 1800000,
227 .mode = REGULATOR_MODE_NORMAL,
228 .enabled = 1,
230 .initial_state = PM_SUSPEND_MEM,
234 /* USB, EXT, PCM, ADC/DAC, USB, MMC */
235 static struct regulator_init_data wm8350_dcdc4_data = {
236 .constraints = {
237 .name = "PVDD_HI/PVDD_EXT/PVDD_SYS/PVCCM2MTV",
238 .min_uV = 3000000,
239 .max_uV = 3000000,
240 .always_on = 1,
244 /* ARM core */
245 static struct regulator_consumer_supply dcdc6_consumers[] = {
247 .supply = "vddarm",
251 static struct regulator_init_data wm8350_dcdc6_data = {
252 .constraints = {
253 .name = "PVDD_ARM",
254 .min_uV = 1000000,
255 .max_uV = 1300000,
256 .always_on = 1,
257 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
259 .num_consumer_supplies = ARRAY_SIZE(dcdc6_consumers),
260 .consumer_supplies = dcdc6_consumers,
263 /* Alive */
264 static struct regulator_init_data wm8350_ldo1_data = {
265 .constraints = {
266 .name = "PVDD_ALIVE",
267 .min_uV = 1200000,
268 .max_uV = 1200000,
269 .always_on = 1,
270 .apply_uV = 1,
274 /* OTG */
275 static struct regulator_init_data wm8350_ldo2_data = {
276 .constraints = {
277 .name = "PVDD_OTG",
278 .min_uV = 3300000,
279 .max_uV = 3300000,
280 .always_on = 1,
284 /* LCD */
285 static struct regulator_init_data wm8350_ldo3_data = {
286 .constraints = {
287 .name = "PVDD_LCD",
288 .min_uV = 3000000,
289 .max_uV = 3000000,
290 .always_on = 1,
294 /* OTGi/1190-EV1 HPVDD & AVDD */
295 static struct regulator_init_data wm8350_ldo4_data = {
296 .constraints = {
297 .name = "PVDD_OTGI/HPVDD/AVDD",
298 .min_uV = 1200000,
299 .max_uV = 1200000,
300 .apply_uV = 1,
301 .always_on = 1,
305 static struct {
306 int regulator;
307 struct regulator_init_data *initdata;
308 } wm1190_regulators[] = {
309 { WM8350_DCDC_1, &wm8350_dcdc1_data },
310 { WM8350_DCDC_3, &wm8350_dcdc3_data },
311 { WM8350_DCDC_4, &wm8350_dcdc4_data },
312 { WM8350_DCDC_6, &wm8350_dcdc6_data },
313 { WM8350_LDO_1, &wm8350_ldo1_data },
314 { WM8350_LDO_2, &wm8350_ldo2_data },
315 { WM8350_LDO_3, &wm8350_ldo3_data },
316 { WM8350_LDO_4, &wm8350_ldo4_data },
319 static int __init smdk6410_wm8350_init(struct wm8350 *wm8350)
321 int i;
323 /* Instantiate the regulators */
324 for (i = 0; i < ARRAY_SIZE(wm1190_regulators); i++)
325 wm8350_register_regulator(wm8350,
326 wm1190_regulators[i].regulator,
327 wm1190_regulators[i].initdata);
329 return 0;
332 static struct wm8350_platform_data __initdata smdk6410_wm8350_pdata = {
333 .init = smdk6410_wm8350_init,
334 .irq_high = 1,
336 #endif
338 static struct i2c_board_info i2c_devs0[] __initdata = {
339 { I2C_BOARD_INFO("24c08", 0x50), },
340 { I2C_BOARD_INFO("wm8580", 0x1b), },
342 #ifdef CONFIG_SMDK6410_WM1190_EV1
343 { I2C_BOARD_INFO("wm8350", 0x1a),
344 .platform_data = &smdk6410_wm8350_pdata,
345 .irq = S3C_EINT(12),
347 #endif
350 static struct i2c_board_info i2c_devs1[] __initdata = {
351 { I2C_BOARD_INFO("24c128", 0x57), }, /* Samsung S524AD0XD1 */
354 static void __init smdk6410_map_io(void)
356 u32 tmp;
358 s3c64xx_init_io(smdk6410_iodesc, ARRAY_SIZE(smdk6410_iodesc));
359 s3c24xx_init_clocks(12000000);
360 s3c24xx_init_uarts(smdk6410_uartcfgs, ARRAY_SIZE(smdk6410_uartcfgs));
362 /* set the LCD type */
364 tmp = __raw_readl(S3C64XX_SPCON);
365 tmp &= ~S3C64XX_SPCON_LCD_SEL_MASK;
366 tmp |= S3C64XX_SPCON_LCD_SEL_RGB;
367 __raw_writel(tmp, S3C64XX_SPCON);
369 /* remove the lcd bypass */
370 tmp = __raw_readl(S3C64XX_MODEM_MIFPCON);
371 tmp &= ~MIFPCON_LCD_BYPASS;
372 __raw_writel(tmp, S3C64XX_MODEM_MIFPCON);
375 static void __init smdk6410_machine_init(void)
377 s3c_i2c0_set_platdata(NULL);
378 s3c_i2c1_set_platdata(NULL);
379 s3c_fb_set_platdata(&smdk6410_lcd_pdata);
381 gpio_request(S3C64XX_GPN(5), "LCD power");
382 gpio_request(S3C64XX_GPF(13), "LCD power");
383 gpio_request(S3C64XX_GPF(15), "LCD power");
385 i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
386 i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
388 platform_add_devices(smdk6410_devices, ARRAY_SIZE(smdk6410_devices));
391 MACHINE_START(SMDK6410, "SMDK6410")
392 /* Maintainer: Ben Dooks <ben@fluff.org> */
393 .phys_io = S3C_PA_UART & 0xfff00000,
394 .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
395 .boot_params = S3C64XX_PA_SDRAM + 0x100,
397 .init_irq = s3c6410_init_irq,
398 .map_io = smdk6410_map_io,
399 .init_machine = smdk6410_machine_init,
400 .timer = &s3c24xx_timer,
401 MACHINE_END