OMAP3 SRF: Add CORE rate table param in OMAP-PM
[linux-ginger.git] / arch / arm / plat-stmp3xxx / irq.c
blob20de4e0401efd68034b8bbd324ca54897d15f1cb
1 /*
2 * Freescale STMP37XX/STMP378X common interrupt handling code
4 * Author: Vladislav Buzov <vbuzov@embeddedalley.com>
6 * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved.
7 * Copyright 2008 Embedded Alley Solutions, Inc All Rights Reserved.
8 */
11 * The code contained herein is licensed under the GNU General Public
12 * License. You may obtain a copy of the GNU General Public License
13 * Version 2 or later at the following locations:
15 * http://www.opensource.org/licenses/gpl-license.html
16 * http://www.gnu.org/copyleft/gpl.html
18 #include <linux/init.h>
19 #include <linux/interrupt.h>
20 #include <linux/delay.h>
21 #include <linux/irq.h>
22 #include <linux/sysdev.h>
24 #include <mach/stmp3xxx.h>
25 #include <mach/platform.h>
26 #include <mach/regs-icoll.h>
28 void __init stmp3xxx_init_irq(struct irq_chip *chip)
30 unsigned int i, lv;
32 /* Reset the interrupt controller */
33 stmp3xxx_reset_block(REGS_ICOLL_BASE + HW_ICOLL_CTRL, true);
35 /* Disable all interrupts initially */
36 for (i = 0; i < NR_REAL_IRQS; i++) {
37 chip->mask(i);
38 set_irq_chip(i, chip);
39 set_irq_handler(i, handle_level_irq);
40 set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
43 /* Ensure vector is cleared */
44 for (lv = 0; lv < 4; lv++)
45 __raw_writel(1 << lv, REGS_ICOLL_BASE + HW_ICOLL_LEVELACK);
46 __raw_writel(0, REGS_ICOLL_BASE + HW_ICOLL_VECTOR);
48 /* Barrier */
49 (void)__raw_readl(REGS_ICOLL_BASE + HW_ICOLL_STAT);