2 * SPCA508 chip based cameras subdriver
4 * Copyright (C) 2009 Jean-Francois Moine <http://moinejf.free.fr>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #define MODULE_NAME "spca508"
25 MODULE_AUTHOR("Michel Xhaard <mxhaard@users.sourceforge.net>");
26 MODULE_DESCRIPTION("GSPCA/SPCA508 USB Camera Driver");
27 MODULE_LICENSE("GPL");
29 /* specific webcam descriptor */
31 struct gspca_dev gspca_dev
; /* !! must be the first item */
36 #define CreativeVista 0
37 #define HamaUSBSightcam 1
38 #define HamaUSBSightcam2 2
39 #define IntelEasyPCCamera 3
40 #define MicroInnovationIC200 4
41 #define ViewQuestVQ110 5
44 /* V4L2 controls supported by the driver */
45 static int sd_setbrightness(struct gspca_dev
*gspca_dev
, __s32 val
);
46 static int sd_getbrightness(struct gspca_dev
*gspca_dev
, __s32
*val
);
48 static struct ctrl sd_ctrls
[] = {
51 .id
= V4L2_CID_BRIGHTNESS
,
52 .type
= V4L2_CTRL_TYPE_INTEGER
,
57 #define BRIGHTNESS_DEF 128
58 .default_value
= BRIGHTNESS_DEF
,
60 .set
= sd_setbrightness
,
61 .get
= sd_getbrightness
,
65 static const struct v4l2_pix_format sif_mode
[] = {
66 {160, 120, V4L2_PIX_FMT_SPCA508
, V4L2_FIELD_NONE
,
68 .sizeimage
= 160 * 120 * 3 / 2,
69 .colorspace
= V4L2_COLORSPACE_SRGB
,
71 {176, 144, V4L2_PIX_FMT_SPCA508
, V4L2_FIELD_NONE
,
73 .sizeimage
= 176 * 144 * 3 / 2,
74 .colorspace
= V4L2_COLORSPACE_SRGB
,
76 {320, 240, V4L2_PIX_FMT_SPCA508
, V4L2_FIELD_NONE
,
78 .sizeimage
= 320 * 240 * 3 / 2,
79 .colorspace
= V4L2_COLORSPACE_SRGB
,
81 {352, 288, V4L2_PIX_FMT_SPCA508
, V4L2_FIELD_NONE
,
83 .sizeimage
= 352 * 288 * 3 / 2,
84 .colorspace
= V4L2_COLORSPACE_SRGB
,
88 /* Frame packet header offsets for the spca508 */
89 #define SPCA508_OFFSET_DATA 37
92 * Initialization data: this is the first set-up data written to the
93 * device (before the open data).
95 static const u16 spca508_init_data
[][2] =
99 {0x0020, 0x8112}, /* Video drop enable, ISO streaming disable */
100 {0x0003, 0x8111}, /* Reset compression & memory */
101 {0x0000, 0x8110}, /* Disable all outputs */
102 /* READ {0x0000, 0x8114} -> 0000: 00 */
103 {0x0000, 0x8114}, /* SW GPIO data */
104 {0x0008, 0x8110}, /* Enable charge pump output */
105 {0x0002, 0x8116}, /* 200 kHz pump clock */
106 /* UNKNOWN DIRECTION (URB_FUNCTION_SELECT_INTERFACE:) */
107 {0x0003, 0x8111}, /* Reset compression & memory */
108 {0x0000, 0x8111}, /* Normal mode (not reset) */
110 /* Enable charge pump output, sync.serial,external 2x clock */
111 {0x000d, 0x8114}, /* SW GPIO data */
112 {0x0002, 0x8116}, /* 200 kHz pump clock */
113 {0x0020, 0x8112}, /* Video drop enable, ISO streaming disable */
114 /* --------------------------------------- */
115 {0x000f, 0x8402}, /* memory bank */
116 {0x0000, 0x8403}, /* ... address */
117 /* --------------------------------------- */
118 /* 0x88__ is Synchronous Serial Interface. */
119 /* TBD: This table could be expressed more compactly */
120 /* using spca508_write_i2c_vector(). */
121 /* TBD: Should see if the values in spca50x_i2c_data */
122 /* would work with the VQ110 instead of the values */
124 {0x00c0, 0x8804}, /* SSI slave addr */
125 {0x0008, 0x8802}, /* 375 Khz SSI clock */
126 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
127 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
128 {0x0008, 0x8802}, /* 375 Khz SSI clock */
129 {0x0012, 0x8801}, /* SSI reg addr */
130 {0x0080, 0x8800}, /* SSI data to write */
131 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
132 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
133 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
134 {0x0008, 0x8802}, /* 375 Khz SSI clock */
135 {0x0012, 0x8801}, /* SSI reg addr */
136 {0x0000, 0x8800}, /* SSI data to write */
137 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
138 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
139 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
140 {0x0008, 0x8802}, /* 375 Khz SSI clock */
141 {0x0011, 0x8801}, /* SSI reg addr */
142 {0x0040, 0x8800}, /* SSI data to write */
143 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
144 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
145 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
149 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
150 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
151 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
155 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
156 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
157 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
161 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
162 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
163 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
167 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
168 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
169 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
173 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
174 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
175 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
179 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
180 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
181 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
185 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
186 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
187 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
191 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
192 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
193 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
197 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
198 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
199 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
203 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
204 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
205 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
209 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
210 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
211 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
215 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
216 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
217 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
221 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
222 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
223 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
227 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
228 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
229 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
233 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
234 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
235 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
239 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
240 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
241 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
245 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
246 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
247 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
251 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
252 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
253 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
257 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
258 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
259 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
263 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
264 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
265 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
269 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
270 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
271 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
275 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
276 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
277 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
281 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
282 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
283 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
287 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
288 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
289 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
293 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
294 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
295 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
299 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
300 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
301 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
305 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
306 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
307 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
311 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
312 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
313 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
317 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
318 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
319 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
323 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
324 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
325 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
329 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
330 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
331 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
335 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
336 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
337 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
341 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
342 /* --------------------------------------- */
343 {0x0012, 0x8700}, /* Clock speed 48Mhz/(2+2)/2= 6 Mhz */
344 {0x0000, 0x8701}, /* CKx1 clock delay adj */
345 {0x0000, 0x8701}, /* CKx1 clock delay adj */
346 {0x0001, 0x870c}, /* CKOx2 output */
347 /* --------------------------------------- */
348 {0x0080, 0x8600}, /* Line memory read counter (L) */
349 {0x0001, 0x8606}, /* reserved */
350 {0x0064, 0x8607}, /* Line memory read counter (H) 0x6480=25,728 */
351 {0x002a, 0x8601}, /* CDSP sharp interpolation mode,
352 * line sel for color sep, edge enhance enab */
353 {0x0000, 0x8602}, /* optical black level for user settng = 0 */
354 {0x0080, 0x8600}, /* Line memory read counter (L) */
355 {0x000a, 0x8603}, /* optical black level calc mode:
356 * auto; optical black offset = 10 */
357 {0x00df, 0x865b}, /* Horiz offset for valid pixels (L)=0xdf */
358 {0x0012, 0x865c}, /* Vert offset for valid lines (L)=0x12 */
360 /* The following two lines seem to be the "wrong" resolution. */
361 /* But perhaps these indicate the actual size of the sensor */
362 /* rather than the size of the current video mode. */
363 {0x0058, 0x865d}, /* Horiz valid pixels (*4) (L) = 352 */
364 {0x0048, 0x865e}, /* Vert valid lines (*4) (L) = 288 */
366 {0x0015, 0x8608}, /* A11 Coef ... */
375 {0x0001, 0x8611}, /* R offset for white balance ... */
379 {0x005b, 0x8651}, /* R gain for white balance ... */
384 {0x0001, 0x863f}, /* Fixed gamma correction enable, USB control,
385 * lum filter disable, lum noise clip disable */
386 {0x00a1, 0x8656}, /* Window1 size 256x256, Windows2 size 64x64,
387 * gamma look-up disable,
388 * new edge enhancement enable */
389 {0x0018, 0x8657}, /* Edge gain high thresh */
390 {0x0020, 0x8658}, /* Edge gain low thresh */
391 {0x000a, 0x8659}, /* Edge bandwidth high threshold */
392 {0x0005, 0x865a}, /* Edge bandwidth low threshold */
393 /* -------------------------------- */
394 {0x0030, 0x8112}, /* Video drop enable, ISO streaming enable */
395 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
396 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
398 {0x0034, 0x8801}, /* SSI reg addr */
400 /* SSI data to write */
401 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
402 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
403 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
407 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
409 /* ----- Read back coefs we wrote earlier. */
410 /* READ { 0x0000, 0x8608 } -> 0000: 15 */
411 /* READ { 0x0000, 0x8609 } -> 0000: 30 */
412 /* READ { 0x0000, 0x860a } -> 0000: fb */
413 /* READ { 0x0000, 0x860b } -> 0000: 3e */
414 /* READ { 0x0000, 0x860c } -> 0000: ce */
415 /* READ { 0x0000, 0x860d } -> 0000: f4 */
416 /* READ { 0x0000, 0x860e } -> 0000: eb */
417 /* READ { 0x0000, 0x860f } -> 0000: dc */
418 /* READ { 0x0000, 0x8610 } -> 0000: 39 */
419 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
420 /* READ { 0x0001, 0x8802 } -> 0000: 08 */
424 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
427 /* This chunk is seemingly redundant with */
428 /* earlier commands (A11 Coef...), but if I disable it, */
429 /* the image appears too dark. Maybe there was some kind of */
430 /* reset since the earlier commands, so this is necessary again. */
442 {0x0000, 0x8508}, /* Disable compression. */
443 /* Previous line was:
444 {0x0021, 0x8508}, * Enable compression. */
445 {0x0032, 0x850b}, /* compression stuff */
446 {0x0003, 0x8509}, /* compression stuff */
447 {0x0011, 0x850a}, /* compression stuff */
448 {0x0021, 0x850d}, /* compression stuff */
449 {0x0010, 0x850c}, /* compression stuff */
450 {0x0003, 0x8500}, /* *** Video mode: 160x120 */
451 {0x0001, 0x8501}, /* Hardware-dominated snap control */
452 {0x0061, 0x8656}, /* Window1 size 128x128, Windows2 size 128x128,
453 * gamma look-up disable,
454 * new edge enhancement enable */
455 {0x0018, 0x8617}, /* Window1 start X (*2) */
456 {0x0008, 0x8618}, /* Window1 start Y (*2) */
457 {0x0061, 0x8656}, /* Window1 size 128x128, Windows2 size 128x128,
458 * gamma look-up disable,
459 * new edge enhancement enable */
460 {0x0058, 0x8619}, /* Window2 start X (*2) */
461 {0x0008, 0x861a}, /* Window2 start Y (*2) */
462 {0x00ff, 0x8615}, /* High lum thresh for white balance */
463 {0x0000, 0x8616}, /* Low lum thresh for white balance */
464 {0x0012, 0x8700}, /* Clock speed 48Mhz/(2+2)/2= 6 Mhz */
465 {0x0012, 0x8700}, /* Clock speed 48Mhz/(2+2)/2= 6 Mhz */
466 /* READ { 0x0000, 0x8656 } -> 0000: 61 */
467 {0x0028, 0x8802}, /* 375 Khz SSI clock, SSI r/w sync with VSYNC */
468 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
469 /* READ { 0x0001, 0x8802 } -> 0000: 28 */
470 {0x1f28, 0x8802}, /* 375 Khz SSI clock, SSI r/w sync with VSYNC */
471 {0x0010, 0x8801}, /* SSI reg addr */
472 {0x003e, 0x8800}, /* SSI data to write */
473 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
475 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
476 /* READ { 0x0001, 0x8802 } -> 0000: 28 */
480 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
481 {0x0001, 0x8602}, /* optical black level for user settning = 1 */
484 {0x0023, 0x8700}, /* Clock speed 48Mhz/(3+2)/4= 2.4 Mhz */
485 {0x000f, 0x8602}, /* optical black level for user settning = 15 */
488 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
489 /* READ { 0x0001, 0x8802 } -> 0000: 28 */
493 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
494 {0x002f, 0x8651}, /* R gain for white balance ... */
496 /* READ { 0x0000, 0x8655 } -> 0000: 00 */
499 {0x0030, 0x8112}, /* Video drop enable, ISO streaming enable */
500 {0x0020, 0x8112}, /* Video drop enable, ISO streaming disable */
501 /* UNKNOWN DIRECTION (URB_FUNCTION_SELECT_INTERFACE: (ALT=0) ) */
506 * Initialization data for Intel EasyPC Camera CS110
508 static const u16 spca508cs110_init_data
[][2] = {
509 {0x0000, 0x870b}, /* Reset CTL3 */
510 {0x0003, 0x8111}, /* Soft Reset compression, memory, TG & CDSP */
511 {0x0000, 0x8111}, /* Normal operation on reset */
513 /* External Clock 2x & Synchronous Serial Interface Output */
514 {0x0020, 0x8112}, /* Video Drop packet enable */
515 {0x0000, 0x8114}, /* Software GPIO output data */
521 /* Initial sequence Synchronous Serial Interface */
522 {0x000f, 0x8402}, /* Memory bank Address */
523 {0x0000, 0x8403}, /* Memory bank Address */
524 {0x00ba, 0x8804}, /* SSI Slave address */
525 {0x0010, 0x8802}, /* 93.75kHz SSI Clock Two DataByte */
526 {0x0010, 0x8802}, /* 93.75kHz SSI Clock two DataByte */
529 {0x000a, 0x8805}, /* a - NWG: Dunno what this is about */
563 {0x0002, 0x8704}, /* External input CKIx1 */
564 {0x0001, 0x8606}, /* 1 Line memory Read Counter (H) Result: (d)410 */
565 {0x009a, 0x8600}, /* Line memory Read Counter (L) */
566 {0x0001, 0x865b}, /* 1 Horizontal Offset for Valid Pixel(L) */
567 {0x0003, 0x865c}, /* 3 Vertical Offset for Valid Lines(L) */
568 {0x0058, 0x865d}, /* 58 Horizontal Valid Pixel Window(L) */
570 {0x0006, 0x8660}, /* Nibble data + input order */
572 {0x000a, 0x8602}, /* Optical black level set to 0x0a */
573 {0x0000, 0x8603}, /* Optical black level Offset */
575 /* {0x0000, 0x8611}, * 0 R Offset for white Balance */
576 /* {0x0000, 0x8612}, * 1 Gr Offset for white Balance */
577 /* {0x0000, 0x8613}, * 1f B Offset for white Balance */
578 /* {0x0000, 0x8614}, * f0 Gb Offset for white Balance */
580 {0x0040, 0x8651}, /* 2b BLUE gain for white balance good at all 60 */
581 {0x0030, 0x8652}, /* 41 Gr Gain for white Balance (L) */
582 {0x0035, 0x8653}, /* 26 RED gain for white balance */
583 {0x0035, 0x8654}, /* 40Gb Gain for white Balance (L) */
585 /* Fixed Gamma correction enabled (makes colours look better) */
588 /* High bits for white balance*****brightness control*** */
592 static const u16 spca508_sightcam_init_data
[][2] = {
593 /* This line seems to setup the frame/canvas */
596 /* Theese 6 lines are needed to startup the webcam */
604 /* This part seems to make the pictures darker? (autobrightness?) */
619 /* This section is just needed, it probably
620 * does something like the previous section,
621 * but the cam won't start if it's not included.
634 /* Makes the picture darker - and the
635 * cam won't start if not included
644 /* seems to place the colors ontop of each other #1 */
650 /* if not included the pictures becomes _very_ dark */
655 /* seems to place the colors ontop of each other #2 */
661 /* webcam won't start if not included */
667 /* adjusts the colors */
675 static const u16 spca508_sightcam2_init_data
[][2] = {
1012 /* This line starts it all, it is not needed here */
1013 /* since it has been build into the driver */
1014 /* jfm: don't start now */
1015 /* {0x0030, 0x8112}, */
1020 * Initialization data for Creative Webcam Vista
1022 static const u16 spca508_vista_init_data
[][2] = {
1023 {0x0008, 0x8200}, /* Clear register */
1024 {0x0000, 0x870b}, /* Reset CTL3 */
1025 {0x0020, 0x8112}, /* Video Drop packet enable */
1026 {0x0003, 0x8111}, /* Soft Reset compression, memory, TG & CDSP */
1027 {0x0000, 0x8110}, /* Disable everything */
1028 {0x0000, 0x8114}, /* Software GPIO output data */
1033 {0x0090, 0x8110}, /* Enable: SSI output, External 2X clock output */
1041 {0x000f, 0x8402}, /* Memory bank Address */
1042 {0x0000, 0x8403}, /* Memory bank Address */
1043 {0x00ba, 0x8804}, /* SSI Slave address */
1044 {0x0010, 0x8802}, /* 93.75kHz SSI Clock Two DataByte */
1046 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1047 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1048 {0x0010, 0x8802}, /* Will write 2 bytes (DATA1+DATA2) */
1049 {0x0020, 0x8801}, /* Register address for SSI read/write */
1050 {0x0044, 0x8805}, /* DATA2 */
1051 {0x0004, 0x8800}, /* DATA1 -> write triggered */
1052 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1054 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1055 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1060 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1062 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1063 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1068 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1070 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1071 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1076 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1078 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1079 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1084 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1086 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1087 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1092 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1094 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1095 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1100 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1102 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1103 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1108 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1110 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1111 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1116 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1118 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1119 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1124 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1126 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1127 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1132 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1134 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1135 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1140 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1142 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1143 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1148 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1150 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1151 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1156 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1158 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1159 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1164 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1166 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1167 /* READ { 0x0001, 0x8802 } -> 0000: 10 */
1172 /* READ { 0x0001, 0x8803 } -> 0000: 00 */
1175 {0x0002, 0x8704}, /* External input CKIx1 */
1176 {0x0001, 0x870c}, /* Select CKOx2 output */
1177 {0x009a, 0x8600}, /* Line memory Read Counter (L) */
1178 {0x0001, 0x8606}, /* 1 Line memory Read Counter (H) Result: (d)410 */
1183 {0x0001, 0x865b}, /* 1 Horizontal Offset for Valid Pixel(L) */
1184 {0x0003, 0x865c}, /* Vertical offset for valid lines (L) */
1185 {0x0058, 0x865d}, /* Horizontal valid pixels window (L) */
1186 {0x0048, 0x865e}, /* Vertical valid lines window (L) */
1190 /* Enable nibble data input, select nibble input order */
1192 {0x0013, 0x8608}, /* A11 Coeficients for color correction */
1194 /* Note: these values are confirmed at the end of array */
1195 {0x0005, 0x860a}, /* ... */
1201 {0x0025, 0x8610}, /* A33 Coef. */
1202 {0x00fc, 0x8611}, /* White balance offset: R */
1203 {0x0001, 0x8612}, /* White balance offset: Gr */
1204 {0x00fe, 0x8613}, /* White balance offset: B */
1205 {0x0000, 0x8614}, /* White balance offset: Gb */
1207 {0x0064, 0x8651}, /* R gain for white balance (L) */
1208 {0x0040, 0x8652}, /* Gr gain for white balance (L) */
1209 {0x0066, 0x8653}, /* B gain for white balance (L) */
1210 {0x0040, 0x8654}, /* Gb gain for white balance (L) */
1211 {0x0001, 0x863f}, /* Enable fixed gamma correction */
1213 {0x00a1, 0x8656}, /* Size - Window1: 256x256, Window2: 128x128,
1214 * UV division: UV no change,
1215 * Enable New edge enhancement */
1216 {0x0018, 0x8657}, /* Edge gain high threshold */
1217 {0x0020, 0x8658}, /* Edge gain low threshold */
1218 {0x000a, 0x8659}, /* Edge bandwidth high threshold */
1219 {0x0005, 0x865a}, /* Edge bandwidth low threshold */
1220 {0x0064, 0x8607}, /* UV filter enable */
1223 {0x0000, 0x86b0}, /* Bad pixels compensation address */
1224 {0x00dc, 0x86b1}, /* X coord for bad pixels compensation (L) */
1226 {0x0009, 0x86b3}, /* Y coord for bad pixels compensation (L) */
1254 /* READ { 0x0000, 0x8608 } -> 0000: 13 */
1255 /* READ { 0x0000, 0x8609 } -> 0000: 28 */
1256 /* READ { 0x0000, 0x8610 } -> 0000: 05 */
1257 /* READ { 0x0000, 0x8611 } -> 0000: 25 */
1258 /* READ { 0x0000, 0x8612 } -> 0000: e1 */
1259 /* READ { 0x0000, 0x8613 } -> 0000: fa */
1260 /* READ { 0x0000, 0x8614 } -> 0000: f4 */
1261 /* READ { 0x0000, 0x8615 } -> 0000: e8 */
1262 /* READ { 0x0000, 0x8616 } -> 0000: 25 */
1266 static int reg_write(struct usb_device
*dev
,
1267 u16 index
, u16 value
)
1271 ret
= usb_control_msg(dev
,
1272 usb_sndctrlpipe(dev
, 0),
1274 USB_TYPE_VENDOR
| USB_RECIP_DEVICE
,
1275 value
, index
, NULL
, 0, 500);
1276 PDEBUG(D_USBO
, "reg write i:0x%04x = 0x%02x",
1279 PDEBUG(D_ERR
|D_USBO
, "reg write: error %d", ret
);
1284 /* returns: negative is error, pos or zero is data */
1285 static int reg_read(struct gspca_dev
*gspca_dev
,
1286 u16 index
) /* wIndex */
1290 ret
= usb_control_msg(gspca_dev
->dev
,
1291 usb_rcvctrlpipe(gspca_dev
->dev
, 0),
1293 USB_DIR_IN
| USB_TYPE_VENDOR
| USB_RECIP_DEVICE
,
1296 gspca_dev
->usb_buf
, 1,
1298 PDEBUG(D_USBI
, "reg read i:%04x --> %02x",
1299 index
, gspca_dev
->usb_buf
[0]);
1301 PDEBUG(D_ERR
|D_USBI
, "reg_read err %d", ret
);
1304 return gspca_dev
->usb_buf
[0];
1307 /* send 1 or 2 bytes to the sensor via the Synchronous Serial Interface */
1308 static int ssi_w(struct gspca_dev
*gspca_dev
,
1311 struct usb_device
*dev
= gspca_dev
->dev
;
1314 ret
= reg_write(dev
, 0x8802, reg
>> 8);
1317 ret
= reg_write(dev
, 0x8801, reg
& 0x00ff);
1320 if ((reg
& 0xff00) == 0x1000) { /* if 2 bytes */
1321 ret
= reg_write(dev
, 0x8805, val
& 0x00ff);
1326 ret
= reg_write(dev
, 0x8800, val
);
1330 /* poll until not busy */
1333 ret
= reg_read(gspca_dev
, 0x8803);
1336 if (gspca_dev
->usb_buf
[0] == 0)
1339 PDEBUG(D_ERR
, "ssi_w busy %02x",
1340 gspca_dev
->usb_buf
[0]);
1351 static int write_vector(struct gspca_dev
*gspca_dev
,
1352 const u16 (*data
)[2])
1354 struct usb_device
*dev
= gspca_dev
->dev
;
1357 while ((*data
)[1] != 0) {
1358 if ((*data
)[1] & 0x8000) {
1359 if ((*data
)[1] == 0xdd00) /* delay */
1362 ret
= reg_write(dev
, (*data
)[1], (*data
)[0]);
1364 ret
= ssi_w(gspca_dev
, (*data
)[1], (*data
)[0]);
1373 /* this function is called at probe time */
1374 static int sd_config(struct gspca_dev
*gspca_dev
,
1375 const struct usb_device_id
*id
)
1377 struct sd
*sd
= (struct sd
*) gspca_dev
;
1380 const u16 (*init_data
)[2];
1381 static const u16 (*(init_data_tb
[]))[2] = {
1382 spca508_vista_init_data
, /* CreativeVista 0 */
1383 spca508_sightcam_init_data
, /* HamaUSBSightcam 1 */
1384 spca508_sightcam2_init_data
, /* HamaUSBSightcam2 2 */
1385 spca508cs110_init_data
, /* IntelEasyPCCamera 3 */
1386 spca508cs110_init_data
, /* MicroInnovationIC200 4 */
1387 spca508_init_data
, /* ViewQuestVQ110 5 */
1390 /* Read from global register the USB product and vendor IDs, just to
1391 * prove that we can communicate with the device. This works, which
1392 * confirms at we are communicating properly and that the device
1394 data1
= reg_read(gspca_dev
, 0x8104);
1395 data2
= reg_read(gspca_dev
, 0x8105);
1396 PDEBUG(D_PROBE
, "Webcam Vendor ID: 0x%02x%02x", data2
, data1
);
1398 data1
= reg_read(gspca_dev
, 0x8106);
1399 data2
= reg_read(gspca_dev
, 0x8107);
1400 PDEBUG(D_PROBE
, "Webcam Product ID: 0x%02x%02x", data2
, data1
);
1402 data1
= reg_read(gspca_dev
, 0x8621);
1403 PDEBUG(D_PROBE
, "Window 1 average luminance: %d", data1
);
1405 cam
= &gspca_dev
->cam
;
1406 cam
->cam_mode
= sif_mode
;
1407 cam
->nmodes
= ARRAY_SIZE(sif_mode
);
1409 sd
->subtype
= id
->driver_info
;
1410 sd
->brightness
= BRIGHTNESS_DEF
;
1412 init_data
= init_data_tb
[sd
->subtype
];
1413 return write_vector(gspca_dev
, init_data
);
1416 /* this function is called at probe and resume time */
1417 static int sd_init(struct gspca_dev
*gspca_dev
)
1422 static int sd_start(struct gspca_dev
*gspca_dev
)
1426 mode
= gspca_dev
->cam
.cam_mode
[gspca_dev
->curr_mode
].priv
;
1427 reg_write(gspca_dev
->dev
, 0x8500, mode
);
1431 reg_write(gspca_dev
->dev
, 0x8700, 0x28); /* clock */
1436 reg_write(gspca_dev
->dev
, 0x8700, 0x23); /* clock */
1439 reg_write(gspca_dev
->dev
, 0x8112, 0x10 | 0x20);
1443 static void sd_stopN(struct gspca_dev
*gspca_dev
)
1445 /* Video ISO disable, Video Drop Packet enable: */
1446 reg_write(gspca_dev
->dev
, 0x8112, 0x20);
1449 static void sd_pkt_scan(struct gspca_dev
*gspca_dev
,
1450 struct gspca_frame
*frame
, /* target */
1451 u8
*data
, /* isoc packet */
1452 int len
) /* iso packet length */
1455 case 0: /* start of frame */
1456 frame
= gspca_frame_add(gspca_dev
, LAST_PACKET
, frame
,
1458 data
+= SPCA508_OFFSET_DATA
;
1459 len
-= SPCA508_OFFSET_DATA
;
1460 gspca_frame_add(gspca_dev
, FIRST_PACKET
, frame
,
1463 case 0xff: /* drop */
1468 gspca_frame_add(gspca_dev
, INTER_PACKET
, frame
,
1474 static void setbrightness(struct gspca_dev
*gspca_dev
)
1476 struct sd
*sd
= (struct sd
*) gspca_dev
;
1477 u8 brightness
= sd
->brightness
;
1479 /* MX seem contrast */
1480 reg_write(gspca_dev
->dev
, 0x8651, brightness
);
1481 reg_write(gspca_dev
->dev
, 0x8652, brightness
);
1482 reg_write(gspca_dev
->dev
, 0x8653, brightness
);
1483 reg_write(gspca_dev
->dev
, 0x8654, brightness
);
1486 static int sd_setbrightness(struct gspca_dev
*gspca_dev
, __s32 val
)
1488 struct sd
*sd
= (struct sd
*) gspca_dev
;
1490 sd
->brightness
= val
;
1491 if (gspca_dev
->streaming
)
1492 setbrightness(gspca_dev
);
1496 static int sd_getbrightness(struct gspca_dev
*gspca_dev
, __s32
*val
)
1498 struct sd
*sd
= (struct sd
*) gspca_dev
;
1500 *val
= sd
->brightness
;
1504 /* sub-driver description */
1505 static const struct sd_desc sd_desc
= {
1506 .name
= MODULE_NAME
,
1508 .nctrls
= ARRAY_SIZE(sd_ctrls
),
1509 .config
= sd_config
,
1513 .pkt_scan
= sd_pkt_scan
,
1516 /* -- module initialisation -- */
1517 static const __devinitdata
struct usb_device_id device_table
[] = {
1518 {USB_DEVICE(0x0130, 0x0130), .driver_info
= HamaUSBSightcam
},
1519 {USB_DEVICE(0x041e, 0x4018), .driver_info
= CreativeVista
},
1520 {USB_DEVICE(0x0461, 0x0815), .driver_info
= MicroInnovationIC200
},
1521 {USB_DEVICE(0x0733, 0x0110), .driver_info
= ViewQuestVQ110
},
1522 {USB_DEVICE(0x0af9, 0x0010), .driver_info
= HamaUSBSightcam
},
1523 {USB_DEVICE(0x0af9, 0x0011), .driver_info
= HamaUSBSightcam2
},
1524 {USB_DEVICE(0x8086, 0x0110), .driver_info
= IntelEasyPCCamera
},
1527 MODULE_DEVICE_TABLE(usb
, device_table
);
1529 /* -- device connect -- */
1530 static int sd_probe(struct usb_interface
*intf
,
1531 const struct usb_device_id
*id
)
1533 return gspca_dev_probe(intf
, id
, &sd_desc
, sizeof(struct sd
),
1537 static struct usb_driver sd_driver
= {
1538 .name
= MODULE_NAME
,
1539 .id_table
= device_table
,
1541 .disconnect
= gspca_disconnect
,
1543 .suspend
= gspca_suspend
,
1544 .resume
= gspca_resume
,
1548 /* -- module insert / remove -- */
1549 static int __init
sd_mod_init(void)
1553 ret
= usb_register(&sd_driver
);
1556 PDEBUG(D_PROBE
, "registered");
1559 static void __exit
sd_mod_exit(void)
1561 usb_deregister(&sd_driver
);
1562 PDEBUG(D_PROBE
, "deregistered");
1565 module_init(sd_mod_init
);
1566 module_exit(sd_mod_exit
);