arch/arm/mach-omap2/resource34xx.h

   1 /*
   2  * linux/arch/arm/mach-omap2/resource34xx.h
   3  *
   4  * OMAP3 resource definitions
   5  *
   6  * Copyright (C) 2007-2008 Texas Instruments, Inc.
   7  * Rajendra Nayak <rnayak@ti.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  *
  13  * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
  14  * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
  15  * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
  16  *
  17  * History:
  18  *
  19  */
  20
  21 #ifndef __ARCH_ARM_MACH_OMAP2_RESOURCE_H
  22 #define __ARCH_ARM_MACH_OMAP2_RESOURCE_H
  23
  24 #include <plat/resource.h>
  25 #include <plat/powerdomain.h>
  26
  27 /*
  28  * mpu_latency/core_latency are used to control the cpuidle C state.
  29  */
  30 void init_latency(struct shared_resource *resp);
  31 int set_latency(struct shared_resource *resp, u32 target_level);
  32
  33 static u8 mpu_qos_req_added;
  34 static u8 core_qos_req_added;
  35
  36 static struct shared_resource_ops lat_res_ops = {
  37         .init           = init_latency,
  38         .change_level   = set_latency,
  39 };
  40
  41 static struct shared_resource mpu_latency = {
  42         .name           = "mpu_latency",
  43         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
  44         .resource_data  = &mpu_qos_req_added,
  45         .ops            = &lat_res_ops,
  46 };
  47
  48 static struct shared_resource core_latency = {
  49         .name           = "core_latency",
  50         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
  51         .resource_data  = &core_qos_req_added,
  52         .ops            = &lat_res_ops,
  53 };
  54
  55 /*
  56  * Power domain Latencies are used to control the target Power
  57  * domain state once all clocks for the power domain
  58  * are released.
  59  */
  60 void init_pd_latency(struct shared_resource *resp);
  61 int set_pd_latency(struct shared_resource *resp, u32 target_level);
  62
  63 /* Power Domain Latency levels */
  64 #define PD_LATENCY_OFF          0x0
  65 #define PD_LATENCY_RET          0x1
  66 #define PD_LATENCY_INACT        0x2
  67 #define PD_LATENCY_ON           0x3
  68
  69 #define PD_LATENCY_MAXLEVEL     0x4
  70
  71 struct pd_latency_db {
  72         char *pwrdm_name;
  73         struct powerdomain *pd;
  74         /* Latencies for each state transition, stored in us */
  75         unsigned long latency[PD_LATENCY_MAXLEVEL];
  76 };
  77
  78 static struct shared_resource_ops pd_lat_res_ops = {
  79         .init           = init_pd_latency,
  80         .change_level   = set_pd_latency,
  81 };
  82
  83 static struct pd_latency_db iva2_pwrdm_lat_db = {
  84         .pwrdm_name = "iva2_pwrdm",
  85         .latency[PD_LATENCY_OFF] = 1100,
  86         .latency[PD_LATENCY_RET] = 350,
  87         .latency[PD_LATENCY_INACT] = -1,
  88         .latency[PD_LATENCY_ON] = 0
  89 };
  90
  91 static struct shared_resource iva2_pwrdm_latency = {
  92         .name           = "iva2_pwrdm_latency",
  93         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
  94         .resource_data  = &iva2_pwrdm_lat_db,
  95         .ops            = &pd_lat_res_ops,
  96 };
  97
  98 static struct pd_latency_db gfx_pwrdm_lat_db = {
  99         .pwrdm_name = "gfx_pwrdm",
 100         .latency[PD_LATENCY_OFF] = 1000,
 101         .latency[PD_LATENCY_RET] = 100,
 102         .latency[PD_LATENCY_INACT] = -1,
 103         .latency[PD_LATENCY_ON]  = 0
 104 };
 105
 106 static struct shared_resource gfx_pwrdm_latency = {
 107         .name           = "gfx_pwrdm_latency",
 108         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES1),
 109         .resource_data  = &gfx_pwrdm_lat_db,
 110         .ops            = &pd_lat_res_ops,
 111 };
 112
 113 static struct shared_resource sgx_pwrdm_latency = {
 114         .name           = "sgx_pwrdm_latency",
 115         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
 116         .resource_data  = &gfx_pwrdm_lat_db,
 117         .ops            = &pd_lat_res_ops,
 118 };
 119
 120 static struct pd_latency_db dss_pwrdm_lat_db = {
 121         .pwrdm_name = "dss_pwrdm",
 122         .latency[PD_LATENCY_OFF] = 70,
 123         .latency[PD_LATENCY_RET] = 20,
 124         .latency[PD_LATENCY_INACT] = -1,
 125         .latency[PD_LATENCY_ON]  = 0
 126 };
 127
 128 static struct shared_resource dss_pwrdm_latency = {
 129         .name           = "dss_pwrdm_latency",
 130         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 131         .resource_data  = &dss_pwrdm_lat_db,
 132         .ops            = &pd_lat_res_ops,
 133 };
 134
 135 static struct pd_latency_db cam_pwrdm_lat_db = {
 136         .pwrdm_name = "cam_pwrdm",
 137         .latency[PD_LATENCY_OFF] = 850,
 138         .latency[PD_LATENCY_RET] = 35,
 139         .latency[PD_LATENCY_INACT] = -1,
 140         .latency[PD_LATENCY_ON]  = 0
 141 };
 142
 143 static struct shared_resource cam_pwrdm_latency = {
 144         .name           = "cam_pwrdm_latency",
 145         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 146         .resource_data  = &cam_pwrdm_lat_db,
 147         .ops            = &pd_lat_res_ops,
 148 };
 149
 150 static struct pd_latency_db per_pwrdm_lat_db = {
 151         .pwrdm_name = "per_pwrdm",
 152         .latency[PD_LATENCY_OFF] = 200,
 153         .latency[PD_LATENCY_RET] = 110,
 154         .latency[PD_LATENCY_INACT] = -1,
 155         .latency[PD_LATENCY_ON]  = 0
 156 };
 157
 158 static struct shared_resource per_pwrdm_latency = {
 159         .name           = "per_pwrdm_latency",
 160         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 161         .resource_data  = &per_pwrdm_lat_db,
 162         .ops            = &pd_lat_res_ops,
 163 };
 164
 165 static struct pd_latency_db neon_pwrdm_lat_db = {
 166         .pwrdm_name = "neon_pwrdm",
 167         .latency[PD_LATENCY_OFF] = 200,
 168         .latency[PD_LATENCY_RET] = 35,
 169         .latency[PD_LATENCY_INACT] = -1,
 170         .latency[PD_LATENCY_ON]  = 0
 171 };
 172
 173 static struct shared_resource neon_pwrdm_latency = {
 174         .name           = "neon_pwrdm_latency",
 175         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 176         .resource_data  = &neon_pwrdm_lat_db,
 177         .ops            = &pd_lat_res_ops,
 178 };
 179
 180 static struct pd_latency_db usbhost_pwrdm_lat_db = {
 181         .pwrdm_name = "usbhost_pwrdm",
 182         .latency[PD_LATENCY_OFF] = 800,
 183         .latency[PD_LATENCY_RET] = 150,
 184         .latency[PD_LATENCY_INACT] = -1,
 185         .latency[PD_LATENCY_ON]  = 0
 186 };
 187
 188 static struct shared_resource usbhost_pwrdm_latency = {
 189         .name           = "usbhost_pwrdm_latency",
 190         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES2),
 191         .resource_data  = &usbhost_pwrdm_lat_db,
 192         .ops            = &pd_lat_res_ops,
 193 };
 194
 195 static struct pd_latency_db emu_pwrdm_lat_db = {
 196         .pwrdm_name = "emu_pwrdm",
 197         .latency[PD_LATENCY_OFF] = 1000,
 198         .latency[PD_LATENCY_RET] = 100,
 199         .latency[PD_LATENCY_INACT] = -1,
 200         .latency[PD_LATENCY_ON]  = 0
 201 };
 202
 203 static struct shared_resource emu_pwrdm_latency = {
 204         .name           = "emu_pwrdm",
 205         .omap_chip      = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
 206         .resource_data  = &emu_pwrdm_lat_db,
 207         .ops            = &pd_lat_res_ops,
 208 };
 209
 210 struct shared_resource *resources_omap[] __initdata = {
 211         &mpu_latency,
 212         &core_latency,
 213         /* Power Domain Latency resources */
 214         &iva2_pwrdm_latency,
 215         &gfx_pwrdm_latency,
 216         &sgx_pwrdm_latency,
 217         &dss_pwrdm_latency,
 218         &cam_pwrdm_latency,
 219         &per_pwrdm_latency,
 220         &neon_pwrdm_latency,
 221         &usbhost_pwrdm_latency,
 222         &emu_pwrdm_latency,
 223         NULL
 224 };
 225
 226 #endif /* __ARCH_ARM_MACH_OMAP2_RESOURCE_H */