arch/cris/arch-v32/kernel/smp.c

   1 #include <linux/types.h>
   2 #include <asm/delay.h>
   3 #include <irq.h>
   4 #include <hwregs/intr_vect.h>
   5 #include <hwregs/intr_vect_defs.h>
   6 #include <asm/tlbflush.h>
   7 #include <asm/mmu_context.h>
   8 #include <hwregs/asm/mmu_defs_asm.h>
   9 #include <hwregs/supp_reg.h>
  10 #include <asm/atomic.h>
  11
  12 #include <linux/err.h>
  13 #include <linux/init.h>
  14 #include <linux/timex.h>
  15 #include <linux/sched.h>
  16 #include <linux/kernel.h>
  17 #include <linux/cpumask.h>
  18 #include <linux/interrupt.h>
  19 #include <linux/module.h>
  20
  21 #define IPI_SCHEDULE 1
  22 #define IPI_CALL 2
  23 #define IPI_FLUSH_TLB 4
  24 #define IPI_BOOT 8
  25
  26 #define FLUSH_ALL (void*)0xffffffff
  27
  28 /* Vector of locks used for various atomic operations */
  29 spinlock_t cris_atomic_locks[] = { [0 ... LOCK_COUNT - 1] = SPIN_LOCK_UNLOCKED};
  30
  31 /* CPU masks */
  32 cpumask_t cpu_online_map = CPU_MASK_NONE;
  33 EXPORT_SYMBOL(cpu_online_map);
  34 cpumask_t phys_cpu_present_map = CPU_MASK_NONE;
  35 cpumask_t cpu_possible_map;
  36 EXPORT_SYMBOL(cpu_possible_map);
  37 EXPORT_SYMBOL(phys_cpu_present_map);
  38
  39 /* Variables used during SMP boot */
  40 volatile int cpu_now_booting = 0;
  41 volatile struct thread_info *smp_init_current_idle_thread;
  42
  43 /* Variables used during IPI */
  44 static DEFINE_SPINLOCK(call_lock);
  45 static DEFINE_SPINLOCK(tlbstate_lock);
  46
  47 struct call_data_struct {
  48         void (*func) (void *info);
  49         void *info;
  50         int wait;
  51 };
  52
  53 static struct call_data_struct * call_data;
  54
  55 static struct mm_struct* flush_mm;
  56 static struct vm_area_struct* flush_vma;
  57 static unsigned long flush_addr;
  58
  59 extern int setup_irq(int, struct irqaction *);
  60
  61 /* Mode registers */
  62 static unsigned long irq_regs[NR_CPUS] = {
  63   regi_irq,
  64   regi_irq2
  65 };
  66
  67 static irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id);
  68 static int send_ipi(int vector, int wait, cpumask_t cpu_mask);
  69 static struct irqaction irq_ipi  = {
  70         .handler = crisv32_ipi_interrupt,
  71         .flags = IRQF_DISABLED,
  72         .mask = CPU_MASK_NONE,
  73         .name = "ipi",
  74 };
  75
  76 extern void cris_mmu_init(void);
  77 extern void cris_timer_init(void);
  78
  79 /* SMP initialization */
  80 void __init smp_prepare_cpus(unsigned int max_cpus)
  81 {
  82         int i;
  83
  84         /* From now on we can expect IPIs so set them up */
  85         setup_irq(IPI_INTR_VECT, &irq_ipi);
  86
  87         /* Mark all possible CPUs as present */
  88         for (i = 0; i < max_cpus; i++)
  89             cpu_set(i, phys_cpu_present_map);
  90 }
  91
  92 void __devinit smp_prepare_boot_cpu(void)
  93 {
  94         /* PGD pointer has moved after per_cpu initialization so
  95          * update the MMU.
  96          */
  97         pgd_t **pgd;
  98         pgd = (pgd_t**)&per_cpu(current_pgd, smp_processor_id());
  99
 100         SUPP_BANK_SEL(1);
 101         SUPP_REG_WR(RW_MM_TLB_PGD, pgd);
 102         SUPP_BANK_SEL(2);
 103         SUPP_REG_WR(RW_MM_TLB_PGD, pgd);
 104
 105         cpu_set(0, cpu_online_map);
 106         cpu_set(0, phys_cpu_present_map);
 107         cpu_set(0, cpu_possible_map);
 108 }
 109
 110 void __init smp_cpus_done(unsigned int max_cpus)
 111 {
 112 }
 113
 114 /* Bring one cpu online.*/
 115 static int __init
 116 smp_boot_one_cpu(int cpuid)
 117 {
 118         unsigned timeout;
 119         struct task_struct *idle;
 120         cpumask_t cpu_mask = CPU_MASK_NONE;
 121
 122         idle = fork_idle(cpuid);
 123         if (IS_ERR(idle))
 124                 panic("SMP: fork failed for CPU:%d", cpuid);
 125
 126         task_thread_info(idle)->cpu = cpuid;
 127
 128         /* Information to the CPU that is about to boot */
 129         smp_init_current_idle_thread = task_thread_info(idle);
 130         cpu_now_booting = cpuid;
 131
 132         /* Kick it */
 133         cpu_set(cpuid, cpu_online_map);
 134         cpu_set(cpuid, cpu_mask);
 135         send_ipi(IPI_BOOT, 0, cpu_mask);
 136         cpu_clear(cpuid, cpu_online_map);
 137
 138         /* Wait for CPU to come online */
 139         for (timeout = 0; timeout < 10000; timeout++) {
 140                 if(cpu_online(cpuid)) {
 141                         cpu_now_booting = 0;
 142                         smp_init_current_idle_thread = NULL;
 143                         return 0; /* CPU online */
 144                 }
 145                 udelay(100);
 146                 barrier();
 147         }
 148
 149         put_task_struct(idle);
 150         idle = NULL;
 151
 152         printk(KERN_CRIT "SMP: CPU:%d is stuck.\n", cpuid);
 153         return -1;
 154 }
 155
 156 /* Secondary CPUs starts using C here. Here we need to setup CPU
 157  * specific stuff such as the local timer and the MMU. */
 158 void __init smp_callin(void)
 159 {
 160         extern void cpu_idle(void);
 161
 162         int cpu = cpu_now_booting;
 163         reg_intr_vect_rw_mask vect_mask = {0};
 164
 165         /* Initialise the idle task for this CPU */
 166         atomic_inc(&init_mm.mm_count);
 167         current->active_mm = &init_mm;
 168
 169         /* Set up MMU */
 170         cris_mmu_init();
 171         __flush_tlb_all();
 172
 173         /* Setup local timer. */
 174         cris_timer_init();
 175
 176         /* Enable IRQ and idle */
 177         REG_WR(intr_vect, irq_regs[cpu], rw_mask, vect_mask);
 178         unmask_irq(IPI_INTR_VECT);
 179         unmask_irq(TIMER0_INTR_VECT);
 180         preempt_disable();
 181         local_irq_enable();
 182
 183         cpu_set(cpu, cpu_online_map);
 184         cpu_idle();
 185 }
 186
 187 /* Stop execution on this CPU.*/
 188 void stop_this_cpu(void* dummy)
 189 {
 190         local_irq_disable();
 191         asm volatile("halt");
 192 }
 193
 194 /* Other calls */
 195 void smp_send_stop(void)
 196 {
 197         smp_call_function(stop_this_cpu, NULL, 1, 0);
 198 }
 199
 200 int setup_profiling_timer(unsigned int multiplier)
 201 {
 202         return -EINVAL;
 203 }
 204
 205
 206 /* cache_decay_ticks is used by the scheduler to decide if a process
 207  * is "hot" on one CPU. A higher value means a higher penalty to move
 208  * a process to another CPU. Our cache is rather small so we report
 209  * 1 tick.
 210  */
 211 unsigned long cache_decay_ticks = 1;
 212
 213 int __cpuinit __cpu_up(unsigned int cpu)
 214 {
 215         smp_boot_one_cpu(cpu);
 216         return cpu_online(cpu) ? 0 : -ENOSYS;
 217 }
 218
 219 void smp_send_reschedule(int cpu)
 220 {
 221         cpumask_t cpu_mask = CPU_MASK_NONE;
 222         cpu_set(cpu, cpu_mask);
 223         send_ipi(IPI_SCHEDULE, 0, cpu_mask);
 224 }
 225
 226 /* TLB flushing
 227  *
 228  * Flush needs to be done on the local CPU and on any other CPU that
 229  * may have the same mapping. The mm->cpu_vm_mask is used to keep track
 230  * of which CPUs that a specific process has been executed on.
 231  */
 232 void flush_tlb_common(struct mm_struct* mm, struct vm_area_struct* vma, unsigned long addr)
 233 {
 234         unsigned long flags;
 235         cpumask_t cpu_mask;
 236
 237         spin_lock_irqsave(&tlbstate_lock, flags);
 238         cpu_mask = (mm == FLUSH_ALL ? CPU_MASK_ALL : mm->cpu_vm_mask);
 239         cpu_clear(smp_processor_id(), cpu_mask);
 240         flush_mm = mm;
 241         flush_vma = vma;
 242         flush_addr = addr;
 243         send_ipi(IPI_FLUSH_TLB, 1, cpu_mask);
 244         spin_unlock_irqrestore(&tlbstate_lock, flags);
 245 }
 246
 247 void flush_tlb_all(void)
 248 {
 249         __flush_tlb_all();
 250         flush_tlb_common(FLUSH_ALL, FLUSH_ALL, 0);
 251 }
 252
 253 void flush_tlb_mm(struct mm_struct *mm)
 254 {
 255         __flush_tlb_mm(mm);
 256         flush_tlb_common(mm, FLUSH_ALL, 0);
 257         /* No more mappings in other CPUs */
 258         cpus_clear(mm->cpu_vm_mask);
 259         cpu_set(smp_processor_id(), mm->cpu_vm_mask);
 260 }
 261
 262 void flush_tlb_page(struct vm_area_struct *vma,
 263                            unsigned long addr)
 264 {
 265         __flush_tlb_page(vma, addr);
 266         flush_tlb_common(vma->vm_mm, vma, addr);
 267 }
 268
 269 /* Inter processor interrupts
 270  *
 271  * The IPIs are used for:
 272  *   * Force a schedule on a CPU
 273  *   * FLush TLB on other CPUs
 274  *   * Call a function on other CPUs
 275  */
 276
 277 int send_ipi(int vector, int wait, cpumask_t cpu_mask)
 278 {
 279         int i = 0;
 280         reg_intr_vect_rw_ipi ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi);
 281         int ret = 0;
 282
 283         /* Calculate CPUs to send to. */
 284         cpus_and(cpu_mask, cpu_mask, cpu_online_map);
 285
 286         /* Send the IPI. */
 287         for_each_cpu_mask(i, cpu_mask)
 288         {
 289                 ipi.vector |= vector;
 290                 REG_WR(intr_vect, irq_regs[i], rw_ipi, ipi);
 291         }
 292
 293         /* Wait for IPI to finish on other CPUS */
 294         if (wait) {
 295                 for_each_cpu_mask(i, cpu_mask) {
 296                         int j;
 297                         for (j = 0 ; j < 1000; j++) {
 298                                 ipi = REG_RD(intr_vect, irq_regs[i], rw_ipi);
 299                                 if (!ipi.vector)
 300                                         break;
 301                                 udelay(100);
 302                         }
 303
 304                         /* Timeout? */
 305                         if (ipi.vector) {
 306                                 printk("SMP call timeout from %d to %d\n", smp_processor_id(), i);
 307                                 ret = -ETIMEDOUT;
 308                                 dump_stack();
 309                         }
 310                 }
 311         }
 312         return ret;
 313 }
 314
 315 /*
 316  * You must not call this function with disabled interrupts or from a
 317  * hardware interrupt handler or from a bottom half handler.
 318  */
 319 int smp_call_function(void (*func)(void *info), void *info,
 320                       int nonatomic, int wait)
 321 {
 322         cpumask_t cpu_mask = CPU_MASK_ALL;
 323         struct call_data_struct data;
 324         int ret;
 325
 326         cpu_clear(smp_processor_id(), cpu_mask);
 327
 328         WARN_ON(irqs_disabled());
 329
 330         data.func = func;
 331         data.info = info;
 332         data.wait = wait;
 333
 334         spin_lock(&call_lock);
 335         call_data = &data;
 336         ret = send_ipi(IPI_CALL, wait, cpu_mask);
 337         spin_unlock(&call_lock);
 338
 339         return ret;
 340 }
 341
 342 irqreturn_t crisv32_ipi_interrupt(int irq, void *dev_id)
 343 {
 344         void (*func) (void *info) = call_data->func;
 345         void *info = call_data->info;
 346         reg_intr_vect_rw_ipi ipi;
 347
 348         ipi = REG_RD(intr_vect, irq_regs[smp_processor_id()], rw_ipi);
 349
 350         if (ipi.vector & IPI_CALL) {
 351                  func(info);
 352         }
 353         if (ipi.vector & IPI_FLUSH_TLB) {
 354                      if (flush_mm == FLUSH_ALL)
 355                          __flush_tlb_all();
 356                      else if (flush_vma == FLUSH_ALL)
 357                         __flush_tlb_mm(flush_mm);
 358                      else
 359                         __flush_tlb_page(flush_vma, flush_addr);
 360         }
 361
 362         ipi.vector = 0;
 363         REG_WR(intr_vect, irq_regs[smp_processor_id()], rw_ipi, ipi);
 364
 365         return IRQ_HANDLED;
 366 }
 367