2 * arch/sh/kernel/cpu/sh2a/clock-sh7203.c
4 * SH7203 support for the clock framework
6 * Copyright (C) 2007 Kieran Bingham (MPC-Data Ltd)
8 * Based on clock-sh7263.c
9 * Copyright (C) 2006 Yoshinori Sato
11 * Based on clock-sh4.c
12 * Copyright (C) 2005 Paul Mundt
14 * This file is subject to the terms and conditions of the GNU General Public
15 * License. See the file "COPYING" in the main directory of this archive
18 #include <linux/init.h>
19 #include <linux/kernel.h>
20 #include <asm/clock.h>
24 static const int pll1rate
[]={8,12,16,0};
25 static const int pfc_divisors
[]={1,2,3,4,6,8,12};
26 #define ifc_divisors pfc_divisors
28 #if (CONFIG_SH_CLK_MD == 0)
30 #elif (CONFIG_SH_CLK_MD == 1)
32 #elif (CONFIG_SH_CLK_MD == 2)
34 #elif (CONFIG_SH_CLK_MD == 3)
37 #error "Illegal Clock Mode!"
40 static void master_clk_init(struct clk
*clk
)
42 clk
->rate
*= pll1rate
[(ctrl_inw(FREQCR
) >> 8) & 0x0003] * PLL2
;
45 static struct clk_ops sh7203_master_clk_ops
= {
46 .init
= master_clk_init
,
49 static void module_clk_recalc(struct clk
*clk
)
51 int idx
= (ctrl_inw(FREQCR
) & 0x0007);
52 clk
->rate
= clk
->parent
->rate
/ pfc_divisors
[idx
];
55 static struct clk_ops sh7203_module_clk_ops
= {
56 .recalc
= module_clk_recalc
,
59 static void bus_clk_recalc(struct clk
*clk
)
61 int idx
= (ctrl_inw(FREQCR
) & 0x0007);
62 clk
->rate
= clk
->parent
->rate
/ pfc_divisors
[idx
-2];
65 static struct clk_ops sh7203_bus_clk_ops
= {
66 .recalc
= bus_clk_recalc
,
69 static void cpu_clk_recalc(struct clk
*clk
)
71 clk
->rate
= clk
->parent
->rate
;
74 static struct clk_ops sh7203_cpu_clk_ops
= {
75 .recalc
= cpu_clk_recalc
,
78 static struct clk_ops
*sh7203_clk_ops
[] = {
79 &sh7203_master_clk_ops
,
80 &sh7203_module_clk_ops
,
85 void __init
arch_init_clk_ops(struct clk_ops
**ops
, int idx
)
87 if (idx
< ARRAY_SIZE(sh7203_clk_ops
))
88 *ops
= sh7203_clk_ops
[idx
];