arch/arm/mach-omap2/id.c

   1 /*
   2  * linux/arch/arm/mach-omap2/id.c
   3  *
   4  * OMAP2 CPU identification code
   5  *
   6  * Copyright (C) 2005 Nokia Corporation
   7  * Written by Tony Lindgren <tony@atomide.com>
   8  *
   9  * This program is free software; you can redistribute it and/or modify
  10  * it under the terms of the GNU General Public License version 2 as
  11  * published by the Free Software Foundation.
  12  */
  13
  14 #include <linux/module.h>
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/io.h>
  18
  19 #include <mach/common.h>
  20 #include <mach/control.h>
  21 #include <mach/cpu.h>
  22
  23 static struct omap_chip_id omap_chip;
  24
  25 /**
  26  * omap_chip_is - test whether currently running OMAP matches a chip type
  27  * @oc: omap_chip_t to test against
  28  *
  29  * Test whether the currently-running OMAP chip matches the supplied
  30  * chip type 'oc'.  Returns 1 upon a match; 0 upon failure.
  31  */
  32 int omap_chip_is(struct omap_chip_id oci)
  33 {
  34         return (oci.oc & omap_chip.oc) ? 1 : 0;
  35 }
  36 EXPORT_SYMBOL(omap_chip_is);
  37
  38 int omap_type(void)
  39 {
  40         u32 val = 0;
  41
  42         if (cpu_is_omap24xx()) {
  43                 val = omap_ctrl_readl(OMAP24XX_CONTROL_STATUS);
  44         } else if (cpu_is_omap34xx()) {
  45                 val = omap_ctrl_readl(OMAP343X_CONTROL_STATUS);
  46         } else {
  47                 pr_err("Cannot detect omap type!\n");
  48                 goto out;
  49         }
  50
  51         val &= OMAP2_DEVICETYPE_MASK;
  52         val >>= 8;
  53
  54 out:
  55         return val;
  56 }
  57 EXPORT_SYMBOL(omap_type);
  58
  59
  60 /*----------------------------------------------------------------------------*/
  61
  62 #define OMAP_TAP_IDCODE         0x0204
  63 #define OMAP_TAP_DIE_ID_0       0x0218
  64 #define OMAP_TAP_DIE_ID_1       0x021C
  65 #define OMAP_TAP_DIE_ID_2       0x0220
  66 #define OMAP_TAP_DIE_ID_3       0x0224
  67
  68 #define read_tap_reg(reg)       __raw_readl(tap_base  + (reg))
  69
  70 struct omap_id {
  71         u16     hawkeye;        /* Silicon type (Hawkeye id) */
  72         u8      dev;            /* Device type from production_id reg */
  73         u32     type;           /* Combined type id copied to system_rev */
  74 };
  75
  76 /* Register values to detect the OMAP version */
  77 static struct omap_id omap_ids[] __initdata = {
  78         { .hawkeye = 0xb5d9, .dev = 0x0, .type = 0x24200024 },
  79         { .hawkeye = 0xb5d9, .dev = 0x1, .type = 0x24201024 },
  80         { .hawkeye = 0xb5d9, .dev = 0x2, .type = 0x24202024 },
  81         { .hawkeye = 0xb5d9, .dev = 0x4, .type = 0x24220024 },
  82         { .hawkeye = 0xb5d9, .dev = 0x8, .type = 0x24230024 },
  83         { .hawkeye = 0xb68a, .dev = 0x0, .type = 0x24300024 },
  84 };
  85
  86 static void __iomem *tap_base;
  87 static u16 tap_prod_id;
  88
  89 void __init omap24xx_check_revision(void)
  90 {
  91         int i, j;
  92         u32 idcode, prod_id;
  93         u16 hawkeye;
  94         u8  dev_type, rev;
  95
  96         idcode = read_tap_reg(OMAP_TAP_IDCODE);
  97         prod_id = read_tap_reg(tap_prod_id);
  98         hawkeye = (idcode >> 12) & 0xffff;
  99         rev = (idcode >> 28) & 0x0f;
 100         dev_type = (prod_id >> 16) & 0x0f;
 101
 102         pr_debug("OMAP_TAP_IDCODE 0x%08x REV %i HAWKEYE 0x%04x MANF %03x\n",
 103                  idcode, rev, hawkeye, (idcode >> 1) & 0x7ff);
 104         pr_debug("OMAP_TAP_DIE_ID_0: 0x%08x\n",
 105                  read_tap_reg(OMAP_TAP_DIE_ID_0));
 106         pr_debug("OMAP_TAP_DIE_ID_1: 0x%08x DEV_REV: %i\n",
 107                  read_tap_reg(OMAP_TAP_DIE_ID_1),
 108                  (read_tap_reg(OMAP_TAP_DIE_ID_1) >> 28) & 0xf);
 109         pr_debug("OMAP_TAP_DIE_ID_2: 0x%08x\n",
 110                  read_tap_reg(OMAP_TAP_DIE_ID_2));
 111         pr_debug("OMAP_TAP_DIE_ID_3: 0x%08x\n",
 112                  read_tap_reg(OMAP_TAP_DIE_ID_3));
 113         pr_debug("OMAP_TAP_PROD_ID_0: 0x%08x DEV_TYPE: %i\n",
 114                  prod_id, dev_type);
 115
 116         /* Check hawkeye ids */
 117         for (i = 0; i < ARRAY_SIZE(omap_ids); i++) {
 118                 if (hawkeye == omap_ids[i].hawkeye)
 119                         break;
 120         }
 121
 122         if (i == ARRAY_SIZE(omap_ids)) {
 123                 printk(KERN_ERR "Unknown OMAP CPU id\n");
 124                 return;
 125         }
 126
 127         for (j = i; j < ARRAY_SIZE(omap_ids); j++) {
 128                 if (dev_type == omap_ids[j].dev)
 129                         break;
 130         }
 131
 132         if (j == ARRAY_SIZE(omap_ids)) {
 133                 printk(KERN_ERR "Unknown OMAP device type. "
 134                                 "Handling it as OMAP%04x\n",
 135                                 omap_ids[i].type >> 16);
 136                 j = i;
 137         }
 138
 139         pr_info("OMAP%04x", system_rev >> 16);
 140         if ((system_rev >> 8) & 0x0f)
 141                 pr_info("ES%x", (system_rev >> 12) & 0xf);
 142         pr_info("\n");
 143 }
 144
 145 void __init omap34xx_check_revision(void)
 146 {
 147         u32 cpuid, idcode;
 148         u16 hawkeye;
 149         u8 rev;
 150         char *rev_name;
 151
 152         /*
 153          * We cannot access revision registers on ES1.0.
 154          * If the processor type is Cortex-A8 and the revision is 0x0
 155          * it means its Cortex r0p0 which is 3430 ES1.0.
 156          */
 157         cpuid = read_cpuid(CPUID_ID);
 158         if ((((cpuid >> 4) & 0xfff) == 0xc08) && ((cpuid & 0xf) == 0x0)) {
 159                 system_rev = OMAP3430_REV_ES1_0;
 160                 rev_name = "ES1.0";
 161                 goto out;
 162         }
 163
 164         /*
 165          * Detection for 34xx ES2.0 and above can be done with just
 166          * hawkeye and rev. See TRM 1.5.2 Device Identification.
 167          * Note that rev does not map directly to our defined processor
 168          * revision numbers as ES1.0 uses value 0.
 169          */
 170         idcode = read_tap_reg(OMAP_TAP_IDCODE);
 171         hawkeye = (idcode >> 12) & 0xffff;
 172         rev = (idcode >> 28) & 0xff;
 173
 174         if (hawkeye == 0xb7ae) {
 175                 switch (rev) {
 176                 case 0:
 177                         system_rev = OMAP3430_REV_ES2_0;
 178                         rev_name = "ES2.0";
 179                         break;
 180                 case 2:
 181                         system_rev = OMAP3430_REV_ES2_1;
 182                         rev_name = "ES2.1";
 183                         break;
 184                 case 3:
 185                         system_rev = OMAP3430_REV_ES3_0;
 186                         rev_name = "ES3.0";
 187                         break;
 188                 default:
 189                         /* Use the latest known revision as default */
 190                         system_rev = OMAP3430_REV_ES3_0;
 191                         rev_name = "Unknown revision\n";
 192                 }
 193         }
 194
 195 out:
 196         pr_info("OMAP%04x %s\n", system_rev >> 16, rev_name);
 197 }
 198
 199 /*
 200  * Try to detect the exact revision of the omap we're running on
 201  */
 202 void __init omap2_check_revision(void)
 203 {
 204         /*
 205          * At this point we have an idea about the processor revision set
 206          * earlier with omap2_set_globals_tap().
 207          */
 208         if (cpu_is_omap24xx())
 209                 omap24xx_check_revision();
 210         else if (cpu_is_omap34xx())
 211                 omap34xx_check_revision();
 212         else
 213                 pr_err("OMAP revision unknown, please fix!\n");
 214
 215         /*
 216          * OK, now we know the exact revision. Initialize omap_chip bits
 217          * for powerdowmain and clockdomain code.
 218          */
 219         if (cpu_is_omap243x()) {
 220                 /* Currently only supports 2430ES2.1 and 2430-all */
 221                 omap_chip.oc |= CHIP_IS_OMAP2430;
 222         } else if (cpu_is_omap242x()) {
 223                 /* Currently only supports 2420ES2.1.1 and 2420-all */
 224                 omap_chip.oc |= CHIP_IS_OMAP2420;
 225         } else if (cpu_is_omap343x()) {
 226                 omap_chip.oc = CHIP_IS_OMAP3430;
 227                 if (system_rev == OMAP3430_REV_ES1_0)
 228                         omap_chip.oc |= CHIP_IS_OMAP3430ES1;
 229                 else if (system_rev > OMAP3430_REV_ES1_0)
 230                         omap_chip.oc |= CHIP_IS_OMAP3430ES2;
 231         } else {
 232                 pr_err("Uninitialized omap_chip, please fix!\n");
 233         }
 234 }
 235
 236 /*
 237  * Set up things for map_io and processor detection later on. Gets called
 238  * pretty much first thing from board init. For multi-omap, this gets
 239  * cpu_is_omapxxxx() working accurately enough for map_io. Then we'll try to
 240  * detect the exact revision later on in omap2_detect_revision() once map_io
 241  * is done.
 242  */
 243 void __init omap2_set_globals_tap(struct omap_globals *omap2_globals)
 244 {
 245         system_rev = omap2_globals->class;
 246         tap_base = omap2_globals->tap;
 247
 248         if (cpu_is_omap34xx())
 249                 tap_prod_id = 0x0210;
 250         else
 251                 tap_prod_id = 0x0208;
 252 }