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OMAP3: PM: Prevented DVFS state switches when enabling off-mode
[linux-ginger.git] / drivers / char / hpet.c
blob70a770ac013875a3e4b5200b954a21197623e2e7
1 /*
2 * Intel & MS High Precision Event Timer Implementation.
3 *
4 * Copyright (C) 2003 Intel Corporation
5 * Venki Pallipadi
6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7 * Bob Picco <robert.picco@hp.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14 #include <linux/interrupt.h>
15 #include <linux/module.h>
16 #include <linux/kernel.h>
17 #include <linux/smp_lock.h>
18 #include <linux/types.h>
19 #include <linux/miscdevice.h>
20 #include <linux/major.h>
21 #include <linux/ioport.h>
22 #include <linux/fcntl.h>
23 #include <linux/init.h>
24 #include <linux/poll.h>
25 #include <linux/mm.h>
26 #include <linux/proc_fs.h>
27 #include <linux/spinlock.h>
28 #include <linux/sysctl.h>
29 #include <linux/wait.h>
30 #include <linux/bcd.h>
31 #include <linux/seq_file.h>
32 #include <linux/bitops.h>
33 #include <linux/clocksource.h>
34
35 #include <asm/current.h>
36 #include <asm/uaccess.h>
37 #include <asm/system.h>
38 #include <asm/io.h>
39 #include <asm/irq.h>
40 #include <asm/div64.h>
41
42 #include <linux/acpi.h>
43 #include <acpi/acpi_bus.h>
44 #include <linux/hpet.h>
45
46 /*
47 * The High Precision Event Timer driver.
48 * This driver is closely modelled after the rtc.c driver.
49 * http://www.intel.com/hardwaredesign/hpetspec_1.pdf
50 */
51 #define HPET_USER_FREQ (64)
52 #define HPET_DRIFT (500)
53
54 #define HPET_RANGE_SIZE 1024 /* from HPET spec */
55
56
57 /* WARNING -- don't get confused. These macros are never used
58 * to write the (single) counter, and rarely to read it.
59 * They're badly named; to fix, someday.
60 */
61 #if BITS_PER_LONG == 64
62 #define write_counter(V, MC) writeq(V, MC)
63 #define read_counter(MC) readq(MC)
64 #else
65 #define write_counter(V, MC) writel(V, MC)
66 #define read_counter(MC) readl(MC)
67 #endif
68
69 static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
70
71 /* This clocksource driver currently only works on ia64 */
72 #ifdef CONFIG_IA64
73 static void __iomem *hpet_mctr;
74
75 static cycle_t read_hpet(struct clocksource *cs)
76 {
77 return (cycle_t)read_counter((void __iomem *)hpet_mctr);
78 }
79
80 static struct clocksource clocksource_hpet = {
81 .name = "hpet",
82 .rating = 250,
83 .read = read_hpet,
84 .mask = CLOCKSOURCE_MASK(64),
85 .mult = 0, /* to be calculated */
86 .shift = 10,
87 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
88 };
89 static struct clocksource *hpet_clocksource;
90 #endif
91
92 /* A lock for concurrent access by app and isr hpet activity. */
93 static DEFINE_SPINLOCK(hpet_lock);
94
95 #define HPET_DEV_NAME (7)
96
97 struct hpet_dev {
98 struct hpets *hd_hpets;
99 struct hpet __iomem *hd_hpet;
100 struct hpet_timer __iomem *hd_timer;
101 unsigned long hd_ireqfreq;
102 unsigned long hd_irqdata;
103 wait_queue_head_t hd_waitqueue;
104 struct fasync_struct *hd_async_queue;
105 unsigned int hd_flags;
106 unsigned int hd_irq;
107 unsigned int hd_hdwirq;
108 char hd_name[HPET_DEV_NAME];
109 };
110
111 struct hpets {
112 struct hpets *hp_next;
113 struct hpet __iomem *hp_hpet;
114 unsigned long hp_hpet_phys;
115 struct clocksource *hp_clocksource;
116 unsigned long long hp_tick_freq;
117 unsigned long hp_delta;
118 unsigned int hp_ntimer;
119 unsigned int hp_which;
120 struct hpet_dev hp_dev[1];
121 };
122
123 static struct hpets *hpets;
124
125 #define HPET_OPEN 0x0001
126 #define HPET_IE 0x0002 /* interrupt enabled */
127 #define HPET_PERIODIC 0x0004
128 #define HPET_SHARED_IRQ 0x0008
129
130
131 #ifndef readq
132 static inline unsigned long long readq(void __iomem *addr)
133 {
134 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
135 }
136 #endif
137
138 #ifndef writeq
139 static inline void writeq(unsigned long long v, void __iomem *addr)
140 {
141 writel(v & 0xffffffff, addr);
142 writel(v >> 32, addr + 4);
143 }
144 #endif
145
146 static irqreturn_t hpet_interrupt(int irq, void *data)
147 {
148 struct hpet_dev *devp;
149 unsigned long isr;
150
151 devp = data;
152 isr = 1 << (devp - devp->hd_hpets->hp_dev);
153
154 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
155 !(isr & readl(&devp->hd_hpet->hpet_isr)))
156 return IRQ_NONE;
157
158 spin_lock(&hpet_lock);
159 devp->hd_irqdata++;
160
161 /*
162 * For non-periodic timers, increment the accumulator.
163 * This has the effect of treating non-periodic like periodic.
164 */
165 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
166 unsigned long m, t;
167
168 t = devp->hd_ireqfreq;
169 m = read_counter(&devp->hd_timer->hpet_compare);
170 write_counter(t + m, &devp->hd_timer->hpet_compare);
171 }
172
173 if (devp->hd_flags & HPET_SHARED_IRQ)
174 writel(isr, &devp->hd_hpet->hpet_isr);
175 spin_unlock(&hpet_lock);
176
177 wake_up_interruptible(&devp->hd_waitqueue);
178
179 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
180
181 return IRQ_HANDLED;
182 }
183
184 static void hpet_timer_set_irq(struct hpet_dev *devp)
185 {
186 unsigned long v;
187 int irq, gsi;
188 struct hpet_timer __iomem *timer;
189
190 spin_lock_irq(&hpet_lock);
191 if (devp->hd_hdwirq) {
192 spin_unlock_irq(&hpet_lock);
193 return;
194 }
195
196 timer = devp->hd_timer;
197
198 /* we prefer level triggered mode */
199 v = readl(&timer->hpet_config);
200 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
201 v |= Tn_INT_TYPE_CNF_MASK;
202 writel(v, &timer->hpet_config);
203 }
204 spin_unlock_irq(&hpet_lock);
205
206 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
207 Tn_INT_ROUTE_CAP_SHIFT;
208
209 /*
210 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
211 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
212 */
213 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
214 v &= ~0xf3df;
215 else
216 v &= ~0xffff;
217
218 for (irq = find_first_bit(&v, HPET_MAX_IRQ); irq < HPET_MAX_IRQ;
219 irq = find_next_bit(&v, HPET_MAX_IRQ, 1 + irq)) {
220
221 if (irq >= nr_irqs) {
222 irq = HPET_MAX_IRQ;
223 break;
224 }
225
226 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
227 ACPI_ACTIVE_LOW);
228 if (gsi > 0)
229 break;
230
231 /* FIXME: Setup interrupt source table */
232 }
233
234 if (irq < HPET_MAX_IRQ) {
235 spin_lock_irq(&hpet_lock);
236 v = readl(&timer->hpet_config);
237 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
238 writel(v, &timer->hpet_config);
239 devp->hd_hdwirq = gsi;
240 spin_unlock_irq(&hpet_lock);
241 }
242 return;
243 }
244
245 static int hpet_open(struct inode *inode, struct file *file)
246 {
247 struct hpet_dev *devp;
248 struct hpets *hpetp;
249 int i;
250
251 if (file->f_mode & FMODE_WRITE)
252 return -EINVAL;
253
254 lock_kernel();
255 spin_lock_irq(&hpet_lock);
256
257 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
258 for (i = 0; i < hpetp->hp_ntimer; i++)
259 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN)
260 continue;
261 else {
262 devp = &hpetp->hp_dev[i];
263 break;
264 }
265
266 if (!devp) {
267 spin_unlock_irq(&hpet_lock);
268 unlock_kernel();
269 return -EBUSY;
270 }
271
272 file->private_data = devp;
273 devp->hd_irqdata = 0;
274 devp->hd_flags |= HPET_OPEN;
275 spin_unlock_irq(&hpet_lock);
276 unlock_kernel();
277
278 hpet_timer_set_irq(devp);
279
280 return 0;
281 }
282
283 static ssize_t
284 hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
285 {
286 DECLARE_WAITQUEUE(wait, current);
287 unsigned long data;
288 ssize_t retval;
289 struct hpet_dev *devp;
290
291 devp = file->private_data;
292 if (!devp->hd_ireqfreq)
293 return -EIO;
294
295 if (count < sizeof(unsigned long))
296 return -EINVAL;
297
298 add_wait_queue(&devp->hd_waitqueue, &wait);
299
300 for ( ; ; ) {
301 set_current_state(TASK_INTERRUPTIBLE);
302
303 spin_lock_irq(&hpet_lock);
304 data = devp->hd_irqdata;
305 devp->hd_irqdata = 0;
306 spin_unlock_irq(&hpet_lock);
307
308 if (data)
309 break;
310 else if (file->f_flags & O_NONBLOCK) {
311 retval = -EAGAIN;
312 goto out;
313 } else if (signal_pending(current)) {
314 retval = -ERESTARTSYS;
315 goto out;
316 }
317 schedule();
318 }
319
320 retval = put_user(data, (unsigned long __user *)buf);
321 if (!retval)
322 retval = sizeof(unsigned long);
323 out:
324 __set_current_state(TASK_RUNNING);
325 remove_wait_queue(&devp->hd_waitqueue, &wait);
326
327 return retval;
328 }
329
330 static unsigned int hpet_poll(struct file *file, poll_table * wait)
331 {
332 unsigned long v;
333 struct hpet_dev *devp;
334
335 devp = file->private_data;
336
337 if (!devp->hd_ireqfreq)
338 return 0;
339
340 poll_wait(file, &devp->hd_waitqueue, wait);
341
342 spin_lock_irq(&hpet_lock);
343 v = devp->hd_irqdata;
344 spin_unlock_irq(&hpet_lock);
345
346 if (v != 0)
347 return POLLIN | POLLRDNORM;
348
349 return 0;
350 }
351
352 static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
353 {
354 #ifdef CONFIG_HPET_MMAP
355 struct hpet_dev *devp;
356 unsigned long addr;
357
358 if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
359 return -EINVAL;
360
361 devp = file->private_data;
362 addr = devp->hd_hpets->hp_hpet_phys;
363
364 if (addr & (PAGE_SIZE - 1))
365 return -ENOSYS;
366
367 vma->vm_flags |= VM_IO;
368 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
369
370 if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
371 PAGE_SIZE, vma->vm_page_prot)) {
372 printk(KERN_ERR "%s: io_remap_pfn_range failed\n",
373 __func__);
374 return -EAGAIN;
375 }
376
377 return 0;
378 #else
379 return -ENOSYS;
380 #endif
381 }
382
383 static int hpet_fasync(int fd, struct file *file, int on)
384 {
385 struct hpet_dev *devp;
386
387 devp = file->private_data;
388
389 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
390 return 0;
391 else
392 return -EIO;
393 }
394
395 static int hpet_release(struct inode *inode, struct file *file)
396 {
397 struct hpet_dev *devp;
398 struct hpet_timer __iomem *timer;
399 int irq = 0;
400
401 devp = file->private_data;
402 timer = devp->hd_timer;
403
404 spin_lock_irq(&hpet_lock);
405
406 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
407 &timer->hpet_config);
408
409 irq = devp->hd_irq;
410 devp->hd_irq = 0;
411
412 devp->hd_ireqfreq = 0;
413
414 if (devp->hd_flags & HPET_PERIODIC
415 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
416 unsigned long v;
417
418 v = readq(&timer->hpet_config);
419 v ^= Tn_TYPE_CNF_MASK;
420 writeq(v, &timer->hpet_config);
421 }
422
423 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
424 spin_unlock_irq(&hpet_lock);
425
426 if (irq)
427 free_irq(irq, devp);
428
429 file->private_data = NULL;
430 return 0;
431 }
432
433 static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int);
434
435 static int
436 hpet_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
437 unsigned long arg)
438 {
439 struct hpet_dev *devp;
440
441 devp = file->private_data;
442 return hpet_ioctl_common(devp, cmd, arg, 0);
443 }
444
445 static int hpet_ioctl_ieon(struct hpet_dev *devp)
446 {
447 struct hpet_timer __iomem *timer;
448 struct hpet __iomem *hpet;
449 struct hpets *hpetp;
450 int irq;
451 unsigned long g, v, t, m;
452 unsigned long flags, isr;
453
454 timer = devp->hd_timer;
455 hpet = devp->hd_hpet;
456 hpetp = devp->hd_hpets;
457
458 if (!devp->hd_ireqfreq)
459 return -EIO;
460
461 spin_lock_irq(&hpet_lock);
462
463 if (devp->hd_flags & HPET_IE) {
464 spin_unlock_irq(&hpet_lock);
465 return -EBUSY;
466 }
467
468 devp->hd_flags |= HPET_IE;
469
470 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
471 devp->hd_flags |= HPET_SHARED_IRQ;
472 spin_unlock_irq(&hpet_lock);
473
474 irq = devp->hd_hdwirq;
475
476 if (irq) {
477 unsigned long irq_flags;
478
479 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
480 irq_flags = devp->hd_flags & HPET_SHARED_IRQ
481 ? IRQF_SHARED : IRQF_DISABLED;
482 if (request_irq(irq, hpet_interrupt, irq_flags,
483 devp->hd_name, (void *)devp)) {
484 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
485 irq = 0;
486 }
487 }
488
489 if (irq == 0) {
490 spin_lock_irq(&hpet_lock);
491 devp->hd_flags ^= HPET_IE;
492 spin_unlock_irq(&hpet_lock);
493 return -EIO;
494 }
495
496 devp->hd_irq = irq;
497 t = devp->hd_ireqfreq;
498 v = readq(&timer->hpet_config);
499
500 /* 64-bit comparators are not yet supported through the ioctls,
501 * so force this into 32-bit mode if it supports both modes
502 */
503 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
504
505 if (devp->hd_flags & HPET_PERIODIC) {
506 g |= Tn_TYPE_CNF_MASK;
507 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
508 writeq(v, &timer->hpet_config);
509 local_irq_save(flags);
510
511 /*
512 * NOTE: First we modify the hidden accumulator
513 * register supported by periodic-capable comparators.
514 * We never want to modify the (single) counter; that
515 * would affect all the comparators. The value written
516 * is the counter value when the first interrupt is due.
517 */
518 m = read_counter(&hpet->hpet_mc);
519 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
520 /*
521 * Then we modify the comparator, indicating the period
522 * for subsequent interrupt.
523 */
524 write_counter(t, &timer->hpet_compare);
525 } else {
526 local_irq_save(flags);
527 m = read_counter(&hpet->hpet_mc);
528 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
529 }
530
531 if (devp->hd_flags & HPET_SHARED_IRQ) {
532 isr = 1 << (devp - devp->hd_hpets->hp_dev);
533 writel(isr, &hpet->hpet_isr);
534 }
535 writeq(g, &timer->hpet_config);
536 local_irq_restore(flags);
537
538 return 0;
539 }
540
541 /* converts Hz to number of timer ticks */
542 static inline unsigned long hpet_time_div(struct hpets *hpets,
543 unsigned long dis)
544 {
545 unsigned long long m;
546
547 m = hpets->hp_tick_freq + (dis >> 1);
548 do_div(m, dis);
549 return (unsigned long)m;
550 }
551
552 static int
553 hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel)
554 {
555 struct hpet_timer __iomem *timer;
556 struct hpet __iomem *hpet;
557 struct hpets *hpetp;
558 int err;
559 unsigned long v;
560
561 switch (cmd) {
562 case HPET_IE_OFF:
563 case HPET_INFO:
564 case HPET_EPI:
565 case HPET_DPI:
566 case HPET_IRQFREQ:
567 timer = devp->hd_timer;
568 hpet = devp->hd_hpet;
569 hpetp = devp->hd_hpets;
570 break;
571 case HPET_IE_ON:
572 return hpet_ioctl_ieon(devp);
573 default:
574 return -EINVAL;
575 }
576
577 err = 0;
578
579 switch (cmd) {
580 case HPET_IE_OFF:
581 if ((devp->hd_flags & HPET_IE) == 0)
582 break;
583 v = readq(&timer->hpet_config);
584 v &= ~Tn_INT_ENB_CNF_MASK;
585 writeq(v, &timer->hpet_config);
586 if (devp->hd_irq) {
587 free_irq(devp->hd_irq, devp);
588 devp->hd_irq = 0;
589 }
590 devp->hd_flags ^= HPET_IE;
591 break;
592 case HPET_INFO:
593 {
594 struct hpet_info info;
595
596 if (devp->hd_ireqfreq)
597 info.hi_ireqfreq =
598 hpet_time_div(hpetp, devp->hd_ireqfreq);
599 else
600 info.hi_ireqfreq = 0;
601 info.hi_flags =
602 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
603 info.hi_hpet = hpetp->hp_which;
604 info.hi_timer = devp - hpetp->hp_dev;
605 if (kernel)
606 memcpy((void *)arg, &info, sizeof(info));
607 else
608 if (copy_to_user((void __user *)arg, &info,
609 sizeof(info)))
610 err = -EFAULT;
611 break;
612 }
613 case HPET_EPI:
614 v = readq(&timer->hpet_config);
615 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
616 err = -ENXIO;
617 break;
618 }
619 devp->hd_flags |= HPET_PERIODIC;
620 break;
621 case HPET_DPI:
622 v = readq(&timer->hpet_config);
623 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
624 err = -ENXIO;
625 break;
626 }
627 if (devp->hd_flags & HPET_PERIODIC &&
628 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
629 v = readq(&timer->hpet_config);
630 v ^= Tn_TYPE_CNF_MASK;
631 writeq(v, &timer->hpet_config);
632 }
633 devp->hd_flags &= ~HPET_PERIODIC;
634 break;
635 case HPET_IRQFREQ:
636 if (!kernel && (arg > hpet_max_freq) &&
637 !capable(CAP_SYS_RESOURCE)) {
638 err = -EACCES;
639 break;
640 }
641
642 if (!arg) {
643 err = -EINVAL;
644 break;
645 }
646
647 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
648 }
649
650 return err;
651 }
652
653 static const struct file_operations hpet_fops = {
654 .owner = THIS_MODULE,
655 .llseek = no_llseek,
656 .read = hpet_read,
657 .poll = hpet_poll,
658 .ioctl = hpet_ioctl,
659 .open = hpet_open,
660 .release = hpet_release,
661 .fasync = hpet_fasync,
662 .mmap = hpet_mmap,
663 };
664
665 static int hpet_is_known(struct hpet_data *hdp)
666 {
667 struct hpets *hpetp;
668
669 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
670 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
671 return 1;
672
673 return 0;
674 }
675
676 static ctl_table hpet_table[] = {
677 {
678 .ctl_name = CTL_UNNUMBERED,
679 .procname = "max-user-freq",
680 .data = &hpet_max_freq,
681 .maxlen = sizeof(int),
682 .mode = 0644,
683 .proc_handler = &proc_dointvec,
684 },
685 {.ctl_name = 0}
686 };
687
688 static ctl_table hpet_root[] = {
689 {
690 .ctl_name = CTL_UNNUMBERED,
691 .procname = "hpet",
692 .maxlen = 0,
693 .mode = 0555,
694 .child = hpet_table,
695 },
696 {.ctl_name = 0}
697 };
698
699 static ctl_table dev_root[] = {
700 {
701 .ctl_name = CTL_DEV,
702 .procname = "dev",
703 .maxlen = 0,
704 .mode = 0555,
705 .child = hpet_root,
706 },
707 {.ctl_name = 0}
708 };
709
710 static struct ctl_table_header *sysctl_header;
711
712 /*
713 * Adjustment for when arming the timer with
714 * initial conditions. That is, main counter
715 * ticks expired before interrupts are enabled.
716 */
717 #define TICK_CALIBRATE (1000UL)
718
719 static unsigned long __hpet_calibrate(struct hpets *hpetp)
720 {
721 struct hpet_timer __iomem *timer = NULL;
722 unsigned long t, m, count, i, flags, start;
723 struct hpet_dev *devp;
724 int j;
725 struct hpet __iomem *hpet;
726
727 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
728 if ((devp->hd_flags & HPET_OPEN) == 0) {
729 timer = devp->hd_timer;
730 break;
731 }
732
733 if (!timer)
734 return 0;
735
736 hpet = hpetp->hp_hpet;
737 t = read_counter(&timer->hpet_compare);
738
739 i = 0;
740 count = hpet_time_div(hpetp, TICK_CALIBRATE);
741
742 local_irq_save(flags);
743
744 start = read_counter(&hpet->hpet_mc);
745
746 do {
747 m = read_counter(&hpet->hpet_mc);
748 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
749 } while (i++, (m - start) < count);
750
751 local_irq_restore(flags);
752
753 return (m - start) / i;
754 }
755
756 static unsigned long hpet_calibrate(struct hpets *hpetp)
757 {
758 unsigned long ret = -1;
759 unsigned long tmp;
760
761 /*
762 * Try to calibrate until return value becomes stable small value.
763 * If SMI interruption occurs in calibration loop, the return value
764 * will be big. This avoids its impact.
765 */
766 for ( ; ; ) {
767 tmp = __hpet_calibrate(hpetp);
768 if (ret <= tmp)
769 break;
770 ret = tmp;
771 }
772
773 return ret;
774 }
775
776 int hpet_alloc(struct hpet_data *hdp)
777 {
778 u64 cap, mcfg;
779 struct hpet_dev *devp;
780 u32 i, ntimer;
781 struct hpets *hpetp;
782 size_t siz;
783 struct hpet __iomem *hpet;
784 static struct hpets *last = NULL;
785 unsigned long period;
786 unsigned long long temp;
787 u32 remainder;
788
789 /*
790 * hpet_alloc can be called by platform dependent code.
791 * If platform dependent code has allocated the hpet that
792 * ACPI has also reported, then we catch it here.
793 */
794 if (hpet_is_known(hdp)) {
795 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
796 __func__);
797 return 0;
798 }
799
800 siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
801 sizeof(struct hpet_dev));
802
803 hpetp = kzalloc(siz, GFP_KERNEL);
804
805 if (!hpetp)
806 return -ENOMEM;
807
808 hpetp->hp_which = hpet_nhpet++;
809 hpetp->hp_hpet = hdp->hd_address;
810 hpetp->hp_hpet_phys = hdp->hd_phys_address;
811
812 hpetp->hp_ntimer = hdp->hd_nirqs;
813
814 for (i = 0; i < hdp->hd_nirqs; i++)
815 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
816
817 hpet = hpetp->hp_hpet;
818
819 cap = readq(&hpet->hpet_cap);
820
821 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
822
823 if (hpetp->hp_ntimer != ntimer) {
824 printk(KERN_WARNING "hpet: number irqs doesn't agree"
825 " with number of timers\n");
826 kfree(hpetp);
827 return -ENODEV;
828 }
829
830 if (last)
831 last->hp_next = hpetp;
832 else
833 hpets = hpetp;
834
835 last = hpetp;
836
837 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
838 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
839 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
840 temp += period >> 1; /* round */
841 do_div(temp, period);
842 hpetp->hp_tick_freq = temp; /* ticks per second */
843
844 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
845 hpetp->hp_which, hdp->hd_phys_address,
846 hpetp->hp_ntimer > 1 ? "s" : "");
847 for (i = 0; i < hpetp->hp_ntimer; i++)
848 printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
849 printk("\n");
850
851 temp = hpetp->hp_tick_freq;
852 remainder = do_div(temp, 1000000);
853 printk(KERN_INFO
854 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
855 hpetp->hp_which, hpetp->hp_ntimer,
856 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
857 (unsigned) temp, remainder);
858
859 mcfg = readq(&hpet->hpet_config);
860 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
861 write_counter(0L, &hpet->hpet_mc);
862 mcfg |= HPET_ENABLE_CNF_MASK;
863 writeq(mcfg, &hpet->hpet_config);
864 }
865
866 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
867 struct hpet_timer __iomem *timer;
868
869 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
870
871 devp->hd_hpets = hpetp;
872 devp->hd_hpet = hpet;
873 devp->hd_timer = timer;
874
875 /*
876 * If the timer was reserved by platform code,
877 * then make timer unavailable for opens.
878 */
879 if (hdp->hd_state & (1 << i)) {
880 devp->hd_flags = HPET_OPEN;
881 continue;
882 }
883
884 init_waitqueue_head(&devp->hd_waitqueue);
885 }
886
887 hpetp->hp_delta = hpet_calibrate(hpetp);
888
889 /* This clocksource driver currently only works on ia64 */
890 #ifdef CONFIG_IA64
891 if (!hpet_clocksource) {
892 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
893 CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr);
894 clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq,
895 clocksource_hpet.shift);
896 clocksource_register(&clocksource_hpet);
897 hpetp->hp_clocksource = &clocksource_hpet;
898 hpet_clocksource = &clocksource_hpet;
899 }
900 #endif
901
902 return 0;
903 }
904
905 static acpi_status hpet_resources(struct acpi_resource *res, void *data)
906 {
907 struct hpet_data *hdp;
908 acpi_status status;
909 struct acpi_resource_address64 addr;
910
911 hdp = data;
912
913 status = acpi_resource_to_address64(res, &addr);
914
915 if (ACPI_SUCCESS(status)) {
916 hdp->hd_phys_address = addr.minimum;
917 hdp->hd_address = ioremap(addr.minimum, addr.address_length);
918
919 if (hpet_is_known(hdp)) {
920 iounmap(hdp->hd_address);
921 return AE_ALREADY_EXISTS;
922 }
923 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
924 struct acpi_resource_fixed_memory32 *fixmem32;
925
926 fixmem32 = &res->data.fixed_memory32;
927 if (!fixmem32)
928 return AE_NO_MEMORY;
929
930 hdp->hd_phys_address = fixmem32->address;
931 hdp->hd_address = ioremap(fixmem32->address,
932 HPET_RANGE_SIZE);
933
934 if (hpet_is_known(hdp)) {
935 iounmap(hdp->hd_address);
936 return AE_ALREADY_EXISTS;
937 }
938 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
939 struct acpi_resource_extended_irq *irqp;
940 int i, irq;
941
942 irqp = &res->data.extended_irq;
943
944 for (i = 0; i < irqp->interrupt_count; i++) {
945 irq = acpi_register_gsi(NULL, irqp->interrupts[i],
946 irqp->triggering, irqp->polarity);
947 if (irq < 0)
948 return AE_ERROR;
949
950 hdp->hd_irq[hdp->hd_nirqs] = irq;
951 hdp->hd_nirqs++;
952 }
953 }
954
955 return AE_OK;
956 }
957
958 static int hpet_acpi_add(struct acpi_device *device)
959 {
960 acpi_status result;
961 struct hpet_data data;
962
963 memset(&data, 0, sizeof(data));
964
965 result =
966 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
967 hpet_resources, &data);
968
969 if (ACPI_FAILURE(result))
970 return -ENODEV;
971
972 if (!data.hd_address || !data.hd_nirqs) {
973 printk("%s: no address or irqs in _CRS\n", __func__);
974 return -ENODEV;
975 }
976
977 return hpet_alloc(&data);
978 }
979
980 static int hpet_acpi_remove(struct acpi_device *device, int type)
981 {
982 /* XXX need to unregister clocksource, dealloc mem, etc */
983 return -EINVAL;
984 }
985
986 static const struct acpi_device_id hpet_device_ids[] = {
987 {"PNP0103", 0},
988 {"", 0},
989 };
990 MODULE_DEVICE_TABLE(acpi, hpet_device_ids);
991
992 static struct acpi_driver hpet_acpi_driver = {
993 .name = "hpet",
994 .ids = hpet_device_ids,
995 .ops = {
996 .add = hpet_acpi_add,
997 .remove = hpet_acpi_remove,
998 },
999 };
1000
1001 static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
1002
1003 static int __init hpet_init(void)
1004 {
1005 int result;
1006
1007 result = misc_register(&hpet_misc);
1008 if (result < 0)
1009 return -ENODEV;
1010
1011 sysctl_header = register_sysctl_table(dev_root);
1012
1013 result = acpi_bus_register_driver(&hpet_acpi_driver);
1014 if (result < 0) {
1015 if (sysctl_header)
1016 unregister_sysctl_table(sysctl_header);
1017 misc_deregister(&hpet_misc);
1018 return result;
1019 }
1020
1021 return 0;
1022 }
1023
1024 static void __exit hpet_exit(void)
1025 {
1026 acpi_bus_unregister_driver(&hpet_acpi_driver);
1027
1028 if (sysctl_header)
1029 unregister_sysctl_table(sysctl_header);
1030 misc_deregister(&hpet_misc);
1031
1032 return;
1033 }
1034
1035 module_init(hpet_init);
1036 module_exit(hpet_exit);
1037 MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1038 MODULE_LICENSE("GPL");
Linux for Ginger Game Console