OMAP3: PM: Prevented DVFS state switches when enabling off-mode
[linux-ginger.git] / drivers / ssb / scan.c
blobb74212d698c78b8d39c541ec44d2857cb9ad0e19
1 /*
2 * Sonics Silicon Backplane
3 * Bus scanning
5 * Copyright (C) 2005-2007 Michael Buesch <mb@bu3sch.de>
6 * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de>
7 * Copyright (C) 2005 Stefano Brivio <st3@riseup.net>
8 * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org>
9 * Copyright (C) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch>
10 * Copyright (C) 2006 Broadcom Corporation.
12 * Licensed under the GNU/GPL. See COPYING for details.
15 #include <linux/ssb/ssb.h>
16 #include <linux/ssb/ssb_regs.h>
17 #include <linux/pci.h>
18 #include <linux/io.h>
20 #include <pcmcia/cs_types.h>
21 #include <pcmcia/cs.h>
22 #include <pcmcia/cistpl.h>
23 #include <pcmcia/ds.h>
25 #include "ssb_private.h"
28 const char *ssb_core_name(u16 coreid)
30 switch (coreid) {
31 case SSB_DEV_CHIPCOMMON:
32 return "ChipCommon";
33 case SSB_DEV_ILINE20:
34 return "ILine 20";
35 case SSB_DEV_SDRAM:
36 return "SDRAM";
37 case SSB_DEV_PCI:
38 return "PCI";
39 case SSB_DEV_MIPS:
40 return "MIPS";
41 case SSB_DEV_ETHERNET:
42 return "Fast Ethernet";
43 case SSB_DEV_V90:
44 return "V90";
45 case SSB_DEV_USB11_HOSTDEV:
46 return "USB 1.1 Hostdev";
47 case SSB_DEV_ADSL:
48 return "ADSL";
49 case SSB_DEV_ILINE100:
50 return "ILine 100";
51 case SSB_DEV_IPSEC:
52 return "IPSEC";
53 case SSB_DEV_PCMCIA:
54 return "PCMCIA";
55 case SSB_DEV_INTERNAL_MEM:
56 return "Internal Memory";
57 case SSB_DEV_MEMC_SDRAM:
58 return "MEMC SDRAM";
59 case SSB_DEV_EXTIF:
60 return "EXTIF";
61 case SSB_DEV_80211:
62 return "IEEE 802.11";
63 case SSB_DEV_MIPS_3302:
64 return "MIPS 3302";
65 case SSB_DEV_USB11_HOST:
66 return "USB 1.1 Host";
67 case SSB_DEV_USB11_DEV:
68 return "USB 1.1 Device";
69 case SSB_DEV_USB20_HOST:
70 return "USB 2.0 Host";
71 case SSB_DEV_USB20_DEV:
72 return "USB 2.0 Device";
73 case SSB_DEV_SDIO_HOST:
74 return "SDIO Host";
75 case SSB_DEV_ROBOSWITCH:
76 return "Roboswitch";
77 case SSB_DEV_PARA_ATA:
78 return "PATA";
79 case SSB_DEV_SATA_XORDMA:
80 return "SATA XOR-DMA";
81 case SSB_DEV_ETHERNET_GBIT:
82 return "GBit Ethernet";
83 case SSB_DEV_PCIE:
84 return "PCI-E";
85 case SSB_DEV_MIMO_PHY:
86 return "MIMO PHY";
87 case SSB_DEV_SRAM_CTRLR:
88 return "SRAM Controller";
89 case SSB_DEV_MINI_MACPHY:
90 return "Mini MACPHY";
91 case SSB_DEV_ARM_1176:
92 return "ARM 1176";
93 case SSB_DEV_ARM_7TDMI:
94 return "ARM 7TDMI";
96 return "UNKNOWN";
99 static u16 pcidev_to_chipid(struct pci_dev *pci_dev)
101 u16 chipid_fallback = 0;
103 switch (pci_dev->device) {
104 case 0x4301:
105 chipid_fallback = 0x4301;
106 break;
107 case 0x4305 ... 0x4307:
108 chipid_fallback = 0x4307;
109 break;
110 case 0x4403:
111 chipid_fallback = 0x4402;
112 break;
113 case 0x4610 ... 0x4615:
114 chipid_fallback = 0x4610;
115 break;
116 case 0x4710 ... 0x4715:
117 chipid_fallback = 0x4710;
118 break;
119 case 0x4320 ... 0x4325:
120 chipid_fallback = 0x4309;
121 break;
122 case PCI_DEVICE_ID_BCM4401:
123 case PCI_DEVICE_ID_BCM4401B0:
124 case PCI_DEVICE_ID_BCM4401B1:
125 chipid_fallback = 0x4401;
126 break;
127 default:
128 ssb_printk(KERN_ERR PFX
129 "PCI-ID not in fallback list\n");
132 return chipid_fallback;
135 static u8 chipid_to_nrcores(u16 chipid)
137 switch (chipid) {
138 case 0x5365:
139 return 7;
140 case 0x4306:
141 return 6;
142 case 0x4310:
143 return 8;
144 case 0x4307:
145 case 0x4301:
146 return 5;
147 case 0x4401:
148 case 0x4402:
149 return 3;
150 case 0x4710:
151 case 0x4610:
152 case 0x4704:
153 return 9;
154 default:
155 ssb_printk(KERN_ERR PFX
156 "CHIPID not in nrcores fallback list\n");
159 return 1;
162 static u32 scan_read32(struct ssb_bus *bus, u8 current_coreidx,
163 u16 offset)
165 switch (bus->bustype) {
166 case SSB_BUSTYPE_SSB:
167 offset += current_coreidx * SSB_CORE_SIZE;
168 break;
169 case SSB_BUSTYPE_PCI:
170 break;
171 case SSB_BUSTYPE_PCMCIA:
172 if (offset >= 0x800) {
173 ssb_pcmcia_switch_segment(bus, 1);
174 offset -= 0x800;
175 } else
176 ssb_pcmcia_switch_segment(bus, 0);
177 break;
178 case SSB_BUSTYPE_SDIO:
179 offset += current_coreidx * SSB_CORE_SIZE;
180 return ssb_sdio_scan_read32(bus, offset);
182 return readl(bus->mmio + offset);
185 static int scan_switchcore(struct ssb_bus *bus, u8 coreidx)
187 switch (bus->bustype) {
188 case SSB_BUSTYPE_SSB:
189 break;
190 case SSB_BUSTYPE_PCI:
191 return ssb_pci_switch_coreidx(bus, coreidx);
192 case SSB_BUSTYPE_PCMCIA:
193 return ssb_pcmcia_switch_coreidx(bus, coreidx);
194 case SSB_BUSTYPE_SDIO:
195 return ssb_sdio_scan_switch_coreidx(bus, coreidx);
197 return 0;
200 void ssb_iounmap(struct ssb_bus *bus)
202 switch (bus->bustype) {
203 case SSB_BUSTYPE_SSB:
204 case SSB_BUSTYPE_PCMCIA:
205 iounmap(bus->mmio);
206 break;
207 case SSB_BUSTYPE_PCI:
208 #ifdef CONFIG_SSB_PCIHOST
209 pci_iounmap(bus->host_pci, bus->mmio);
210 #else
211 SSB_BUG_ON(1); /* Can't reach this code. */
212 #endif
213 break;
214 case SSB_BUSTYPE_SDIO:
215 break;
217 bus->mmio = NULL;
218 bus->mapped_device = NULL;
221 static void __iomem *ssb_ioremap(struct ssb_bus *bus,
222 unsigned long baseaddr)
224 void __iomem *mmio = NULL;
226 switch (bus->bustype) {
227 case SSB_BUSTYPE_SSB:
228 /* Only map the first core for now. */
229 /* fallthrough... */
230 case SSB_BUSTYPE_PCMCIA:
231 mmio = ioremap(baseaddr, SSB_CORE_SIZE);
232 break;
233 case SSB_BUSTYPE_PCI:
234 #ifdef CONFIG_SSB_PCIHOST
235 mmio = pci_iomap(bus->host_pci, 0, ~0UL);
236 #else
237 SSB_BUG_ON(1); /* Can't reach this code. */
238 #endif
239 break;
240 case SSB_BUSTYPE_SDIO:
241 /* Nothing to ioremap in the SDIO case, just fake it */
242 mmio = (void __iomem *)baseaddr;
243 break;
246 return mmio;
249 static int we_support_multiple_80211_cores(struct ssb_bus *bus)
251 /* More than one 802.11 core is only supported by special chips.
252 * There are chips with two 802.11 cores, but with dangling
253 * pins on the second core. Be careful and reject them here.
256 #ifdef CONFIG_SSB_PCIHOST
257 if (bus->bustype == SSB_BUSTYPE_PCI) {
258 if (bus->host_pci->vendor == PCI_VENDOR_ID_BROADCOM &&
259 bus->host_pci->device == 0x4324)
260 return 1;
262 #endif /* CONFIG_SSB_PCIHOST */
263 return 0;
266 int ssb_bus_scan(struct ssb_bus *bus,
267 unsigned long baseaddr)
269 int err = -ENOMEM;
270 void __iomem *mmio;
271 u32 idhi, cc, rev, tmp;
272 int dev_i, i;
273 struct ssb_device *dev;
274 int nr_80211_cores = 0;
276 mmio = ssb_ioremap(bus, baseaddr);
277 if (!mmio)
278 goto out;
279 bus->mmio = mmio;
281 err = scan_switchcore(bus, 0); /* Switch to first core */
282 if (err)
283 goto err_unmap;
285 idhi = scan_read32(bus, 0, SSB_IDHIGH);
286 cc = (idhi & SSB_IDHIGH_CC) >> SSB_IDHIGH_CC_SHIFT;
287 rev = (idhi & SSB_IDHIGH_RCLO);
288 rev |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
290 bus->nr_devices = 0;
291 if (cc == SSB_DEV_CHIPCOMMON) {
292 tmp = scan_read32(bus, 0, SSB_CHIPCO_CHIPID);
294 bus->chip_id = (tmp & SSB_CHIPCO_IDMASK);
295 bus->chip_rev = (tmp & SSB_CHIPCO_REVMASK) >>
296 SSB_CHIPCO_REVSHIFT;
297 bus->chip_package = (tmp & SSB_CHIPCO_PACKMASK) >>
298 SSB_CHIPCO_PACKSHIFT;
299 if (rev >= 4) {
300 bus->nr_devices = (tmp & SSB_CHIPCO_NRCORESMASK) >>
301 SSB_CHIPCO_NRCORESSHIFT;
303 tmp = scan_read32(bus, 0, SSB_CHIPCO_CAP);
304 bus->chipco.capabilities = tmp;
305 } else {
306 if (bus->bustype == SSB_BUSTYPE_PCI) {
307 bus->chip_id = pcidev_to_chipid(bus->host_pci);
308 pci_read_config_word(bus->host_pci, PCI_REVISION_ID,
309 &bus->chip_rev);
310 bus->chip_package = 0;
311 } else {
312 bus->chip_id = 0x4710;
313 bus->chip_rev = 0;
314 bus->chip_package = 0;
317 if (!bus->nr_devices)
318 bus->nr_devices = chipid_to_nrcores(bus->chip_id);
319 if (bus->nr_devices > ARRAY_SIZE(bus->devices)) {
320 ssb_printk(KERN_ERR PFX
321 "More than %d ssb cores found (%d)\n",
322 SSB_MAX_NR_CORES, bus->nr_devices);
323 goto err_unmap;
325 if (bus->bustype == SSB_BUSTYPE_SSB) {
326 /* Now that we know the number of cores,
327 * remap the whole IO space for all cores.
329 err = -ENOMEM;
330 iounmap(mmio);
331 mmio = ioremap(baseaddr, SSB_CORE_SIZE * bus->nr_devices);
332 if (!mmio)
333 goto out;
334 bus->mmio = mmio;
337 /* Fetch basic information about each core/device */
338 for (i = 0, dev_i = 0; i < bus->nr_devices; i++) {
339 err = scan_switchcore(bus, i);
340 if (err)
341 goto err_unmap;
342 dev = &(bus->devices[dev_i]);
344 idhi = scan_read32(bus, i, SSB_IDHIGH);
345 dev->id.coreid = (idhi & SSB_IDHIGH_CC) >> SSB_IDHIGH_CC_SHIFT;
346 dev->id.revision = (idhi & SSB_IDHIGH_RCLO);
347 dev->id.revision |= (idhi & SSB_IDHIGH_RCHI) >> SSB_IDHIGH_RCHI_SHIFT;
348 dev->id.vendor = (idhi & SSB_IDHIGH_VC) >> SSB_IDHIGH_VC_SHIFT;
349 dev->core_index = i;
350 dev->bus = bus;
351 dev->ops = bus->ops;
353 ssb_dprintk(KERN_INFO PFX
354 "Core %d found: %s "
355 "(cc 0x%03X, rev 0x%02X, vendor 0x%04X)\n",
356 i, ssb_core_name(dev->id.coreid),
357 dev->id.coreid, dev->id.revision, dev->id.vendor);
359 switch (dev->id.coreid) {
360 case SSB_DEV_80211:
361 nr_80211_cores++;
362 if (nr_80211_cores > 1) {
363 if (!we_support_multiple_80211_cores(bus)) {
364 ssb_dprintk(KERN_INFO PFX "Ignoring additional "
365 "802.11 core\n");
366 continue;
369 break;
370 case SSB_DEV_EXTIF:
371 #ifdef CONFIG_SSB_DRIVER_EXTIF
372 if (bus->extif.dev) {
373 ssb_printk(KERN_WARNING PFX
374 "WARNING: Multiple EXTIFs found\n");
375 break;
377 bus->extif.dev = dev;
378 #endif /* CONFIG_SSB_DRIVER_EXTIF */
379 break;
380 case SSB_DEV_CHIPCOMMON:
381 if (bus->chipco.dev) {
382 ssb_printk(KERN_WARNING PFX
383 "WARNING: Multiple ChipCommon found\n");
384 break;
386 bus->chipco.dev = dev;
387 break;
388 case SSB_DEV_MIPS:
389 case SSB_DEV_MIPS_3302:
390 #ifdef CONFIG_SSB_DRIVER_MIPS
391 if (bus->mipscore.dev) {
392 ssb_printk(KERN_WARNING PFX
393 "WARNING: Multiple MIPS cores found\n");
394 break;
396 bus->mipscore.dev = dev;
397 #endif /* CONFIG_SSB_DRIVER_MIPS */
398 break;
399 case SSB_DEV_PCI:
400 case SSB_DEV_PCIE:
401 #ifdef CONFIG_SSB_DRIVER_PCICORE
402 if (bus->bustype == SSB_BUSTYPE_PCI) {
403 /* Ignore PCI cores on PCI-E cards.
404 * Ignore PCI-E cores on PCI cards. */
405 if (dev->id.coreid == SSB_DEV_PCI) {
406 if (bus->host_pci->is_pcie)
407 continue;
408 } else {
409 if (!bus->host_pci->is_pcie)
410 continue;
413 if (bus->pcicore.dev) {
414 ssb_printk(KERN_WARNING PFX
415 "WARNING: Multiple PCI(E) cores found\n");
416 break;
418 bus->pcicore.dev = dev;
419 #endif /* CONFIG_SSB_DRIVER_PCICORE */
420 break;
421 default:
422 break;
425 dev_i++;
427 bus->nr_devices = dev_i;
429 err = 0;
430 out:
431 return err;
432 err_unmap:
433 ssb_iounmap(bus);
434 goto out;