OMAP3: SR: Reset voltage level on SR disable
[linux-ginger.git] / arch / arm / plat-s3c24xx / gpio.c
blob95df059b5a1db2b7430ee52972b83034e6b3f6de
1 /* linux/arch/arm/plat-s3c24xx/gpio.c
3 * Copyright (c) 2004-2005 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
6 * S3C24XX GPIO support
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 #include <linux/kernel.h>
25 #include <linux/init.h>
26 #include <linux/module.h>
27 #include <linux/interrupt.h>
28 #include <linux/ioport.h>
29 #include <linux/io.h>
31 #include <mach/hardware.h>
32 #include <asm/irq.h>
34 #include <mach/regs-gpio.h>
36 void s3c2410_gpio_cfgpin(unsigned int pin, unsigned int function)
38 void __iomem *base = S3C24XX_GPIO_BASE(pin);
39 unsigned long mask;
40 unsigned long con;
41 unsigned long flags;
43 if (pin < S3C2410_GPIO_BANKB) {
44 mask = 1 << S3C2410_GPIO_OFFSET(pin);
45 } else {
46 mask = 3 << S3C2410_GPIO_OFFSET(pin)*2;
49 switch (function) {
50 case S3C2410_GPIO_LEAVE:
51 mask = 0;
52 function = 0;
53 break;
55 case S3C2410_GPIO_INPUT:
56 case S3C2410_GPIO_OUTPUT:
57 case S3C2410_GPIO_SFN2:
58 case S3C2410_GPIO_SFN3:
59 if (pin < S3C2410_GPIO_BANKB) {
60 function -= 1;
61 function &= 1;
62 function <<= S3C2410_GPIO_OFFSET(pin);
63 } else {
64 function &= 3;
65 function <<= S3C2410_GPIO_OFFSET(pin)*2;
69 /* modify the specified register wwith IRQs off */
71 local_irq_save(flags);
73 con = __raw_readl(base + 0x00);
74 con &= ~mask;
75 con |= function;
77 __raw_writel(con, base + 0x00);
79 local_irq_restore(flags);
82 EXPORT_SYMBOL(s3c2410_gpio_cfgpin);
84 unsigned int s3c2410_gpio_getcfg(unsigned int pin)
86 void __iomem *base = S3C24XX_GPIO_BASE(pin);
87 unsigned long val = __raw_readl(base);
89 if (pin < S3C2410_GPIO_BANKB) {
90 val >>= S3C2410_GPIO_OFFSET(pin);
91 val &= 1;
92 val += 1;
93 } else {
94 val >>= S3C2410_GPIO_OFFSET(pin)*2;
95 val &= 3;
98 return val | S3C2410_GPIO_INPUT;
101 EXPORT_SYMBOL(s3c2410_gpio_getcfg);
103 void s3c2410_gpio_pullup(unsigned int pin, unsigned int to)
105 void __iomem *base = S3C24XX_GPIO_BASE(pin);
106 unsigned long offs = S3C2410_GPIO_OFFSET(pin);
107 unsigned long flags;
108 unsigned long up;
110 if (pin < S3C2410_GPIO_BANKB)
111 return;
113 local_irq_save(flags);
115 up = __raw_readl(base + 0x08);
116 up &= ~(1L << offs);
117 up |= to << offs;
118 __raw_writel(up, base + 0x08);
120 local_irq_restore(flags);
123 EXPORT_SYMBOL(s3c2410_gpio_pullup);
125 int s3c2410_gpio_getpull(unsigned int pin)
127 void __iomem *base = S3C24XX_GPIO_BASE(pin);
128 unsigned long offs = S3C2410_GPIO_OFFSET(pin);
130 if (pin < S3C2410_GPIO_BANKB)
131 return -EINVAL;
133 return (__raw_readl(base + 0x08) & (1L << offs)) ? 1 : 0;
136 EXPORT_SYMBOL(s3c2410_gpio_getpull);
138 void s3c2410_gpio_setpin(unsigned int pin, unsigned int to)
140 void __iomem *base = S3C24XX_GPIO_BASE(pin);
141 unsigned long offs = S3C2410_GPIO_OFFSET(pin);
142 unsigned long flags;
143 unsigned long dat;
145 local_irq_save(flags);
147 dat = __raw_readl(base + 0x04);
148 dat &= ~(1 << offs);
149 dat |= to << offs;
150 __raw_writel(dat, base + 0x04);
152 local_irq_restore(flags);
155 EXPORT_SYMBOL(s3c2410_gpio_setpin);
157 unsigned int s3c2410_gpio_getpin(unsigned int pin)
159 void __iomem *base = S3C24XX_GPIO_BASE(pin);
160 unsigned long offs = S3C2410_GPIO_OFFSET(pin);
162 return __raw_readl(base + 0x04) & (1<< offs);
165 EXPORT_SYMBOL(s3c2410_gpio_getpin);
167 unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change)
169 unsigned long flags;
170 unsigned long misccr;
172 local_irq_save(flags);
173 misccr = __raw_readl(S3C24XX_MISCCR);
174 misccr &= ~clear;
175 misccr ^= change;
176 __raw_writel(misccr, S3C24XX_MISCCR);
177 local_irq_restore(flags);
179 return misccr;
182 EXPORT_SYMBOL(s3c2410_modify_misccr);
184 int s3c2410_gpio_getirq(unsigned int pin)
186 if (pin < S3C2410_GPF(0) || pin > S3C2410_GPG(15))
187 return -EINVAL; /* not valid interrupts */
189 if (pin < S3C2410_GPG(0) && pin > S3C2410_GPF(7))
190 return -EINVAL; /* not valid pin */
192 if (pin < S3C2410_GPF(4))
193 return (pin - S3C2410_GPF(0)) + IRQ_EINT0;
195 if (pin < S3C2410_GPG(0))
196 return (pin - S3C2410_GPF(4)) + IRQ_EINT4;
198 return (pin - S3C2410_GPG(0)) + IRQ_EINT8;
201 EXPORT_SYMBOL(s3c2410_gpio_getirq);