2 * arch/xtensa/kernel/module.c
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
10 * Copyright (C) 2001 - 2006 Tensilica Inc.
12 * Chris Zankel <chris@zankel.net>
16 #include <linux/module.h>
17 #include <linux/moduleloader.h>
18 #include <linux/elf.h>
19 #include <linux/vmalloc.h>
21 #include <linux/string.h>
22 #include <linux/kernel.h>
23 #include <linux/cache.h>
27 void *module_alloc(unsigned long size
)
31 return vmalloc_exec(size
);
34 void module_free(struct module
*mod
, void *module_region
)
39 int module_frob_arch_sections(Elf32_Ehdr
*hdr
,
48 decode_calln_opcode (unsigned char *location
)
51 return (location
[0] & 0xf0) == 0x50;
54 return (location
[0] & 0xf) == 0x5;
59 decode_l32r_opcode (unsigned char *location
)
62 return (location
[0] & 0xf0) == 0x10;
65 return (location
[0] & 0xf) == 0x1;
69 int apply_relocate(Elf32_Shdr
*sechdrs
,
71 unsigned int symindex
,
75 printk(KERN_ERR
"module %s: REL RELOCATION unsupported\n",
81 int apply_relocate_add(Elf32_Shdr
*sechdrs
,
83 unsigned int symindex
,
88 Elf32_Rela
*rela
= (void *)sechdrs
[relsec
].sh_addr
;
90 unsigned char *location
;
94 printk("Applying relocate section %u to %u\n", relsec
,
95 sechdrs
[relsec
].sh_info
);
97 for (i
= 0; i
< sechdrs
[relsec
].sh_size
/ sizeof(*rela
); i
++) {
98 location
= (char *)sechdrs
[sechdrs
[relsec
].sh_info
].sh_addr
100 sym
= (Elf32_Sym
*)sechdrs
[symindex
].sh_addr
101 + ELF32_R_SYM(rela
[i
].r_info
);
102 value
= sym
->st_value
+ rela
[i
].r_addend
;
104 switch (ELF32_R_TYPE(rela
[i
].r_info
)) {
107 case R_XTENSA_DIFF16
:
108 case R_XTENSA_DIFF32
:
109 case R_XTENSA_ASM_EXPAND
:
114 *(uint32_t *)location
+= value
;
117 case R_XTENSA_SLOT0_OP
:
118 if (decode_calln_opcode(location
)) {
119 value
-= ((unsigned long)location
& -4) + 4;
120 if ((value
& 3) != 0 ||
121 ((value
+ (1 << 19)) >> 20) != 0) {
122 printk("%s: relocation out of range, "
123 "section %d reloc %d "
125 mod
->name
, relsec
, i
,
126 strtab
+ sym
->st_name
);
129 value
= (signed int)value
>> 2;
131 location
[0] = ((location
[0] & ~0x3) |
132 ((value
>> 16) & 0x3));
133 location
[1] = (value
>> 8) & 0xff;
134 location
[2] = value
& 0xff;
137 location
[0] = ((location
[0] & ~0xc0) |
138 ((value
<< 6) & 0xc0));
139 location
[1] = (value
>> 2) & 0xff;
140 location
[2] = (value
>> 10) & 0xff;
142 } else if (decode_l32r_opcode(location
)) {
143 value
-= (((unsigned long)location
+ 3) & -4);
144 if ((value
& 3) != 0 ||
145 (signed int)value
>> 18 != -1) {
146 printk("%s: relocation out of range, "
147 "section %d reloc %d "
149 mod
->name
, relsec
, i
,
150 strtab
+ sym
->st_name
);
153 value
= (signed int)value
>> 2;
156 location
[1] = (value
>> 8) & 0xff;
157 location
[2] = value
& 0xff;
160 location
[1] = value
& 0xff;
161 location
[2] = (value
>> 8) & 0xff;
164 /* FIXME: Ignore any other opcodes. The Xtensa
165 assembler currently assumes that the linker will
166 always do relaxation and so all PC-relative
167 operands need relocations. (The assembler also
168 writes out the tentative PC-relative values,
169 assuming no link-time relaxation, so it is usually
170 safe to ignore the relocations.) If the
171 assembler's "--no-link-relax" flag can be made to
172 work, and if all kernel modules can be assembled
173 with that flag, then unexpected relocations could
177 case R_XTENSA_SLOT1_OP
:
178 case R_XTENSA_SLOT2_OP
:
179 case R_XTENSA_SLOT3_OP
:
180 case R_XTENSA_SLOT4_OP
:
181 case R_XTENSA_SLOT5_OP
:
182 case R_XTENSA_SLOT6_OP
:
183 case R_XTENSA_SLOT7_OP
:
184 case R_XTENSA_SLOT8_OP
:
185 case R_XTENSA_SLOT9_OP
:
186 case R_XTENSA_SLOT10_OP
:
187 case R_XTENSA_SLOT11_OP
:
188 case R_XTENSA_SLOT12_OP
:
189 case R_XTENSA_SLOT13_OP
:
190 case R_XTENSA_SLOT14_OP
:
191 printk("%s: unexpected FLIX relocation: %u\n",
193 ELF32_R_TYPE(rela
[i
].r_info
));
196 case R_XTENSA_SLOT0_ALT
:
197 case R_XTENSA_SLOT1_ALT
:
198 case R_XTENSA_SLOT2_ALT
:
199 case R_XTENSA_SLOT3_ALT
:
200 case R_XTENSA_SLOT4_ALT
:
201 case R_XTENSA_SLOT5_ALT
:
202 case R_XTENSA_SLOT6_ALT
:
203 case R_XTENSA_SLOT7_ALT
:
204 case R_XTENSA_SLOT8_ALT
:
205 case R_XTENSA_SLOT9_ALT
:
206 case R_XTENSA_SLOT10_ALT
:
207 case R_XTENSA_SLOT11_ALT
:
208 case R_XTENSA_SLOT12_ALT
:
209 case R_XTENSA_SLOT13_ALT
:
210 case R_XTENSA_SLOT14_ALT
:
211 printk("%s: unexpected ALT relocation: %u\n",
213 ELF32_R_TYPE(rela
[i
].r_info
));
217 printk("%s: unexpected relocation: %u\n",
219 ELF32_R_TYPE(rela
[i
].r_info
));
226 int module_finalize(const Elf_Ehdr
*hdr
,
227 const Elf_Shdr
*sechdrs
,
233 void module_arch_cleanup(struct module
*mod
)