PRCM: OMAP3: Fix to wrongly modified omap2_clk_wait_ready
[linux-ginger.git] / arch / arm / mach-omap2 / usb-ehci.c
blobe178a0d4d920a956b99f50cb0fbb48ae3abc4a5d
1 /*
2 * linux/arch/arm/mach-omap2/usb-ehci.c
4 * This file will contain the board specific details for the
5 * Synopsys EHCI host controller on OMAP3430
7 * Copyright (C) 2007 Texas Instruments
8 * Author: Vikram Pandita <vikram.pandita@ti.com>
10 * Generalization by:
11 * Felipe Balbi <felipe.balbi@nokia.com>
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
18 #include <linux/types.h>
19 #include <linux/errno.h>
20 #include <linux/delay.h>
21 #include <linux/platform_device.h>
22 #include <linux/clk.h>
23 #include <asm/io.h>
24 #include <asm/arch/mux.h>
25 #include <linux/usb/musb.h>
27 #include <asm/arch/hardware.h>
28 #include <asm/arch/pm.h>
29 #include <asm/arch/usb.h>
31 #if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE)
32 static struct resource ehci_resources[] = {
33 [0] = {
34 .start = OMAP34XX_HSUSB_HOST_BASE + 0x800,
35 .end = OMAP34XX_HSUSB_HOST_BASE + 0x800 + SZ_1K - 1,
36 .flags = IORESOURCE_MEM,
38 [1] = { /* general IRQ */
39 .start = INT_34XX_EHCI_IRQ,
40 .flags = IORESOURCE_IRQ,
44 static u64 ehci_dmamask = ~(u32)0;
45 static struct platform_device ehci_device = {
46 .name = "ehci-omap",
47 .id = 0,
48 .dev = {
49 .dma_mask = &ehci_dmamask,
50 .coherent_dma_mask = 0xffffffff,
51 .platform_data = NULL,
53 .num_resources = ARRAY_SIZE(ehci_resources),
54 .resource = ehci_resources,
58 /* MUX settings for EHCI pins */
60 * setup_ehci_io_mux - initialize IO pad mux for USBHOST
62 static void setup_ehci_io_mux(void)
64 #ifdef CONFIG_OMAP_EHCI_PHY_MODE
65 /* PHY mode of operation for board: 750-2083-001
66 * ISP1504 connected to Port1 and Port2
67 * Do Func Mux setting for 12-pin ULPI PHY mode
70 /* Port1 */
71 omap_cfg_reg(Y9_3430_USB1HS_PHY_STP);
72 omap_cfg_reg(Y8_3430_USB1HS_PHY_CLK);
73 omap_cfg_reg(AA14_3430_USB1HS_PHY_DIR);
74 omap_cfg_reg(AA11_3430_USB1HS_PHY_NXT);
75 omap_cfg_reg(W13_3430_USB1HS_PHY_DATA0);
76 omap_cfg_reg(W12_3430_USB1HS_PHY_DATA1);
77 omap_cfg_reg(W11_3430_USB1HS_PHY_DATA2);
78 omap_cfg_reg(Y11_3430_USB1HS_PHY_DATA3);
79 omap_cfg_reg(W9_3430_USB1HS_PHY_DATA4);
80 omap_cfg_reg(Y12_3430_USB1HS_PHY_DATA5);
81 omap_cfg_reg(W8_3430_USB1HS_PHY_DATA6);
82 omap_cfg_reg(Y13_3430_USB1HS_PHY_DATA7);
84 /* Port2 */
85 omap_cfg_reg(AA10_3430_USB2HS_PHY_STP);
86 omap_cfg_reg(AA8_3430_USB2HS_PHY_CLK);
87 omap_cfg_reg(AA9_3430_USB2HS_PHY_DIR);
88 omap_cfg_reg(AB11_3430_USB2HS_PHY_NXT);
89 omap_cfg_reg(AB10_3430_USB2HS_PHY_DATA0);
90 omap_cfg_reg(AB9_3430_USB2HS_PHY_DATA1);
91 omap_cfg_reg(W3_3430_USB2HS_PHY_DATA2);
92 omap_cfg_reg(T4_3430_USB2HS_PHY_DATA3);
93 omap_cfg_reg(T3_3430_USB2HS_PHY_DATA4);
94 omap_cfg_reg(R3_3430_USB2HS_PHY_DATA5);
95 omap_cfg_reg(R4_3430_USB2HS_PHY_DATA6);
96 omap_cfg_reg(T2_3430_USB2HS_PHY_DATA7);
98 #else
99 /* Set Func mux for :
100 * TLL mode of operation
101 * 12-pin ULPI SDR TLL mode for Port1/2/3
104 /* Port1 */
105 omap_cfg_reg(Y9_3430_USB1HS_TLL_STP);
106 omap_cfg_reg(Y8_3430_USB1HS_TLL_CLK);
107 omap_cfg_reg(AA14_3430_USB1HS_TLL_DIR);
108 omap_cfg_reg(AA11_3430_USB1HS_TLL_NXT);
109 omap_cfg_reg(W13_3430_USB1HS_TLL_DATA0);
110 omap_cfg_reg(W12_3430_USB1HS_TLL_DATA1);
111 omap_cfg_reg(W11_3430_USB1HS_TLL_DATA2);
112 omap_cfg_reg(Y11_3430_USB1HS_TLL_DATA3);
113 omap_cfg_reg(W9_3430_USB1HS_TLL_DATA4);
114 omap_cfg_reg(Y12_3430_USB1HS_TLL_DATA5);
115 omap_cfg_reg(W8_3430_USB1HS_TLL_DATA6);
116 omap_cfg_reg(Y13_3430_USB1HS_TLL_DATA7);
118 /* Port2 */
119 omap_cfg_reg(AA10_3430_USB2HS_TLL_STP);
120 omap_cfg_reg(AA8_3430_USB2HS_TLL_CLK);
121 omap_cfg_reg(AA9_3430_USB2HS_TLL_DIR);
122 omap_cfg_reg(AB11_3430_USB2HS_TLL_NXT);
123 omap_cfg_reg(AB10_3430_USB2HS_TLL_DATA0);
124 omap_cfg_reg(AB9_3430_USB2HS_TLL_DATA1);
125 omap_cfg_reg(W3_3430_USB2HS_TLL_DATA2);
126 omap_cfg_reg(T4_3430_USB2HS_TLL_DATA3);
127 omap_cfg_reg(T3_3430_USB2HS_TLL_DATA4);
128 omap_cfg_reg(R3_3430_USB2HS_TLL_DATA5);
129 omap_cfg_reg(R4_3430_USB2HS_TLL_DATA6);
130 omap_cfg_reg(T2_3430_USB2HS_TLL_DATA7);
132 /* Port3 */
133 omap_cfg_reg(AB3_3430_USB3HS_TLL_STP);
134 omap_cfg_reg(AA6_3430_USB3HS_TLL_CLK);
135 omap_cfg_reg(AA3_3430_USB3HS_TLL_DIR);
136 omap_cfg_reg(Y3_3430_USB3HS_TLL_NXT);
137 omap_cfg_reg(AA5_3430_USB3HS_TLL_DATA0);
138 omap_cfg_reg(Y4_3430_USB3HS_TLL_DATA1);
139 omap_cfg_reg(Y5_3430_USB3HS_TLL_DATA2);
140 omap_cfg_reg(W5_3430_USB3HS_TLL_DATA3);
141 omap_cfg_reg(AB12_3430_USB3HS_TLL_DATA4);
142 omap_cfg_reg(AB13_3430_USB3HS_TLL_DATA5);
143 omap_cfg_reg(AA13_3430_USB3HS_TLL_DATA6);
144 omap_cfg_reg(AA12_3430_USB3HS_TLL_DATA7);
145 #endif /* CONFIG_OMAP_EHCI_PHY_MODE */
147 return;
150 #endif /* EHCI specific data */
152 void __init usb_ehci_init(void)
154 #if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_EHCI_HCD_MODULE)
155 /* Setup Pin IO MUX for EHCI */
156 if (cpu_is_omap34xx())
157 setup_ehci_io_mux();
159 if (platform_device_register(&ehci_device) < 0) {
160 printk(KERN_ERR "Unable to register HS-USB (EHCI) device\n");
161 return;
163 #endif